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2023-12-20s390: Add suffix to conditional branch instruction descriptionsJens Remus2-0/+4
Suffix the instruction description of conditional branch extended mnemonics with their condition (e.g. "on A high"). This complements the optional printing of instruction descriptions as comments in the disassembly. Due to the added text the maximum description length is increased from 80 to 128 characters (including the trailing '\0' character). opcodes/ * s390-mkopc.c: Add suffix to conditional branch extended mnemonic instruction descriptions. gas/ * testsuite/gas/s390/zarch-insndesc.s: Add test cases for printing of suffixed instruction description of conditional branch extended mnemonics. * testsuite/gas/s390/zarch-insndesc.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-12-20s390: Optionally print instruction description in disassemblyJens Remus3-0/+28
Print instruction description as comment in disassembly with s390 architecture specific option "insndesc": - For objdump it can be enabled with option "-M insndesc" - In gdb it can be enabled with "set disassembler-options insndesc" Since comments are not column aligned the output can enhanced for readability by postprocessing using a filter such as "expand": ... | expand -t 8,16,24,32,40,80 Or when using in combination with objdump option --visualize-jumps: ... | expand | sed -e 's/ *#/\t#/' | expand -t 1,80 Note that the instruction descriptions add about 128 KB to s390-opc.o: s390-opc.o without instruction descriptions: 216368 bytes s390-opc.o with instruction descriptions : 348432 bytes binutils/ * NEWS: Mention new s390-specific disassembler option "insndesc". include/ * opcode/s390.h (struct s390_opcode): Add field to hold instruction description. opcodes/ * s390-mkopc.c: Copy instruction description from s390-opc.txt into generated operation code table s390-opc.tab. * s390-opc.c (s390_opformats): Provide NULL as description in .insn pseudo-mnemonics opcode table. * s390-dis.c: Add s390-specific disassembler option "insndesc" and optionally print the instruction description as comment in the disassembly when it is specified. gas/ * testsuite/gas/s390/s390.exp: Add new test disassembly test case "zarch-insndesc". * testsuite/gas/s390/zarch-insndesc.s: New test case for s390- specific disassembler option "insndesc". * testsuite/gas/s390/zarch-insndesc.d: Likewise. Signed-off-by: Jens Remus <jremus@linux.ibm.com> Reviewed-by: Andreas Krebbel <krebbel@linux.ibm.com>
2023-12-19aarch64: Add FEAT_ITE supportAndrea Corallo6-0/+20
This patch add support for FEAT_ITE "Instrumentation Extension" adding the "trcit" instruction. This is enabled by the +ite march flag.
2023-12-19aarch64: Add FEAT_ECBHB supportAndrea Corallo3-2/+13
This patch add support for FEAT_ECBHB "Exploitative control using branch history information" adding the "clrbhb" instruction. AFAIU the same alias was originally added as "clearbhb" before the architecture was finalized (Mandatory v8.9-a/v9.4-a; Optional v8.0-a+/v9.0-a+).
2023-12-19aarch64: Add FEAT_SPECRES2 supportAndrea Corallo6-0/+25
This patch add supports for FEAT_SPECRES2 "Enhanced speculation restriction instructions" adding the "cosp" instruction. This is mandatory v8.9-a/v9.4-a and optional v8.0-a+/v9.0-a+. It is enabled by the +predres2 march flag.
2023-12-19x86: Remove the restriction for size of the mask register in AVX10Haochen Jiang3-231/+30
Since AVX10.1/256 will also allow 64 bit mask register, we will remove the restriction for size of the mask register in AVX10. gas/ChangeLog: * config/tc-i386.c (VSZ128, VSZ256, VSZ512): New. (VEX_check_encoding): Remove opcode_modifier check for vsz. * testsuite/gas/i386/avx10-vsz.l: Remove testcases for mask registers since they are not needed. * testsuite/gas/i386/avx10-vsz.s: Ditto. opcodes/ChangeLog: * i386-gen.c: Remove Vsz. * i386-opc.h: Ditto. * i386-opc.tbl: Remove kvsz. * i386-tbl.h: Regenerated.
2023-12-18LoongArch: Add call36 and tail36 pseudo instructions for medium code modelmengqinggang2-2/+10
For tail36, it is necessary to explicitly indicate the temporary register. Therefore, the compiler and users will know that the tail will use a register. call36 func pcalau18i $ra, %call36(func) jirl $ra, $ra, 0; tail36 $t0, func pcalau18i $t0, %call36(func) jirl $zero, $t0, 0;
2023-12-18LoongArch: Add new relocation R_LARCH_CALL36mengqinggang3-1/+26
R_LARCH_CALL36 is used for medium code model function call pcaddu18i+jirl, and these two instructions must adjacent. The LoongArch ABI v2.20 at here: https://github.com/loongson/la-abi-specs.
2023-12-15arm: reformat -march option section in gas documentationMatthieu Longo1-110/+129
Hi, This patch contains a reformatting of -march option section in gas documentation. For instance (see https://sourceware.org/binutils/docs-2.41/as.html#ARM-Options), before all the options were on one line: For armv8-a: +crc: Enables CRC32 Extension. +simd: Enables VFP and NEON for Armv8-A. +crypto: Enables Cryptography Extensions for Armv8-A, implies +simd. +sb: Enables Speculation Barrier Instruction for Armv8-A. +predres: Enables Execution and Data Prediction Restriction Instruction for Armv8-A. +nofp: Disables all FPU, NEON and Cryptography Extensions. +nocrypto: Disables Cryptography Extensions. Now, the readability is improved thanks to the itemization of the options: For armv8-a: +crc: Enables CRC32 Extension. +simd: Enables VFP and NEON for Armv8-A. +crypto: Enables Cryptography Extensions for Armv8-A, implies +simd. +sb: Enables Speculation Barrier Instruction for Armv8-A. +predres: Enables Execution and Data Prediction Restriction Instruction for Armv8-A. +nofp: Disables all FPU, NEON and Cryptography Extensions. +nocrypto: Disables Cryptography Extensions. Ok for binutils-master? I don't have commit access so I need someone to commit on my behalf. Regards, Matthieu.
2023-12-15aarch64: Enable Cortex-X3 CPUMatthieu Longo4-0/+11
Hi, This patch adds support for the Cortex-X3 CPU to binutils. Gas regression testing for aarch64-none-linux-gnu target and found no regressions. Ok for binutils-master? I don't have commit access so I need someone to commit on my behalf. Regards, Matthieu.
2023-12-15arm: document -march=armv9.[123]-a binutils optionsMatthieu Longo1-0/+3
2023-12-15x86: last-insn recording should be per-subsectionJan Beulich5-0/+77
Otherwise intermediate subsection switches result in inconsistent behavior. Leverage ELF's section change hook to switch state as necessary, limiting overhead to the bare minimum when subsections aren't used.
2023-12-15ELF: reliably invoke md_elf_section_change_hook()Jan Beulich1-11/+18
... after any (sub)section change. While certain existing target hooks only look at now_seg, for a few others it looks as if failing to do so could have caused anomalies if sub-sections were used. In any event a subsequent x86 change is going to require the sub-section to be properly in place at the time the hook is invoked. This primarily means for obj_elf_section() to pass the new subsection into change_section(), for it to be set right away (ahead of invoking the hook). Also adjust obj_elf_ident() to invoke the hook after all section changes. (Note that obj_elf_version(), which also changes sections and then changes them back, has no hook invocation at all so far, so none are added. Presumably there is a reason for this difference in behavior.)
2023-12-15ELF: drop "push" parameter from obj_elf_change_section()Jan Beulich9-24/+34
No caller outside of obj-elf.c cares about the parameter - drop it by introducing an obj-elf.c-internal wrapper. While adding the new function parameter, take the opportunity and change the adjacent boolean one to "bool".
2023-12-15x86: don't needlessly override .bssJan Beulich1-8/+5
ELF, COFF, and Mach-O all have custom handlers for .bss. Don't override those; install a handler only for a.out.
2023-12-15revert "x86: allow 32-bit reg to be used with U{RD,WR}MSR"Jan Beulich1-4/+4
This reverts commit 1f865bae65db9588f6994c02a92355bfb4e3d955. The specification is going to by updated in a way rendering this change wrong.
2023-12-15x86: fold assembly dialect attributesJan Beulich2-5/+5
Now that ATTSyntax and ATTMnemonic aren't use in combination anymore, fold them and IntelSyntax into a single, enum-like attribute. Note that this shrinks i386_opcode_modifier back to 2 32-bit words (albeit that's not for long, seeing in-flight additions for APX).
2023-12-15x86: Intel syntax implies Intel mnemonicsJan Beulich8-54/+30
As noted in the context of d53e6b98a259 ("x86/Intel: correct disassembly of fsub*/fdiv*") there's no such thing as Intel syntax without Intel mnemonics. Enforce this on the assembler side, and disentangle command line option handling on the disassembler side accordingly. As a result in the opcode table specifying ATTMnemonic|ATTSyntax becomes redundant with just ATTMnemonic. Drop the now meaningless ATTSyntax and remove the then no longer accessible templates.
2023-12-15Arm64: fix build for certain gcc versionsJan Beulich1-3/+3
Some complain (by default) about isalpha shadowing ctype.h's isalpha(). Some also complain about signed/unsigned comparison a few lines later.
2023-12-14RISC-V: Fix the wrong encoding and operand of the XTheadFmv extension.Jin Ma2-3/+3
The description of instructions 'th.fmv.hw.x' and 'th.fmv.x.hw' of the XTheadFmv extension in T-Head specific is incorrect, and it also has some impact on the implementation of the binutils, so this patch corrects this. For details see: https://github.com/T-head-Semi/thead-extension-spec/pull/34 gas/ChangeLog: * testsuite/gas/riscv/x-thead-fmv.d: Correct test. * testsuite/gas/riscv/x-thead-fmv.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (MATCH_TH_FMV_HW_X): Correct coding. (MASK_TH_FMV_HW_X): Likewise. (MATCH_TH_FMV_X_HW): Likewise. (MASK_TH_FMV_X_HW): Likewise. opcodes/ChangeLog: * riscv-opc.c: Correct operands.
2023-12-13Make const_1_mode print $1 in AT&T syntaxCui, Lili13-128/+128
Make const_1_mode print $1 in AT&T syntax, otherwise there will be correctness issues when it is extended to support APX NDD, gas/ChangeLog: * testsuite/gas/i386/intel.d: Adjust testcase. * testsuite/gas/i386/lfence-load.d: Ditto. * testsuite/gas/i386/noreg16-data32.d: Ditto. * testsuite/gas/i386/noreg16.d: Ditto. * testsuite/gas/i386/noreg32-data16.d: Ditto. * testsuite/gas/i386/noreg32.d: Ditto. * testsuite/gas/i386/noreg64-data16.d: Ditto. * testsuite/gas/i386/noreg64-rex64.d: Ditto. * testsuite/gas/i386/noreg64.d: Ditto. * testsuite/gas/i386/opcode-suffix.d: Ditto. * testsuite/gas/i386/opcode.d: Ditto. * testsuite/gas/i386/x86-64-lfence-load.d: Ditto. * testsuite/gas/i386/x86-64-opcode.d: Ditto. opcodes/ChangeLog: * i386-dis.c (OP_I): Make const_1_mode print $1 in AT&T syntax.
2023-12-13Clean base_reg and assign correct values to regs for input_output_operand (%dx).Cui, Lili1-0/+2
For special processing of input and output operands (%dx), the state of some variables needs to be cleaned. gas/ChangeLog: * config/tc-i386.c (i386_att_operand): Assign values to regs and clean i.base_reg for input output operand (%dx).
2023-12-12Fix whitespace snafu in tc-riscv.cNick Clifton1-5/+5
2023-12-12RISC-V: Emit R_RISCV_RELAX for the la/lga pseudo instructionRui Ueyama3-0/+26
Some psABIs define a relaxation to turn a GOT load into a PC-relative address materialization. For example, the AArch64's psABI allows adrp+ldr to be rewritten to nop+adr to eliminate the memory load. This patch is part of the effort to make such optimization possible for RISC-V. For RISC-V, we use the la assembly pseudo instruction to load a symbol address from the GOT. The pseudo instruction is expanded to auipc+ld. If the address loaded by the instruction pair is actually a PC-relative link-time constant, we want the linker to rewrite the instruction pair with auipc+addi. We can't rewrite all existing auipc+ld pairs with auipc+addi in the linker because there might be code that jumps to the middle of the instruction pair. That should be extremely rare, if ever exists, but you can at least in theory write a program in assembly that jumps to the ld instruction of the instruction pair. We need a marker to identify that an auipc+ld can be safely relaxed (i.e. they are emitted for la). This patch is to annotate R_RISCV_GOT_HI20 with R_RISCV_RELAX only when the relocation is emitted for the la pseudo instruction. The linker will use it as a signal that the instruction pair can be safely relaxed. Proposal to the RISC-V psABI: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/397 gas/ * config/tc-riscv.c (source_macro): New static int variable. The identifier of the assembler macro we are expanding, if any. (append_insn): Updated source_macro to tc_fix_data, to record which macro expands, if any. (macro): Record which macro expands into source_macro. Reset source_macro to -1 at the end. (md_apply_fix): Apply R_RISCV_RELAX if pcrel_got_hi is expanded from macro LA/LGA. * config/tc-riscv.h (struct riscv_fix, TC_FIX_TYPE, TC_INIT_FIX_DATA): Defined to record source_macro into fixups for riscv target. * testsuite/gas/riscv/la-variants.d: Updated.
2023-12-12RISC-V: Resolve PCREL_HI20/LO12_I/S fixups with local symbols while `-mno-relax'Lifang Xia5-0/+187
In the scenario of generating .ko files, the kernel does not relax the .ko files. However, due to the large amount of relax and local relocation information, this increases the size of the .ko files. In this patch, it will finish the fixup of the local relocations while with `-mno-relax' option. This can reduce the size of the relocation table. The implemntation is based on the code from bfd/elfnn-riscv.c. We probably can move the code to bfd/elfxx-riscv.c, so that can reduce duplicate code, just like what we did for the architecture parser. Besides, maybe not only pcrel_hi/lo12 relocation with local symbols can be resolved at assembler time. Other pc-relative relocation, like branch, may also be able to perform related optimizations. Passed the gcc/binutils regressions of riscv-gnu-toolchain. gas/ * config/tc-riscv.c (riscv_pcrel_hi_reloc): New structure. Record all PC-relative high-part relocation that we have encountered to help us resolve the corresponding low-part relocation later. (riscv_pcrel_hi_fixup_hash): The hash table to record pcrel_hi fixups. (riscv_pcrel_fixup_hash): New function. Likewise. (riscv_pcrel_fixup_eq): Likewise. (riscv_record_pcrel_fixup): Likewise. (md_begin): Init pcrel_hi hash table. (md_apply_fix): For PCREL_HI20 relocation, do fixup and record the pcrel_hi relocs, mark as done while with `-mno-relax'. For PCREL_LO12_I/S relocation, do fixup and mark as done while with `-mno-relax'. (riscv_md_end): New function. Free pcrel_hi hash table. * config/tc-riscv.h (md_end): Define md_end with riscv_md_end. gas/ * testsuite/gas/riscv/fixup-local*: New tests.
2023-12-11LoongArch: Add support for <b ".L1"> and <beq, $t0, $t1, ".L1">mengqinggang2-0/+15
Support symbol names enclosed in double quotation marks.
2023-12-11RISC-V/gas: Clarify the definition of `relaxable' in md_apply_fixNelson Chu1-1/+1
The `relaxable' in md_apply_fix means if the relocation can be relaxed or not in link-time generally. We can use `.option relax/norelax' to enable/disable relaxations for some specific areas, so the value of `riscv_opts.relax' will be changed dynamically. The `fixP->fx_tcbit' records the correct value of `riscv_opts.relax' for every relocation. Therefore, set `relaxable' to `riscv_opts.relax' will cause unexpected behavior for the following case, .option norelax lla a1, foo1 .option relax lla a2, foo2 .option norelax lla a3, foo3 For the current assembler, the final value of `riscv_opts.relax' is false, so the second `lla a2, foo2' won't have R_RISCV_RELAX relocation, but should have. gas/ * config/tc-riscv.c (md_apply_fix): Set the value of `relaxable' to `riscv_opts.relax' is wrong. It should be `true' generally.
2023-12-01gas: drop unused fields from struct segment_info_structJan Beulich2-12/+1
user_stuff, dot, and lineno_list_{head,tail} have no users (left), while bfd_section was only ever written.
2023-12-01x86: adjust NOP generation after potential non-insnJan Beulich2-1/+13
Just like avoiding to do certain transformations potentially affected by stand-alone prefixes or direct data emission, also avoid emitting optimized NOPs right afterwards; insert a plain old NOP first in such cases.
2023-12-01x86: i386_cons_align() badly affects diagnosticsJan Beulich3-20/+3
Warning without knowing what's going to follow isn't useful, the more that appropriate warnings are emitted elsewhere in all cases. Not updating state (file/line in particular) also isn't helpful, as it's always the last directive ahead of a construct potentially needing fiddling with that's "guilty" in that fiddling being suppressed.
2023-12-01gas: no md_cons_align() for .nop{,s}Jan Beulich4-9/+17
.nop and .nops generate code, not data. Hence them invoking md_cons_align() is at best inappropriate. In fact it actually gets in the of x86'es state maintenance involving i386_cons_align().
2023-12-01x86: suppress optimization after potential non-insnJan Beulich1-0/+5
Just like avoiding to do other transformations potentially affected by stand-alone prefixes or direct data emission, also avoid optimization on the following insn.
2023-12-01x86: last-insn recording should be per-sectionJan Beulich6-58/+116
Otherwise intermediate section switches result in inconsistent behavior. Note, however, that intermediate sub-section switches will continue to result in inconsistent or even inappropriate behavior. While there also add recording of state to s_insn().
2023-12-01x86: allow 32-bit reg to be used with U{RD,WR}MSRJan Beulich1-4/+4
... as MSR index specifier: It is unreasonable to demand that people write less readable / understandable code, just because the present documentation mentions only Reg64. Whether to also adjust the disassembler is a separate question, perhaps indeed more tightly tied to what the spec says.
2023-12-01RISC-V: Update gas/NEWS for RISC-V vendor extension news.Nelson Chu1-1/+3
gas/ * NEWS: Update RISC-V vendor extension news.
2023-12-01RISC-V: Add SiFive custom vector coprocessor interface instructions v1.0Nelson Chu5-0/+147
SiFive has define as set of flexible instruction for extending vector coprocessor, it able to encoding opcode like .insn but with predefined format. List of instructions: sf.vc.x sf.vc.i sf.vc.vv sf.vc.xv sf.vc.iv sf.vc.fv sf.vc.vvv sf.vc.xvv sf.vc.ivv sf.vc.fvv sf.vc.vvw sf.vc.xvw sf.vc.ivw sf.vc.fvw sf.vc.v.x sf.vc.v.i sf.vc.v.vv sf.vc.v.xv sf.vc.v.iv sf.vc.v.fv sf.vc.v.vvv sf.vc.v.xvv sf.vc.v.ivv sf.vc.v.fvv sf.vc.v.vvw sf.vc.v.xvw sf.vc.v.ivw sf.vc.v.fvw Spec of Xsfvcp https://www.sifive.com/document-file/sifive-vector-coprocessor-interface-vcix-software Co-authored-by: Hau Hsu <hau.hsu@sifive.com> Co-authored-by: Kito Cheng <kito.cheng@sifive.com>
2023-12-01RISC-V: Zv*: Add support for Zvkb ISA extensionChristoph Müllner6-58/+48
Back then when the support for the RISC-V vector crypto extensions was merged, the specification was frozen, but not ratified. A frozen specification is allowed to change within tight bounds before ratification and this has happend with the vector crypto extensions. The following changes were applied: * A new extension Zvkb was defined, which is a strict subset of Zvbb. * Zvkn and Zvks include now Zvkb instead of Zvbb. This patch implements these changes between the frozen and the ratified specification. Note, that this technically an incompatible change of Zvkn and Zvks, but I am not aware of any project that depends on the currently implemented behaviour of Zvkn and Zvks. So this patch should be fine. Reported-By: Jerry Shih <jerry.shih@sifive.com> Reported-By: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2023-11-30MIPS/GAS: Add -march=loongson2f to loongson-2f-3 testYunQiang Su1-1/+1
On MIPSr6, the encoding of JR instruction has been chaned. This patch can fix these failures for r6 default triples: ST Microelectronics Loongson-2F workarounds of Jump Instruction issue
2023-11-30MIPS: Set r6 as default arch if vendor is imgYunQiang Su4-2/+14
This behavior is used by downstream toolchain since 2014, and has been in GCC since the same year. We don't support mips64*-img* due to GCC doesn't support it, and we believe that the multilib should be used for this case.
2023-11-30gas: support double-slash line comments in BPF assemblyJose E. Marchesi9-2/+57
This patch makes the BPF assembler to support double-slash line comments, like the llvm BPF assembler does. At this point both assemblers support the same commenting styles: - Line comments preceded by # or //. - Non-nestable block comments delimited by /* and */. This patch also adds a couple of tests to make sure all the comment styles work in both normal and pseudoc syntax. The manual is also updated to mention double-slash line comments.
2023-11-28gas: add NEWS entry for change of comment syntax in BPF assemblerJose E. Marchesi2-0/+9
2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> * NEWS: Add entry about change of comment syntax in the BPF assembler.
2023-11-28gas: change meaning of ; in the BPF assemblerJose E. Marchesi12-35/+57
The BPF assembler in clang uses semi-colon (;) to separate statements, not to be begin line comments. This patch adapts the GNU assembler accordingly. Testsuite and documentation updated accordingly. 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c: Semicolon does not start a comment, but separates multiple commands on a single line. * testsuite/gas/bpf/alu-pseudoc.s: Adapt test accordingly. * testsuite/gas/bpf/spacing-pseudoc.s: Likewise. * testsuite/gas/bpf/offset16-overflow.s: Likewise. * testsuite/gas/bpf/jump-relax-jump.s: Likewise. * testsuite/gas/bpf/jump-relax-ja.s: Likewise. * testsuite/gas/bpf/imm32-overflow.s: Likewise. * testsuite/gas/bpf/disp32-overflow.s: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.s: Likewise. * testsuite/gas/bpf/disp16-overflow.s: Likewise. * doc/c-bpf.texi (BPF Special Characters): Update.
2023-11-28testsuite: Clean up .allow_index_reg in i386 testsHaochen Jiang234-574/+350
gas/ChangeLog: * testsuite/gas/i386/adx.s: Remove .allow_index_reg. * testsuite/gas/i386/amx-complex-inval.l: Ditto. * testsuite/gas/i386/amx-complex-inval.s: Ditto. * testsuite/gas/i386/avx-ifma.s: Ditto. * testsuite/gas/i386/avx-ne-convert.s: Ditto. * testsuite/gas/i386/avx-scalar-2.s: Ditto. * testsuite/gas/i386/avx-vnni-int8.s: Ditto. * testsuite/gas/i386/avx-vnni.s: Ditto. * testsuite/gas/i386/avx-wig.s: Ditto. * testsuite/gas/i386/avx2-wig.s: Ditto. * testsuite/gas/i386/avx2.s: Ditto. * testsuite/gas/i386/avx256int.s: Ditto. * testsuite/gas/i386/avx512_4fmaps.s: Ditto. * testsuite/gas/i386/avx512_4vnniw.s: Ditto. * testsuite/gas/i386/avx512_bf16.s: Ditto. * testsuite/gas/i386/avx512_bf16_vl-inval.l: Ditto. * testsuite/gas/i386/avx512_bf16_vl-inval.s: Ditto. * testsuite/gas/i386/avx512_bf16_vl.s: Ditto. * testsuite/gas/i386/avx512_fp16-inval-bcast.l: Ditto. * testsuite/gas/i386/avx512_fp16-inval-bcast.s: Ditto. * testsuite/gas/i386/avx512_fp16.s: Ditto. * testsuite/gas/i386/avx512_fp16_pseudo_ops.s: Ditto. * testsuite/gas/i386/avx512_fp16_vl.s: Ditto. * testsuite/gas/i386/avx512_vpopcntdq.s: Ditto. * testsuite/gas/i386/avx512bitalg.s: Ditto. * testsuite/gas/i386/avx512bitalg_vl.s: Ditto. * testsuite/gas/i386/avx512bw-opts.s: Ditto. * testsuite/gas/i386/avx512bw-wig.s: Ditto. * testsuite/gas/i386/avx512bw.s: Ditto. * testsuite/gas/i386/avx512bw_vl-opts.s: Ditto. * testsuite/gas/i386/avx512bw_vl-wig.s: Ditto. * testsuite/gas/i386/avx512bw_vl.s: Ditto. * testsuite/gas/i386/avx512cd.s: Ditto. * testsuite/gas/i386/avx512cd_vl.s: Ditto. * testsuite/gas/i386/avx512dq-rcig.s: Ditto. * testsuite/gas/i386/avx512dq.s: Ditto. * testsuite/gas/i386/avx512dq_vl.s: Ditto. * testsuite/gas/i386/avx512er-rcig.s: Ditto. * testsuite/gas/i386/avx512er.s: Ditto. * testsuite/gas/i386/avx512f-opts.s: Ditto. * testsuite/gas/i386/avx512f-rcig.s: Ditto. * testsuite/gas/i386/avx512f.s: Ditto. * testsuite/gas/i386/avx512f_gfni.s: Ditto. * testsuite/gas/i386/avx512f_vaes.s: Ditto. * testsuite/gas/i386/avx512f_vl-opts.s: Ditto. * testsuite/gas/i386/avx512f_vl-wig.s: Ditto. * testsuite/gas/i386/avx512f_vl.s: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq.s: Ditto. * testsuite/gas/i386/avx512ifma.s: Ditto. * testsuite/gas/i386/avx512ifma_vl.s: Ditto. * testsuite/gas/i386/avx512pf.s: Ditto. * testsuite/gas/i386/avx512vbmi.s: Ditto. * testsuite/gas/i386/avx512vbmi2.s: Ditto. * testsuite/gas/i386/avx512vbmi2_vl.s: Ditto. * testsuite/gas/i386/avx512vbmi_vl.s: Ditto. * testsuite/gas/i386/avx512vl_gfni.s: Ditto. * testsuite/gas/i386/avx512vl_vaes.s: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq.s: Ditto. * testsuite/gas/i386/avx512vnni.s: Ditto. * testsuite/gas/i386/avx512vnni_vl.s: Ditto. * testsuite/gas/i386/bmi.s: Ditto. * testsuite/gas/i386/bmi2.s: Ditto. * testsuite/gas/i386/cldemote.s: Ditto. * testsuite/gas/i386/clflushopt.s: Ditto. * testsuite/gas/i386/clwb.s: Ditto. * testsuite/gas/i386/cmpccxadd-inval.l: Ditto. * testsuite/gas/i386/cmpccxadd-inval.s: Ditto. * testsuite/gas/i386/enqcmd-inval.l: Ditto. * testsuite/gas/i386/enqcmd-inval.s: Ditto. * testsuite/gas/i386/enqcmd.s: Ditto. * testsuite/gas/i386/evex-lig-2.s: Ditto. * testsuite/gas/i386/evex-lig.s: Ditto. * testsuite/gas/i386/evex-wig.s: Ditto. * testsuite/gas/i386/evex.s: Ditto. * testsuite/gas/i386/fma-scalar.s: Ditto. * testsuite/gas/i386/fma.s: Ditto. * testsuite/gas/i386/fma4.s: Ditto. * testsuite/gas/i386/gfni.s: Ditto. * testsuite/gas/i386/hle.s: Ditto. * testsuite/gas/i386/ilp32/enqcmd.s: Ditto. * testsuite/gas/i386/ilp32/movdir.s: Ditto. * testsuite/gas/i386/lwp.s: Ditto. * testsuite/gas/i386/movdir.s: Ditto. * testsuite/gas/i386/movdir64b-reg.l: Ditto. * testsuite/gas/i386/movdir64b-reg.s: Ditto. * testsuite/gas/i386/mpx-inval-1.l: Ditto. * testsuite/gas/i386/mpx-inval-1.s: Ditto. * testsuite/gas/i386/mpx.s: Ditto. * testsuite/gas/i386/msrlist-inval.l: Ditto. * testsuite/gas/i386/msrlist-inval.s: Ditto. * testsuite/gas/i386/notrack.s: Ditto. * testsuite/gas/i386/notrackbad.l: Ditto. * testsuite/gas/i386/notrackbad.s: Ditto. * testsuite/gas/i386/optimize-1.s: Ditto. * testsuite/gas/i386/optimize-2.s: Ditto. * testsuite/gas/i386/optimize-3.s: Ditto. * testsuite/gas/i386/optimize-6.s: Ditto. * testsuite/gas/i386/optimize-6a.l: Ditto. * testsuite/gas/i386/optimize-7.l: Ditto. * testsuite/gas/i386/optimize-7.s: Ditto. * testsuite/gas/i386/opts.s: Ditto. * testsuite/gas/i386/prefetchwt1.s: Ditto. * testsuite/gas/i386/raoint.s: Ditto. * testsuite/gas/i386/sha.s: Ditto. * testsuite/gas/i386/sse2avx.s: Ditto. * testsuite/gas/i386/tbm.s: Ditto. * testsuite/gas/i386/vaes.s: Ditto. * testsuite/gas/i386/vex-lig-2.s: Ditto. * testsuite/gas/i386/vp2intersect-inval-bcast.l: Ditto. * testsuite/gas/i386/vp2intersect-inval-bcast.s: Ditto. * testsuite/gas/i386/vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-adx.s: Ditto. * testsuite/gas/i386/x86-64-amx-complex.s: Ditto. * testsuite/gas/i386/x86-64-amx-fp16.s: Ditto. * testsuite/gas/i386/x86-64-avx-ifma.s: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert.s: Ditto. * testsuite/gas/i386/x86-64-avx-scalar-2.s: Ditto. * testsuite/gas/i386/x86-64-avx-swap.s: Ditto. * testsuite/gas/i386/x86-64-avx-vnni-int8.s: Ditto. * testsuite/gas/i386/x86-64-avx-vnni.s: Ditto. * testsuite/gas/i386/x86-64-avx-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx2-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx2.s: Ditto. * testsuite/gas/i386/x86-64-avx256int.s: Ditto. * testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto. * testsuite/gas/i386/x86-64-avx512_4vnniw.s: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16.s: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.l: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.s: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.l: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-register.l: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-inval-register.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.s: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg.s: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512cd.s: Ditto. * testsuite/gas/i386/x86-64-avx512cd_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512dq-rcig.s: Ditto. * testsuite/gas/i386/x86-64-avx512dq.s: Ditto. * testsuite/gas/i386/x86-64-avx512dq_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512er-rcig.s: Ditto. * testsuite/gas/i386/x86-64-avx512er.s: Ditto. * testsuite/gas/i386/x86-64-avx512f-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512f-rcig.s: Ditto. * testsuite/gas/i386/x86-64-avx512f.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_gfni.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-opts.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-wig.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512ifma.s: Ditto. * testsuite/gas/i386/x86-64-avx512ifma_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512pf.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_gfni.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.s: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-avx512vnni.s: Ditto. * testsuite/gas/i386/x86-64-avx512vnni_vl.s: Ditto. * testsuite/gas/i386/x86-64-avx_gfni.s: Ditto. * testsuite/gas/i386/x86-64-bmi.s: Ditto. * testsuite/gas/i386/x86-64-bmi2.s: Ditto. * testsuite/gas/i386/x86-64-cldemote.s: Ditto. * testsuite/gas/i386/x86-64-clflushopt.s: Ditto. * testsuite/gas/i386/x86-64-clwb.s: Ditto. * testsuite/gas/i386/x86-64-cmpccxadd.s: Ditto. * testsuite/gas/i386/x86-64-enqcmd-inval.l: Ditto. * testsuite/gas/i386/x86-64-enqcmd-inval.s: Ditto. * testsuite/gas/i386/x86-64-enqcmd.s: Ditto. * testsuite/gas/i386/x86-64-evex-lig-2.s: Ditto. * testsuite/gas/i386/x86-64-evex-lig.s: Ditto. * testsuite/gas/i386/x86-64-evex-wig.s: Ditto. * testsuite/gas/i386/x86-64-evex-wig2.s: Ditto. * testsuite/gas/i386/x86-64-fma-scalar.s: Ditto. * testsuite/gas/i386/x86-64-fma.s: Ditto. * testsuite/gas/i386/x86-64-fma4.s: Ditto. * testsuite/gas/i386/x86-64-fred.s: Ditto. * testsuite/gas/i386/x86-64-gfni.s: Ditto. * testsuite/gas/i386/x86-64-hle.s: Ditto. * testsuite/gas/i386/x86-64-lkgs.s: Ditto. * testsuite/gas/i386/x86-64-lwp.s: Ditto. * testsuite/gas/i386/x86-64-movdir.s: Ditto. * testsuite/gas/i386/x86-64-movdir64b-reg.l: Ditto. * testsuite/gas/i386/x86-64-movdir64b-reg.s: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-1.l: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-1.s: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-2.l: Ditto. * testsuite/gas/i386/x86-64-mpx-inval-2.s: Ditto. * testsuite/gas/i386/x86-64-mpx.s: Ditto. * testsuite/gas/i386/x86-64-notrack.s: Ditto. * testsuite/gas/i386/x86-64-notrackbad.l: Ditto. * testsuite/gas/i386/x86-64-notrackbad.s: Ditto. * testsuite/gas/i386/x86-64-optimize-1.s: Ditto. * testsuite/gas/i386/x86-64-optimize-2.s: Ditto. * testsuite/gas/i386/x86-64-optimize-3.s: Ditto. * testsuite/gas/i386/x86-64-optimize-4.s: Ditto. * testsuite/gas/i386/x86-64-optimize-7.s: Ditto. * testsuite/gas/i386/x86-64-optimize-7a.l: Ditto. * testsuite/gas/i386/x86-64-optimize-8.l: Ditto. * testsuite/gas/i386/x86-64-optimize-8.s: Ditto. * testsuite/gas/i386/x86-64-opts.s: Ditto. * testsuite/gas/i386/x86-64-prefetchi-warn.s: Ditto. * testsuite/gas/i386/x86-64-prefetchi.s: Ditto. * testsuite/gas/i386/x86-64-prefetchwt1.s: Ditto. * testsuite/gas/i386/x86-64-raoint.s: Ditto. * testsuite/gas/i386/x86-64-sha.s: Ditto. * testsuite/gas/i386/x86-64-sse2avx.s: Ditto. * testsuite/gas/i386/x86-64-tbm.s: Ditto. * testsuite/gas/i386/x86-64-vaes.s: Ditto. * testsuite/gas/i386/x86-64-vex-lig-2.s: Ditto. * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.l: Ditto. * testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq.s: Ditto. * testsuite/gas/i386/x86-64-xop.s: Ditto. * testsuite/gas/i386/x86-64-xsavec.s: Ditto. * testsuite/gas/i386/x86-64-xsaves.s: Ditto. * testsuite/gas/i386/xop.s: Ditto. * testsuite/gas/i386/xsavec.s: Ditto. * testsuite/gas/i386/xsaves.s: Ditto.
2023-11-28testsuite: Clean up #as in dump file for i386 testsHaochen Jiang262-262/+0
gas/ChangeLog: * testsuite/gas/i386/avx-gather-intel.d: Remove unused #as. * testsuite/gas/i386/avx-gather.d: Ditto. * testsuite/gas/i386/avx-ifma-intel.d: Ditto. * testsuite/gas/i386/avx-ifma.d: Ditto. * testsuite/gas/i386/avx-ne-convert-intel.d: Ditto. * testsuite/gas/i386/avx-ne-convert.d: Ditto. * testsuite/gas/i386/avx-vnni-int8-intel.d: Ditto. * testsuite/gas/i386/avx-vnni-int8.d: Ditto. * testsuite/gas/i386/avx512_bf16.d: Ditto. * testsuite/gas/i386/avx512_bf16_vl.d: Ditto. * testsuite/gas/i386/avx512_fp16-intel.d: Ditto. * testsuite/gas/i386/avx512_fp16.d: Ditto. * testsuite/gas/i386/avx512_fp16_pseudo_ops.d: Ditto. * testsuite/gas/i386/avx512_fp16_vl-intel.d: Ditto. * testsuite/gas/i386/avx512_fp16_vl.d: Ditto. * testsuite/gas/i386/avx512_vpopcntdq-intel.d: Ditto. * testsuite/gas/i386/avx512_vpopcntdq.d: Ditto. * testsuite/gas/i386/avx512bitalg-intel.d: Ditto. * testsuite/gas/i386/avx512bitalg.d: Ditto. * testsuite/gas/i386/avx512bitalg_vl-intel.d: Ditto. * testsuite/gas/i386/avx512bitalg_vl.d: Ditto. * testsuite/gas/i386/avx512bw-opts-intel.d: Ditto. * testsuite/gas/i386/avx512bw-opts.d: Ditto. * testsuite/gas/i386/avx512bw_vl-intel.d: Ditto. * testsuite/gas/i386/avx512bw_vl-opts-intel.d: Ditto. * testsuite/gas/i386/avx512bw_vl-opts.d: Ditto. * testsuite/gas/i386/avx512bw_vl.d: Ditto. * testsuite/gas/i386/avx512cd-intel.d: Ditto. * testsuite/gas/i386/avx512cd.d: Ditto. * testsuite/gas/i386/avx512cd_vl-intel.d: Ditto. * testsuite/gas/i386/avx512cd_vl.d: Ditto. * testsuite/gas/i386/avx512dq-intel.d: Ditto. * testsuite/gas/i386/avx512dq.d: Ditto. * testsuite/gas/i386/avx512dq_vl-intel.d: Ditto. * testsuite/gas/i386/avx512dq_vl.d: Ditto. * testsuite/gas/i386/avx512er-intel.d: Ditto. * testsuite/gas/i386/avx512er.d: Ditto. * testsuite/gas/i386/avx512f-nondef.d: Ditto. * testsuite/gas/i386/avx512f-opts-intel.d: Ditto. * testsuite/gas/i386/avx512f-opts.d: Ditto. * testsuite/gas/i386/avx512f_gfni-intel.d: Ditto. * testsuite/gas/i386/avx512f_gfni.d: Ditto. * testsuite/gas/i386/avx512f_vaes-intel.d: Ditto. * testsuite/gas/i386/avx512f_vaes.d: Ditto. * testsuite/gas/i386/avx512f_vl-intel.d: Ditto. * testsuite/gas/i386/avx512f_vl-opts-intel.d: Ditto. * testsuite/gas/i386/avx512f_vl-opts.d: Ditto. * testsuite/gas/i386/avx512f_vl.d: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/avx512f_vpclmulqdq.d: Ditto. * testsuite/gas/i386/avx512ifma-intel.d: Ditto. * testsuite/gas/i386/avx512ifma.d: Ditto. * testsuite/gas/i386/avx512ifma_vl-intel.d: Ditto. * testsuite/gas/i386/avx512ifma_vl.d: Ditto. * testsuite/gas/i386/avx512pf-intel.d: Ditto. * testsuite/gas/i386/avx512pf.d: Ditto. * testsuite/gas/i386/avx512vbmi-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi.d: Ditto. * testsuite/gas/i386/avx512vbmi2-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi2.d: Ditto. * testsuite/gas/i386/avx512vbmi2_vl-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi2_vl.d: Ditto. * testsuite/gas/i386/avx512vbmi_vl-intel.d: Ditto. * testsuite/gas/i386/avx512vbmi_vl.d: Ditto. * testsuite/gas/i386/avx512vl_gfni-intel.d: Ditto. * testsuite/gas/i386/avx512vl_gfni.d: Ditto. * testsuite/gas/i386/avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vaes.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/avx512vl_vpclmulqdq.d: Ditto. * testsuite/gas/i386/avx512vnni-intel.d: Ditto. * testsuite/gas/i386/avx512vnni.d: Ditto. * testsuite/gas/i386/avx512vnni_vl-intel.d: Ditto. * testsuite/gas/i386/avx512vnni_vl.d: Ditto. * testsuite/gas/i386/bmi-intel.d: Ditto. * testsuite/gas/i386/bmi.d: Ditto. * testsuite/gas/i386/bmi2-intel.d: Ditto. * testsuite/gas/i386/bmi2.d: Ditto. * testsuite/gas/i386/cldemote-intel.d: Ditto. * testsuite/gas/i386/cldemote.d: Ditto. * testsuite/gas/i386/clflushopt-intel.d: Ditto. * testsuite/gas/i386/clflushopt.d: Ditto. * testsuite/gas/i386/clwb-intel.d: Ditto. * testsuite/gas/i386/clwb.d: Ditto. * testsuite/gas/i386/enqcmd-intel.d: Ditto. * testsuite/gas/i386/enqcmd.d: Ditto. * testsuite/gas/i386/gfni-intel.d: Ditto. * testsuite/gas/i386/gfni.d: Ditto. * testsuite/gas/i386/hreset.d: Ditto. * testsuite/gas/i386/invpcid-intel.d: Ditto. * testsuite/gas/i386/invpcid.d: Ditto. * testsuite/gas/i386/keylocker-intel.d: Ditto. * testsuite/gas/i386/keylocker.d: Ditto. * testsuite/gas/i386/movdir-intel.d: Ditto. * testsuite/gas/i386/movdir.d: Ditto. * testsuite/gas/i386/pr27198.d: Ditto. * testsuite/gas/i386/pr30248.d: Ditto. * testsuite/gas/i386/prefetchwt1-intel.d: Ditto. * testsuite/gas/i386/prefetchwt1.d: Ditto. * testsuite/gas/i386/ptwrite-intel.d: Ditto. * testsuite/gas/i386/ptwrite.d: Ditto. * testsuite/gas/i386/raoint-intel.d: Ditto. * testsuite/gas/i386/raoint.d: Ditto. * testsuite/gas/i386/serialize.d: Ditto. * testsuite/gas/i386/tbm-intel.d: Ditto. * testsuite/gas/i386/tdx.d: Ditto. * testsuite/gas/i386/tsxldtrk.d: Ditto. * testsuite/gas/i386/vp2intersect-intel.d: Ditto. * testsuite/gas/i386/vp2intersect.d: Ditto. * testsuite/gas/i386/vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/vpclmulqdq.d: Ditto. * testsuite/gas/i386/waitpkg-intel.d: Ditto. * testsuite/gas/i386/waitpkg.d: Ditto. * testsuite/gas/i386/wrmsrns-intel.d: Ditto. * testsuite/gas/i386/wrmsrns.d: Ditto. * testsuite/gas/i386/x86-64-amx-bad.d: Ditto. * testsuite/gas/i386/x86-64-amx-complex-bad.d: Ditto. * testsuite/gas/i386/x86-64-amx-complex-intel.d: Ditto. * testsuite/gas/i386/x86-64-amx-complex.d: Ditto. * testsuite/gas/i386/x86-64-amx-fp16-bad.d: Ditto. * testsuite/gas/i386/x86-64-amx-fp16-intel.d: Ditto. * testsuite/gas/i386/x86-64-amx-fp16.d: Ditto. * testsuite/gas/i386/x86-64-amx-intel.d: Ditto. * testsuite/gas/i386/x86-64-amx.d: Ditto. * testsuite/gas/i386/x86-64-avx-gather-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-gather.d: Ditto. * testsuite/gas/i386/x86-64-avx-ifma-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-ifma.d: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-ne-convert.d: Ditto. * testsuite/gas/i386/x86-64-avx-vnni-int8-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx-vnni-int8.d: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16.d: Ditto. * testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-bad.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512_fp16_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512_vpopcntdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bitalg_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512bw_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512cd_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512dq_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512er-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512er.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-nondef.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512f.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_gfni.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-opts-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl-opts.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512f_vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512ifma_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512pf-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512pf.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi2_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vbmi_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_gfni.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vaes.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vl_vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni_vl-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx512vnni_vl.d: Ditto. * testsuite/gas/i386/x86-64-avx_gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx_gfni.d: Ditto. * testsuite/gas/i386/x86-64-bmi-intel.d: Ditto. * testsuite/gas/i386/x86-64-bmi.d: Ditto. * testsuite/gas/i386/x86-64-bmi2-intel.d: Ditto. * testsuite/gas/i386/x86-64-bmi2.d: Ditto. * testsuite/gas/i386/x86-64-cldemote-intel.d: Ditto. * testsuite/gas/i386/x86-64-cldemote.d: Ditto. * testsuite/gas/i386/x86-64-clflushopt-intel.d: Ditto. * testsuite/gas/i386/x86-64-clflushopt.d: Ditto. * testsuite/gas/i386/x86-64-clwb-intel.d: Ditto. * testsuite/gas/i386/x86-64-clwb.d: Ditto. * testsuite/gas/i386/x86-64-cmpccxadd-intel.d: Ditto. * testsuite/gas/i386/x86-64-cmpccxadd.d: Ditto. * testsuite/gas/i386/x86-64-fred-intel.d: Ditto. * testsuite/gas/i386/x86-64-fred.d: Ditto. * testsuite/gas/i386/x86-64-gfni-intel.d: Ditto. * testsuite/gas/i386/x86-64-gfni.d: Ditto. * testsuite/gas/i386/x86-64-hreset.d: Ditto. * testsuite/gas/i386/x86-64-invpcid-intel.d: Ditto. * testsuite/gas/i386/x86-64-invpcid.d: Ditto. * testsuite/gas/i386/x86-64-keylocker-intel.d: Ditto. * testsuite/gas/i386/x86-64-keylocker.d: Ditto. * testsuite/gas/i386/x86-64-lkgs-intel.d: Ditto. * testsuite/gas/i386/x86-64-lkgs.d: Ditto. * testsuite/gas/i386/x86-64-movsxd-intel.d: Ditto. * testsuite/gas/i386/x86-64-movsxd.d: Ditto. * testsuite/gas/i386/x86-64-msrlist-intel.d: Ditto. * testsuite/gas/i386/x86-64-msrlist.d: Ditto. * testsuite/gas/i386/x86-64-prefetchi-intel.d: Ditto. * testsuite/gas/i386/x86-64-prefetchi.d: Ditto. * testsuite/gas/i386/x86-64-prefetchwt1-intel.d: Ditto. * testsuite/gas/i386/x86-64-prefetchwt1.d: Ditto. * testsuite/gas/i386/x86-64-ptwrite-intel.d: Ditto. * testsuite/gas/i386/x86-64-ptwrite.d: Ditto. * testsuite/gas/i386/x86-64-raoint-intel.d: Ditto. * testsuite/gas/i386/x86-64-raoint.d: Ditto. * testsuite/gas/i386/x86-64-serialize.d: Ditto. * testsuite/gas/i386/x86-64-sysenter.d: Ditto. * testsuite/gas/i386/x86-64-tbm-intel.d: Ditto. * testsuite/gas/i386/x86-64-tdx.d: Ditto. * testsuite/gas/i386/x86-64-tsxldtrk.d: Ditto. * testsuite/gas/i386/x86-64-uintr.d: Ditto. * testsuite/gas/i386/x86-64-vp2intersect-intel.d: Ditto. * testsuite/gas/i386/x86-64-vp2intersect.d: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq-intel.d: Ditto. * testsuite/gas/i386/x86-64-vpclmulqdq.d: Ditto. * testsuite/gas/i386/x86-64-waitpkg-intel.d: Ditto. * testsuite/gas/i386/x86-64-waitpkg.d: Ditto. * testsuite/gas/i386/x86-64-wrmsrns-intel.d: Ditto. * testsuite/gas/i386/x86-64-wrmsrns.d: Ditto. * testsuite/gas/i386/x86-64-xsavec-intel.d: Ditto. * testsuite/gas/i386/x86-64-xsavec.d: Ditto. * testsuite/gas/i386/x86-64-xsaves-intel.d: Ditto. * testsuite/gas/i386/x86-64-xsaves.d: Ditto. * testsuite/gas/i386/xsavec-intel.d: Ditto. * testsuite/gas/i386/xsavec.d: Ditto. * testsuite/gas/i386/xsaves-intel.d: Ditto. * testsuite/gas/i386/xsaves.d: Ditto.
2023-11-27as: Add new estimated reciprocal instructions in LoongArch v1.1Jiajie Chen4-0/+24
New estimated reciprocal instructions in LoongArch v1.1: - frecipe.s/d - frsqrte.s/d - vfrecipe.s/d - vfrsqrte.s/d - xvfrecipe.s/d - xvfrsqrte.s/d Signed-off-by: Jiajie Chen <c@jia.je>
2023-11-27as: Add new atomic instructions in LoongArch v1.1Jiajie Chen3-2/+88
LoongArch V1.1 release is out at https://github.com/loongson/LoongArch-Documentation. New atomic instructions in LoongArch v1.1: - sc.q - llacq.w/d - screl.w/d - amcas{_db}.b/h/w/d - amswap{_db}.b/h - amadd{_db}.b/h Signed-off-by: Jiajie Chen <c@jia.je>
2023-11-24x86: shrink opcode sets tableJan Beulich2-130/+130
Have i386-gen produce merely the offsets into i386_optab[]. Besides allowing to shrink the table even on 32-bit builds, this results in removing a level of indirection from the frequently accessed current_templates, in return for adding a level of indirection when looking up mnemonics (commonly happening just once per insn). Plus for PIE builds of gas it also reduces the number of relocations by about two thousand. Finally a somewhat ugly static variable can also be eliminated from i386_displacement().
2023-11-24x86: also prefer VEX encoding over EVEX one for VCVTNEPS2BF16 when possibleJan Beulich3-13/+62
Deal with what 58bceb182740 ("x86: prefer VEX encodings over EVEX ones when possible") left out, for being slightly less straightforward.
2023-11-24RISC-V: reduce redundancy in sign/zero extension macro insn handlingJan Beulich1-16/+5
Fold M_{S,Z}EXTH, deriving signed-ness from the incoming mnemonic. Fold riscv_ext()'s calls md_assemblef(), the first of which were entirely identical, while the other pair differed in just a single character. Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-11-24RISC-V: disallow x0 with certain macro-insnsJan Beulich2-3/+6
While for some of the macro insns using x0 is kind of okay, as they would merely resolve to a sequence of hint insns (and hence not cause misbehavior at runtime), several of them have the degenerate AUIPC followed by a load, store, or branch using other than the designated symbol as address and hence causing runtime issues. Refuse to assemble those, leveraging that the matching function so far wasn't really used for macro insns: NULL is now allowed, indicating a match (which imo is preferable over converting match_never() to match_always()), while other matching functions now (also) used for macro insns need to avoid calling match_opcode(). Note that for LA the restriction is slightly too strict: In non-PIC mode using x0 would be okay-ish as per above (as it's just LLA there). Yet libopcodes doesn't know what mode gas is presently assembling for, so we want to err on the safe side. Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
generated by cgit v1.1 at 2024-10-03 08:34:33 +0000