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2020-10-22[PATCH][GAS][AArch64] Define BRBE system registersPrzemyslaw Wirkus6-2/+425
2020-10-22aarch64: Define CSRE system registersPrzemyslaw Wirkus6-1/+70
2020-10-22arm: Fix the wrong error message string for mve vldr/vstr (PR26763).Srinath Parvathaneni5-1/+864
2020-10-22Fix printf formatting errors where "0x" is used as a prefix for a decimal num...Dr. David Alan Gilbert3-3522/+3347
2020-10-21aarch64: Add testcase for HCR_EL2 system registerPrzemyslaw Wirkus2-0/+11
2020-10-20Add AMD znver3 processor supportGanesh Gopalasubramanian18-3/+263
2020-10-17gas: Add a -gdwarf-5 debug_line test with .s fileH.J. Lu4-0/+62
2020-10-17gas: Replace dwarf5-line-2.S with dwarf5-line-3.SH.J. Lu3-4/+12
2020-10-17gas: Always use as_where for preprocessed assembly codesH.J. Lu7-19/+155
2020-10-16gas: Reuse the input file entry in the file tableH.J. Lu5-19/+84
2020-10-16Enhancement for avx-vnni patchCui,Lili11-28/+41
2020-10-14x86: Support Intel AVX VNNIH.J. Lu9-2/+171
2020-10-14x86: Add support for Intel HRESET instructionLili Cui8-1/+50
2020-10-14x86: Support Intel UINTRLili Cui7-1/+46
2020-10-14x86: Remove the prefix byte from non-VEX/EVEX base_opcodeH.J. Lu2-24/+29
2020-10-13x86: Rename VexOpcode to OpcodePrefixH.J. Lu2-30/+53
2020-10-09x86: Support GNU_PROPERTY_X86_ISA_1_V[234] markerH.J. Lu34-123/+218
2020-10-06aarch64: Fix bogus type punning in parse_barrier() [PR26699]Alex Coplan4-7/+11
2020-10-06A small set of code improvements for the Z80 assembler.Sergey Belyashav2-7/+33
2020-10-06Fix gas sh-link-zero test for hppa64-hpuxAlan Modra2-7/+11
2020-10-05[PATCH][GAS][AArch64] Update Cortex-X1 feature flagsPrzemyslaw Wirkus1-2/+6
2020-10-05[PATCH][GAS][arm] Update Cortex-X1 feature flagsPrzemyslaw Wirkus1-1/+1
2020-10-05Add NetBSD AArch64 GAS support.Kamil Rytarowski2-0/+5
2020-10-05Fix spelling mistakesSamanta Navarro3-2/+7
2020-10-05i386: Allow non-absolute segment values for lcall/ljmpT.K. Chia8-6/+67
2020-10-05x86-64: Always display suffix for %LQ in 64bitH.J. Lu5-4/+13
2020-10-05x86: Clear modrm if not neededH.J. Lu4-0/+14
2020-10-05GAS: Update the .section directive so that a numeric section index can be pro...Nick Clifton9-33/+86
2020-10-03x86: Update register operand check for AddrPrefixOpRegH.J. Lu19-60/+196
2020-10-02arm: add support for Cortex-A78 and Cortex-A78AEPrzemyslaw Wirkus5-0/+22
2020-10-02Fix the mve-vcvtne-it assembler test for the arm-*-pe targets.Nick Clifton2-1/+7
2020-10-01Add new directive to GAS: .attach_to_group.Nick Clifton11-1/+108
2020-09-30x86: Check register operand for AddrPrefixOpRegH.J. Lu8-34/+114
2020-09-30[GAS][AArch64] Add support for Cortex-A78 and Cortex-A78AEPrzemyslaw Wirkus4-0/+24
2020-09-30NEWS: Mention recent Arm CPU supportAlex Coplan2-0/+9
2020-09-30aarch64: Add support for Neoverse N2 CPUAlex Coplan3-0/+16
2020-09-30gcc-4.4.7 warning fixesAlan Modra3-3/+10
2020-09-29Add a note about recent changes to the AArch64 assembler: TRBE, ETE and ETMv4...Przemyslaw Wirkus2-0/+15
2020-09-28This patch adds support for Cortex-X1 for ARM.Przemyslaw Wirkus4-0/+16
2020-09-28This patch introduces ETMv4 (Embedded Trace Macrocell) system registers for t...Przemyslaw Wirkus14-9/+933
2020-09-28This patch adds support for Cortex-X1Przemyslaw Wirkus3-1/+10
2020-09-28This patch introduces ETE (Embedded Trace Extension) system registers for the...Przemyslaw Wirkus3-0/+38
2020-09-28This patch introduces TRBE (Trace Buffer Extension) system registers for the ...Przemyslaw Wirkus6-0/+52
2020-09-28arm: Add missing Neoverse V1 featureAlex Coplan2-1/+7
2020-09-28aarch64: Neoverse V1 tweaksAlex Coplan2-8/+14
2020-09-26ubsan: opcodes/csky-opc.h:929 shift exponent 536870912Alan Modra2-48/+51
2020-09-24RISC-V: Error for relaxable branch in absolute section.Jim Wilson5-0/+23
2020-09-24readelf: Show Unit Type for DWARF5Mark Wielaard2-0/+5
2020-09-24arm: Add support for Neoverse V1 CPUAlex Coplan3-0/+9
2020-09-24aarch64: Add support for Neoverse V1 CPUAlex Coplan3-0/+14
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