| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2024-02-24 | PR25333, GAS is slow processing -fdebug-types-sections | Alan Modra | 6 | -21/+15 |
| 2024-02-23 | x86: also permit YMM/ZMM use in CFI directives | Jan Beulich | 5 | -34/+422 |
| 2024-02-23 | x86/APX: INV{EPT,PCID,VPID} are WIG | Jan Beulich | 4 | -12/+342 |
| 2024-02-23 | LoongArch: gas: Try to avoid R_LARCH_ALIGN associate with a symbol | mengqinggang | 2 | -31/+53 |
| 2024-02-21 | aarch64: testsuite: move sysreg tests into sysreg sub-directory | Matthieu Longo | 79 | -0/+23 |
| 2024-02-20 | kvx: gas: rename: or -> ior, xor -> eor | Paul Iannetta | 12 | -680/+680 |
| 2024-02-20 | kvx: gas: move the splat modifier to the immediate | Paul Iannetta | 12 | -4326/+4358 |
| 2024-02-20 | kvx: gas: fix the detection of negative powers of 2 | Paul Iannetta | 2 | -0/+19 |
| 2024-02-20 | bpf: gas: add missing indcall-badoperand.* test files | Jose E. Marchesi | 3 | -0/+14 |
| 2024-02-19 | bpf: fix bpf expression parsing regression in GAS | Will Hawkins | 1 | -0/+3 |
| 2024-02-19 | arm: Add support for Armv9.5-A | Claudio Bantaloukas | 2 | -0/+22 |
| 2024-02-19 | aarch64: Add support for the id_aa64isar3_el1 system register | Yury Khrustalev | 5 | -0/+8 |
| 2024-02-16 | x86: don't use VexWIG in SSE2AVX templates | Jan Beulich | 1 | -2/+2 |
| 2024-02-16 | SCFI: correct test names | Jan Beulich | 2 | -2/+2 |
| 2024-02-15 | objdump, as: add callx support for BPF CPU v1 | Will Hawkins | 2 | -4/+4 |
| 2024-02-09 | x86/APX: V{BROADCAST,EXTRACT,INSERT}{F,I}128 can also be expressed | Jan Beulich | 3 | -0/+18 |
| 2024-02-08 | gas: scfi: fix failing test on Solaris2 | Indu Bhagat | 1 | -2/+22 |
| 2024-02-08 | x86-64: Add R_X86_64_CODE_6_GOTTPOFF | H.J. Lu | 2 | -0/+14 |
| 2024-02-06 | gas: x86: ginsn: handle sub-QWORD ALU with imm and MOV ops correctly | Indu Bhagat | 4 | -96/+126 |
| 2024-02-06 | x86: Warn .insn instruction with length > 15 bytes | H.J. Lu | 2 | -0/+11 |
| 2024-02-04 | LoongArch: gas: Fix the types of symbols referred with %le_*_r in the symtab | Xi Ruoyao | 2 | -0/+9 |
| 2024-02-02 | x86: Disallow instructions with length > 15 bytes | H.J. Lu | 5 | -30/+38 |
| 2024-02-02 | x86: actually implement .noopt | Jan Beulich | 5 | -18/+33 |
| 2024-02-01 | gas: x86: ginsn: adjust ginsns for certain lea ops | Indu Bhagat | 3 | -0/+77 |
| 2024-01-29 | bpf: there is no ldinddw nor ldabsdw instructions | Jose E. Marchesi | 6 | -97/+82 |
| 2024-01-26 | gas: scfi: untraceable control flow should be a hard error | Indu Bhagat | 2 | -9/+11 |
| 2024-01-26 | x86: testsuite: scfi: adjust COFI testcase | Indu Bhagat | 5 | -14/+37 |
| 2024-01-26 | x86: make "-msyntax=intel -mnaked-reg" match ".intel_syntax noprefix" | Jan Beulich | 5 | -3/+12 |
| 2024-01-26 | x86/APX: optimize MOVBE | Jan Beulich | 2 | -0/+6 |
| 2024-01-26 | LoongArch: gas: Add support for s9 register | mengqinggang | 3 | -0/+4 |
| 2024-01-24 | LoongArch: gas: Start a new frag after instructions that can be relaxed | mengqinggang | 2 | -0/+79 |
| 2024-01-24 | LoongArch: gas: Don't define LoongArch .align | mengqinggang | 3 | -0/+7 |
| 2024-01-22 | LoongArch: Use tab to indent assembly in TLSDESC test suite | Tatsuyuki Ishi | 2 | -2/+2 |
| 2024-01-22 | x86/APX: also amend the PUSH2/POP2 testcase | Jan Beulich | 2 | -0/+2 |
| 2024-01-21 | LoongArch: Do not emit R_LARCH_RELAX for two register macros | mengqinggang | 2 | -111/+98 |
| 2024-01-19 | Update x86/APX: VROUND{P,S}{S,D} can generally be encoded | H.J. Lu | 2 | -0/+2 |
| 2024-01-19 | x86/APX: VROUND{P,S}{S,D} can generally be encoded | Jan Beulich | 5 | -8/+20 |
| 2024-01-19 | x86/APX: be consistent with insn suffixes | Jan Beulich | 1 | -43/+43 |
| 2024-01-19 | x86: support APX forms of U{RD,WR}MSR | Jan Beulich | 3 | -0/+20 |
| 2024-01-15 | x86-64: Skip SCFI tests for x32 targets | H.J. Lu | 1 | -1/+1 |
| 2024-01-15 | aarch64: rcpc3: Add FP load/store insns | Victor Do Nascimento | 5 | -0/+90 |
| 2024-01-15 | aarch64: rcpc3: Add integer load/store insns | Victor Do Nascimento | 6 | -2/+65 |
| 2024-01-15 | aarch64: Fix tlbi and tlbip instructions | Andrew Carlotti | 8 | -142/+231 |
| 2024-01-15 | aarch64: Add SVE2.1 Contiguous load/store instructions. | Srinath Parvathaneni | 3 | -0/+43 |
| 2024-01-15 | PATCH 5/6][Binutils] aarch64: Add SVE2.1 fmin and fmax instructions. | Srinath Parvathaneni | 3 | -0/+79 |
| 2024-01-15 | aarch64: Add SVE2.1 dupq, eorqv and extq instructions. | Srinath Parvathaneni | 3 | -0/+62 |
| 2024-01-15 | aarch64: Add support for FEAT_SVE2p1. | Srinath Parvathaneni | 4 | -0/+128 |
| 2024-01-15 | aarch64: Add support for FEAT_SME2p1 instructions. | Srinath Parvathaneni | 2 | -0/+81 |
| 2024-01-15 | aarch64: Add support for FEAT_B16B16 instructions. | Srinath Parvathaneni | 4 | -0/+319 |
| 2024-01-15 | gas: testsuite: add an x86 testsuite for SCFI | Indu Bhagat | 129 | -0/+3074 |
