Age | Commit message (Expand) | Author | Files | Lines |
2019-07-19 | [AArch64] Rename +bitperm to +sve2-bitperm | Richard Sandiford | 1 | -1/+1 |
2019-07-02 | This patch fixes a bug in the AArch64 assembler where an incorrect structural... | Barnaby Wilks | 1 | -0/+9 |
2019-05-24 | aarch64: override default elf .set handling in gas | Szabolcs Nagy | 1 | -0/+32 |
2019-05-24 | aarch64: handle .variant_pcs directive in gas | Szabolcs Nagy | 1 | -0/+23 |
2019-05-14 | A series of fixes to addres problems detected by compiling the assembler with... | Nick Clifton | 1 | -3/+0 |
2019-05-09 | [binutils][aarch64] New SVE_SHLIMM_UNPRED_22 operand. | Matthew Malcomson | 1 | -0/+1 |
2019-05-09 | [binutils][aarch64] New SVE_Zm4_11_INDEX operand. | Matthew Malcomson | 1 | -0/+1 |
2019-05-09 | [binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand. | Matthew Malcomson | 1 | -0/+1 |
2019-05-09 | [binutils][aarch64] New SVE_ADDR_ZX operand. | Matthew Malcomson | 1 | -4/+48 |
2019-05-09 | [binutils][aarch64] New SVE_Zm3_11_INDEX operand. | Matthew Malcomson | 1 | -0/+1 |
2019-05-09 | [binutils][aarch64] Introduce SVE_IMM_ROT3 operand. | Matthew Malcomson | 1 | -0/+1 |
2019-05-09 | [binutils][aarch64] SVE2 feature extension flags. | Matthew Malcomson | 1 | -0/+13 |
2019-05-01 | [BINUTILS, AArch64] Enable Transactional Memory Extension | Sudakshina Das | 1 | -0/+3 |
2019-04-11 | [BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructions | Sudakshina Das | 1 | -0/+2 |
2019-04-10 | te-cloudabi.h | Alan Modra | 1 | -5/+8 |
2019-02-22 | [AArch64][gas] Add support for Neoverse E1 | Kyrylo Tkachov | 1 | -0/+5 |
2019-02-22 | [AArch64][gas] Add support for Neoverse N1 | Kyrylo Tkachov | 1 | -0/+5 |
2019-01-25 | AArch64: Update encodings for stg, st2g, stzg and st2zg. | Sudi Das | 1 | -0/+2 |
2019-01-25 | AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte... | Sudi Das | 1 | -16/+3 |
2019-01-08 | [AArch64][gas] Add -mcpu support for Arm Ares | Kyrylo Tkachov | 1 | -0/+5 |
2019-01-01 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2018-12-05 | [aarch64] Add support for pointer authentication B key | Sam Tebbs | 1 | -0/+9 |
2018-11-12 | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension | Sudakshina Das | 1 | -3/+17 |
2018-11-12 | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 1 | -0/+6 |
2018-11-12 | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 1 | -0/+2 |
2018-11-12 | [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A | Sudakshina Das | 1 | -0/+2 |
2018-10-09 | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 1 | -0/+2 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 1 | -0/+52 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 1 | -0/+2 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 1 | -0/+17 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 1 | -0/+2 |
2018-10-09 | [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea... | Sudakshina Das | 1 | -0/+1 |
2018-10-03 | AArch64: Close sequences at the end of sections | Tamar Christina | 1 | -0/+18 |
2018-10-03 | AArch64: Add SVE constraints verifier. | Tamar Christina | 1 | -2/+4 |
2018-10-03 | AArch64: Wire through instr_sequence | Tamar Christina | 1 | -8/+22 |
2018-09-18 | Fix Aarch64 bug in warning filtering. | Tamar Christina | 1 | -1/+1 |
2018-06-29 | [Patch AArch64] Warn on unpredictable stlxrb , stlxrh and stlxr cases. | Ramana Radhakrishnan | 1 | -0/+16 |
2018-06-29 | Fix AArch64 encodings for by element instructions. | Tamar Christina | 1 | -0/+2 |
2018-06-08 | [AArch64][gas] Add support for Arm Cortex-A76 | kyrtka01 | 1 | -0/+3 |
2018-06-07 | Fix AArch64 unintialized variable which can cause diagnostic failures. | Tamar Christina | 1 | -0/+2 |
2018-06-06 | Update the AArch64 assembler to note that the Qualcomm Saphira cpu supports A... | Sameera Deshpande | 1 | -1/+1 |
2018-05-15 | Allow non-fatal errors to be emitted and for disassembly notes be placed on A... | Tamar Christina | 1 | -51/+81 |
2018-05-15 | Modify AArch64 Assembly and disassembly functions to be able to fail and repo... | Tamar Christina | 1 | -10/+19 |
2018-05-10 | Allow integer immediates for AArch64 fmov instructions. | Tamar Christina | 1 | -21/+4 |
2018-03-28 | [1/2][GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSLE_LDST8/16/32/64_TPREL_LO12 supp... | Renlin Li | 1 | -6/+46 |
2018-03-28 | Enhance the AARCH64 assembler to support LDFF1xx instructions which use REG+R... | Nick Clifton | 1 | -0/+20 |
2018-01-24 | [GAS][AARCH64]Add group relocations to create PC-relative offset. | Renlin Li | 1 | -0/+84 |
2018-01-03 | Update year range in copyright notice of binutils files | Alan Modra | 1 | -1/+1 |
2017-12-19 | Correct disassembly of dot product instructions. | Tamar Christina | 1 | -2/+8 |
2017-12-19 | Add support for V_4B so we can properly reject it. | Tamar Christina | 1 | -3/+3 |