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2024-07-20Add markers for 2.43 branch/releaseNick Clifton1-0/+4
2024-02-19bpf: fix bpf expression parsing regression in GASWill Hawkins1-0/+9
As a result of a switch instead of an if, as would issue non-specific error messages when it encountered an operand it could not parse in bpf. This patch fixes that regression and adds a test to prevent it from reoccurring. Tested for bpf-unknown-none on x86_64-redhat-linux. gas/ChangeLog: * config/tc-bpf.c (parse_expression): Change switch to if so that error * condition is handled. * testsuite/gas/bpf/bpf.exp: Invoke new test. * testsuite/gas/bpf/indcall-badoperand.d: New test. * testsuite/gas/bpf/indcall-badoperand.l: New test. * testsuite/gas/bpf/indcall-badoperand.s: New test.
2024-02-19bpf: gas: avoid UB in pointer subtractionJose E. Marchesi1-0/+6
The PARSE_ERROR macro in md_assemble performs pointer subtraction. If parse_expression returns NULL then the later will be part of the subtraction and therefore UB will be incurred. This patch changes md_assemble to: 1. Accommodate all invocations to parse_expression to the fact it will return NULL when a parse error occurs. 2. Avoid UB in PARSE_ERROR. Tested in bpf-unknown-none target / x86_64-linux-gnu host. gas/ChangeLog: * config/tc-bpf.c (md_assemble): Fix to take into account that parse_expression can return NULL. (PARSE_ERROR): Avoid passing invalid length to parse_error.
2024-02-15objdump, as: add callx support for BPF CPU v1Will Hawkins1-0/+6
Albeit not being a currently valid BPF instruction, callx is generated by both clang and GCC when BPF programs are compiled unoptimized. Until now, GCC would emit it only whe using the experimental compiler-testing cpu version xbpf, whereas clang would emit it from v1. This patch makes GAS to accept callx also starting with cpu v1. opcodes/ChangeLog * bpf-opc.c: Move callx into the v1 BPF CPU variant. gas/ChangeLog * testsuite/gas/bpf/indcall-1-pseudoc.d: Do not select xbpf cpu version. * testsuite/gas/bpf/indcall-1.d: Likewise.
2024-02-14arc: Put DBNZ instruction to a separate classYuriy Kolerov1-0/+4
DBNZ instruction decrements its source register operand, and if the result is non-zero it branches to the location defined by a signed half-word displacement operand. DBNZ instruction is in BRANCH class as other branch instrucitons like B, Bcc, etc. However, DBNZ is the only branch instruction that stores a branch offset in the second operand. Thus it must be placed in a distinct class and treated differently. For example, current logic of arc_insn_get_branch_target in GDB assumes that a branch offset is always stored in the first operand for BRANCH class and it's wrong for DBNZ. include/ChangeLog: 2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com> * opcode/arc.h (enum insn_class_t): Add DBNZ class. opcodes/ChangeLog: 2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com> * arc-tbl.h (dbnz): Use "DBNZ" class. * arc-dis.c (arc_opcode_to_insn_type): Handle "DBNZ" class. gas/ChangeLog: 2024-02-14 Yuriy Kolerov <ykolerov@synopsys.com> * config/tc-arc.c (is_br_jmp_insn_p): Add check against "DBNZ".
2024-01-29bpf: there is no ldinddw nor ldabsdw instructionsJose E. Marchesi1-0/+13
There are no legacy ldind nor ldabs BPF instructions with BPF_SIZE_DW. For some reason we were (incorrectly) supporting these. This patch updates the opcodes so the instructions get removed and modifies the GAS manual and testsuite accordingly. See discussion at https://lore.kernel.org/bpf/110aad7a-f8a3-46ed-9fda-2f8ee54dcb89@linux.dev Tested in bpf-uknonwn-none target, x86-64-linux-gnu host. include/ChangeLog: 2024-01-29 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/bpf.h (enum bpf_insn_id): Remove BPF_INSN_LDINDDW and BPF_INSN_LDABSDW instructions. opcodes/ChangeLog: 2024-01-29 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Remove BPF_INSN_LDINDDW and BPF_INSN_LDABSDW instructions. gas/ChangeLog: 2024-01-29 Jose E. Marchesi <jose.marchesi@oracle.com> * doc/c-bpf.texi (BPF Instructions): There is no indirect 64-bit load instruction. (BPF Instructions): There is no absolute 64-bit load instruction. * testsuite/gas/bpf/mem.s: Update test accordingly. * testsuite/gas/bpf/mem-be-pseudoc.d: Likewise. * testsuite/gas/bpf/mem-be.d: Likewise. * testsuite/gas/bpf/mem-pseudoc.d: Likewise. * testsuite/gas/bpf/mem-pseudoc.s: Likewise. * testsuite/gas/bpf/mem.d: Likewise. * testsuite/gas/bpf/mem.s: Likewise.
2024-01-15Change version to 2.42.50 and regenerate filesNick Clifton1-0/+6
2024-01-15Add markers for 2.42 branchNick Clifton1-0/+4
2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-11-30gas: support double-slash line comments in BPF assemblyJose E. Marchesi1-0/+11
This patch makes the BPF assembler to support double-slash line comments, like the llvm BPF assembler does. At this point both assemblers support the same commenting styles: - Line comments preceded by # or //. - Non-nestable block comments delimited by /* and */. This patch also adds a couple of tests to make sure all the comment styles work in both normal and pseudoc syntax. The manual is also updated to mention double-slash line comments.
2023-11-28gas: add NEWS entry for change of comment syntax in BPF assemblerJose E. Marchesi1-0/+5
2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> * NEWS: Add entry about change of comment syntax in the BPF assembler.
2023-11-28gas: change meaning of ; in the BPF assemblerJose E. Marchesi1-0/+15
The BPF assembler in clang uses semi-colon (;) to separate statements, not to be begin line comments. This patch adapts the GNU assembler accordingly. Testsuite and documentation updated accordingly. 2023-11-28 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c: Semicolon does not start a comment, but separates multiple commands on a single line. * testsuite/gas/bpf/alu-pseudoc.s: Adapt test accordingly. * testsuite/gas/bpf/spacing-pseudoc.s: Likewise. * testsuite/gas/bpf/offset16-overflow.s: Likewise. * testsuite/gas/bpf/jump-relax-jump.s: Likewise. * testsuite/gas/bpf/jump-relax-ja.s: Likewise. * testsuite/gas/bpf/imm32-overflow.s: Likewise. * testsuite/gas/bpf/disp32-overflow.s: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.s: Likewise. * testsuite/gas/bpf/disp16-overflow.s: Likewise. * doc/c-bpf.texi (BPF Special Characters): Update.
2023-11-23MIPS/GAS: Use addiu instead of addi in test elf-rel.YunQiang Su1-0/+6
2023-11-23MIPS/GAS: Fix test failures due to jr encoding changes on r6YunQiang Su1-0/+9
2023-11-18gas: bpf: do not allow referring to register names as symbols in operandsJose E. Marchesi1-0/+12
2023-11-18 Jose E. Marchesi <jemarch@gnu.org> * config/tc-bpf.c (parse_bpf_register): Move before bpf_parse_name. (bpf_parse_name): Do not allow using symbols that are also register names as operands in pseudo-c syntax. * testsuite/gas/bpf/regs-for-symbols-pseudoc.d: New file. * testsuite/gas/bpf/regs-for-symbols-pseudoc.s: Likewise. * testsuite/gas/bpf/regs-for-symbols-pseudoc.l: Likewise. * doc/c-bpf.texi (BPF Registers): Document that it is not possible to refer to register names as symbols in instruction operands.
2023-11-15GAS/MIPS: add "--defsym r6=" for default when it's r6YunQiang Su1-0/+5
* testsuite/gas/mips/mips.exp (mips_arch_create): Add "--defsym r6=" to as_flags for r6 targets.
2023-11-15Finalized intl-update patchesArsen Arsenovi?1-0/+7
* intl: Remove directory. Replaced with out-of-tree GNU gettext. * .gitignore: Add '/gettext*'. * configure.ac (host_libs): Replace intl with gettext. (hbaseargs, bbaseargs, baseargs): Split baseargs into {h,b}baseargs. (skip_barg): New flag. Skips appending current flag to bbaseargs. <library exemptions>: Exempt --with-libintl-{type,prefix} from target and build machine argument passing. * configure: Regenerate. * Makefile.def (host_modules): Replace intl module with gettext module. (configure-ld): Depend on configure-gettext. * Makefile.in: Regenerate. * src-release.sh: Remove references to the intl/ directory.
2023-11-15MIPS: Fix Irix gas testcases about pdr sectionYunQiang Su1-0/+15
* testsuite/gas/elf/elf.exp (section2): Add -mpdr option to assembler command line for mips-irix targets. * testsuite/gas/mips/elf-rel26.d: Add -mpdr command line option. * testsuite/gas/mips/mips16-e.d: Likewise. * testsuite/gas/mips/mips16-f.d: Likewise. * testsuite/gas/mips/mips16-hilo-match.d: Likewise. * testsuite/gas/mips/mips16-e-irix.d: Likewise. * testsuite/gas/mips/call-nonpic-1.d: Adjust regexp to allow for mips-irix targets. * testsuite/gas/mips/irix-no-pdr.d: New test file. * testsuite/gas/mips/mips.exp: Run new test for mips-irix targets.
2023-10-30gas: bpf: new test for MOV with C-like numbers ll suffixJose E. Marchesi1-0/+7
The BPF pseudo-c syntax supports both MOV and LDDW instructions: mov: r1 = EXPR lddw: r1 = EXPR ll Note that the white space between EXPR and `ll' is necessary in order to avoid ambiguity with the assembler's support for C-like numerical suffixes. This patch adds a new test to the GAS BPF testsuite to make sure that instructions like: r1 = 666ll are interpreted as `mov %r1,666', not as `lddw %r1,666'. This matches clang's assembler behavior. 2023-10-30 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/alu-pseudoc.s: Add test to make sure C-like suffix `ll' is not interpreted as lddw syntax. * testsuite/gas/bpf/alu-pseudoc.d: Update expected results. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
2023-10-02Fix memory leak in RiscV assembler.Nick Clifton1-0/+6
PR 30861 * config/tc-riscv.c (riscv_insert_uleb128_fixes): Release duplicated memory.
2023-09-18Fix: Use of uninitialized memoryJacob Navia1-0/+5
* config/tc-riscv.c (riscv_ip_hardcode): Fully initialise the allocated riscv_opcode structure.
2023-08-17bpf: gas: consolidate handling of immediate overflowsJose E. Marchesi1-0/+23
This commit changes the BPF GAS port in order to handle immediate overflows the same way than the clang BPF assembler: - For an immediate field of N bits, any written number (positive or negative) whose two's complement encoding fit in N its is accepted. This means that -2 is the same than 0xffffffe. It is up to the instructions to decide how to interpret the encoded value. - Immediate fields in jump instructions are no longer relaxed. Relaxing to jump instructions with wider range is only performed when expressions are involved. - The manual is updated to document this, and testsuite adapted accordingly. Tested in x86_64-linux-gnu host, bpf-unknown-none target. gas/ChangeLog: 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c (check_immediate_overflow): New function. (encode_insn): Use check_immediate_overflow. (md_assemble): Do not relax instructions with constant disp16 fields. * doc/c-bpf.texi (BPF Instructions): Add note about how numerical literal values are interpreted for instruction immediate operands. * testsuite/gas/bpf/disp16-overflow.s: Adapt accordingly. * testsuite/gas/bpf/jump-relax-jump.s: Likewise. * testsuite/gas/bpf/jump-relax-jump.d: Likewise. * testsuite/gas/bpf/jump-relax-jump-be.d: Likewise. * testsuite/gas/bpf/jump-relax-ja.s: Likewise. * testsuite/gas/bpf/jump-relax-ja.d: Likewise. * testsuite/gas/bpf/jump-relax-ja-be.d: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.l: Likewise. * testsuite/gas/bpf/imm32-overflow.s: Likewise. * testsuite/gas/bpf/disp32-overflow.s: Likewise. * testsuite/gas/bpf/disp16-overflow.l: Likewise. * testsuite/gas/bpf/disp32-overflow.l: Likewise. * testsuite/gas/bpf/imm32-overflow.l: Likewise. * testsuite/gas/bpf/offset16-overflow.l: Likewise.
2023-08-02Revert "2.41 Release sources"Sam James1-15/+163
This reverts commit 675b9d612cc59446e84e2c6d89b45500cb603a8d. See https://sourceware.org/pipermail/binutils/2023-August/128761.html.
2023-08-022.41 Release sourcesbinutils-2_41-releaseNick Clifton1-163/+15
2023-07-30bpf: include, bfd, opcodes: add EF_BPF_CPUVER ELF header flagsJose E. Marchesi1-0/+5
This patch adds support for EF_BPF_CPUVER bits in the ELF machine-dependent header flags. These bits encode the BPF CPU version for which the object file has been compiled for. The BPF assembler is updated so it annotates the object files it generates with these bits. The BPF disassembler is updated so it honors EF_BPF_CPUVER to use the appropriate ISA version if the user didn't specify an explicit ISA version in the command line. Note that a value of zero in EF_BPF_CPUVER is interpreted by the disassembler as "use the later supported version" (the BPF CPU versions start with v1.) The readelf utility is updated to pretty print EF_BPF_CPUVER when it prints out the ELF header: $ readelf -h a.out ELF Header: ... Flags: 0x4, CPU Version: 4 Tested in bpf-unknown-none. include/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * elf/bpf.h (EF_BPF_CPUVER): Define. * opcode/bpf.h (BPF_XBPF): Change from 0xf to 0xff so it fits in EF_BPF_CPUVER. binutils/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * readelf.c (get_machine_flags): Recognize and pretty print BPF machine flags. opcodes/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-dis.c: Initialize asm_bpf_version to -1. (print_insn_bpf): Set BPF ISA version from the cpu version ELF header flags if no explicit version set in the command line. * disassemble.c (disassemble_init_for_target): Remove unused code. gas/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.h (elf_tc_final_processing): Define. * config/tc-bpf.c (bpf_elf_final_processing): New function.
2023-07-30bpf: gas: add field overflow checking to the BPF assemblerJose E. Marchesi1-0/+25
This patch makes the BPF assembler to throughfully check for overflow in immediates. This includes relaxed instructions. Tested in bpf-unknown-none. gas/ChangeLog: 2023-07-30 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c (signed_overflow): Copy function from tc-aarch64.c. (encode_insn): Check for overflow in constant immediates. (add_relaxed_insn): Pass relax argument to encode_insn. (add_fixed_insn): Likewise. * testsuite/gas/bpf/disp16-overflow.d: New file. * testsuite/gas/bpf/disp16-overflow.s: Likewise. * testsuite/gas/bpf/disp16-overflow.l: Likewise. * testsuite/gas/bpf/disp32-overflow.d: Likewise. * testsuite/gas/bpf/disp32-overflow.s: Likewise. * testsuite/gas/bpf/disp32-overflow.l: Likewise. * testsuite/gas/bpf/imm32-overflow.d: Likewise. * testsuite/gas/bpf/imm32-overflow.s: Likewise. * testsuite/gas/bpf/imm32-overflow.l: Likewise. * testsuite/gas/bpf/offset16-overflow.d: Likewise. * testsuite/gas/bpf/offset16-overflow.s: Likewise. * testsuite/gas/bpf/offset16-overflow.l: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.d: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.l: Likewise. * testsuite/gas/bpf/disp16-overflow-relax.s: Likewise. * testsuite/gas/bpf/jump-relax-jump-be.d: New file. * testsuite/gas/bpf/bpf.exp: Run new tests.
2023-07-28bpf: gas: support relaxation of V4 jump instructionsJose E. Marchesi1-0/+36
The BPF jump-always instruction (JA), like all other jump instructions in the ISA, get a signed 16-bit displacement target argument denoted in number of 64-bit words minus one. This can sometimes be overflown. The BPF V4 ISA thus introduced support for a jump-always instruction (JAL) that gets a signed 32-bit displacement instead. This patch makes the BPF assembler to perform the following relaxations when the disp16 field gets overflown, unless the option -mno-relax is specified: JA disp16 -> JAL disp32 Jxx disp16 -> Jxx +1; JA +1; JAL disp32 Documentation and tests added. Tested in bpf-unknown-none. gas/ChangeLog: 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com> PR gas/30690 * config/tc-bpf.c (struct bpf_insn): Add fields is_relaxable and relaxed_exp. (enum options): Add OPTION_NO_RELAX. (md_longopts): Likewise for -mno-relax. (do_relax): New global. (md_parse_option): Handle OPTION_NO_RELAX. (RELAX_BRANCH_ENCODE): Define. (RELAX_BRANCH_P): Likewise. (RELAX_BRANCH_LENGTH): Likewise. (RELAX_BRANCH_CONST): Likewise. (RELAX_BRANCH_UNCOND): Likewise. (relaxed_branch_length): New function. (md_estimate_size_before_relax): Likewise. (read_insn_word): Likewise. (encode_int16): Likewise. (encode_int32): Likewise. (write_insn_bytes): Likewise. (md_convert_frag): Likewise. (encode_insn): Likewise. (install_insn_fixups): Likewise. (add_fixed_insn): Likewise. (add_relaxed_insn): Likewise. (md_assemble): Move instruction encoding logic to the above new functions. * testsuite/gas/bpf/jump-relax-ja.d: New test. * testsuite/gas/bpf/jump-relax-ja-be.d: Likewise. * testsuite/gas/bpf/jump-relax-ja.s: And corresponding source. * testsuite/gas/bpf/jump-relax-jump.d: New test. * testsuite/gas/bpf/jump-relax-jump-be.d: Likewise. * testsuite/gas/bpf/jump-relax-jump.s: And corresponding source. * testsuite/gas/bpf/bpf.exp: Run new tests. * doc/c-bpf.texi (BPF Options): Document -mno-relax.
2023-07-26bpf: gas: add negi and neg32i testsJose E. Marchesi1-0/+14
gas/ChangeLog: 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/alu.s: Add test for NEGI and NEG32I. * testsuite/gas/bpf/alu32.s: Likewise. * testsuite/gas/bpf/alu-pseudoc.s: Likewise. * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. * testsuite/gas/bpf/alu.d: Add expected results. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32.d: Likewise. * testsuite/gas/bpf/alu32-be.d: Likewise. * testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
2023-07-26bpf: fix register NEG[32] instructionsJose E. Marchesi1-0/+17
This patch fixes the BPF_INSN_NEGR and BPF_INSN_NEG32R BPF instructions to not use their source registers. Tested in bpf-unknown-none. opcodes/ChangeLog: 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Fix BPF_INSN_NEGR to not use a src register. gas/ChangeLog: 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/alu.s: The register neg instruction gets only one argument. * testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. * testsuite/gas/bpf/alu-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-pseudoc.s: Likewise. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu.d: Likewise. * testsuite/gas/bpf/alu32-be.d: Likewise. * testsuite/gas/bpf/alu32.d: Likewise. * testsuite/gas/bpf/alu32.s: Likewise. * doc/c-bpf.texi (BPF Instructions): Update accordingly.
2023-07-24bpf: gas,include,opcode: add suppor for instructions BSWAP{16,32,64}Jose E. Marchesi1-0/+10
This patch adds support for the BPF V4 ISA byte swap instructions to opcodes, assembler and disassembler. Tested in bpf-unknown-none. include/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/bpf.h (BPF_IMM32_BSWAP16): Define. (BPF_IMM32_BSWAP32): Likewise. (BPF_IMM32_BSWAP64): Likewise. (enum bpf_insn_id): New entries BPF_INSN_BSWAP{16,32,64}. opcodes/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Add entries for the BSWAP* instructions. gas/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * doc/c-bpf.texi (BPF Instructions): Document BSWAP* instructions. * testsuite/gas/bpf/alu.s: Test BSWAP{16,32,64} instructions. * testsuite/gas/bpf/alu.d: Likewise. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu-pseudoc.s: Likewise. * testsuite/gas/bpf/alu-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
2023-07-24bpf: gas: fix in manual that MOVS* pseudoc syntax uses = instead of s=Jose E. Marchesi1-0/+5
gas/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * doc/c-bpf.texi (BPF Instructions): The pseudoc syntax for MOVS* doesn't use `s=' but `='.
2023-07-24bpf: gas,opcodes: fix pseudoc syntax for MOVS* and LDXS* insnsJose E. Marchesi1-0/+14
This patch fixes the pseudoc syntax of the V4 instructions MOVS* and LDXS* in order to reflect https://reviews.llvm.org/D144829. opcodes/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Fix pseudo-c syntax for MOVS* and LDXS* instructions. gas/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * doc/c-bpf.texi (BPF Instructions): Fix pseudoc syntax for MOVS* and LDXS* instructions. * testsuite/gas/bpf/mem-pseudoc.d: Likewise. * testsuite/gas/bpf/mem-be-pseudoc.d: Likewise. * testsuite/gas/bpf/mem-pseudoc.s: Likewise. * testsuite/gas/bpf/alu-pseudoc.s: Likewise. * testsuite/gas/bpf/alu-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. * testsuite/gas/bpf/alu32-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
2023-07-24bpf: add support for jal/gotol jump instruction with 32-bit targetJose E. Marchesi1-0/+15
This patch adds support for the V4 BPF instruction jal/gotol, which is like ja/goto but it supports a signed 32-bit PC-relative (in number of 64-bit words minus one) target operand instead of the 16-bit signed operand of the other instruction. This greatly increases the jump range in BPF programs. Tested in bpf-unkown-none. bfd/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * reloc.c: New reloc BFD_RELOC_BPF_DISPCALL32. * elf64-bpf.c (bpf_reloc_type_lookup): Handle the new reloc. * libbfd.h (bfd_reloc_code_real_names): Regenerate. gas/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c (struct bpf_insn): New field `id'. (md_assemble): Save the ids of successfully parsed instructions and use the new BFD_RELOC_BPF_DISPCALL32 whenever appropriate. (md_apply_fix): Adapt to the new BFD reloc. * testsuite/gas/bpf/jump.s: Test JAL. * testsuite/gas/bpf/jump.d: Likewise. * testsuite/gas/bpf/jump-pseudoc.d: Likewise. * testsuite/gas/bpf/jump-be.d: Likewise. * testsuite/gas/bpf/jump-be-pseudoc.d: Likewise. * doc/c-bpf.texi (BPF Instructions): Document new instruction jal/gotol. Document new operand type disp32. include/ChangeLog: 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/bpf.h (enum bpf_insn_id): Add entry BPF_INSN_JAL. (enum bpf_insn_id): Remove spurious entry BPF_INSN_CALLI. opcodes/ChangeLog: 2023-07-23 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Add entry for jal.
2023-07-21bpf: opcodes, gas: support for signed load V4 instructionsJose E. Marchesi1-0/+10
This commit adds the signed load to register (ldxs*) instructions introduced in the BPF ISA version 4, including opcodes and assembler tests. Tested in bpf-unknown-none. include/ChangeLog: 2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/bpf.h (enum bpf_insn_id): Add entries for signed load instructions. (BPF_MODE_SMEM): Define. opcodes/ChangeLog: 2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Add entries for LDXS{B,W,H,DW} instructions. gas/ChangeLog: 2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/mem.s: Add signed load instructions. * testsuite/gas/bpf/mem-pseudoc.s: Likewise. * testsuite/gas/bpf/mem.d: Likewise. * testsuite/gas/bpf/mem-pseudoc.d: Likewise. * testsuite/gas/bpf/mem-be.d: Likewise. * doc/c-bpf.texi (BPF Instructions): Document the signed load instructions.
2023-07-21bpf: opcodes, gas: support for signed register move V4 instructionsJose E. Marchesi1-0/+15
This commit adds the signed register move (movs) instructions introduced in the BPF ISA version 4, including opcodes and assembler tests. Tested in bpf-unknown-none. include/ChangeLog: 2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> * opcode/bpf.h (BPF_OFFSET16_MOVS8): Define. (BPF_OFFSET16_MOVS16): Likewise. (BPF_OFFSET16_MOVS32): Likewise. (enum bpf_insn_id): Add entries for MOVS{8,16,32}R and MOVS32{8,16,32}R. opcodes/ChangeLog: 2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Add entries for MOVS{8,16,32}R and MOVS32{8,16,32}R instructions. and MOVS32I instructions. gas/ChangeLog: 2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/alu.s: Test movs instructions. * testsuite/gas/bpf/alu-pseudoc.s: Likewise. * testsuite/gas/bpf/alu32.s: Likewise for movs32 instruction. * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. * testsuite/gas/bpf/alu.d: Add expected results. * testsuite/gas/bpf/alu32.d: Likewise. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu32-be.d: Likewise. * testsuite/gas/bpf/alu-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
2023-07-03Change version number to 2.41.50 and regenerate filesNick Clifton1-0/+5
2023-07-03Add markers for the 2.41 branchNick Clifton1-0/+4
2023-06-26Fix gas tests for aarch64-peNick Clifton1-1/+124
2023-04-27gas: bpf: fix tests for pseudo-c syntaxJose E. Marchesi1-0/+40
This patch fixes the GAS BPF testsuite so the tests for pseudo-c syntax are actually executed. 2023-04-27 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/bpf/mem.dump: New file. * testsuite/gas/bpf/mem-pseudoc.d: Likewise. * testsuite/gas/bpf/mem.d: #dump mem.dump. * testsuite/gas/bpf/lddw.dump: New file. * testsuite/gas/bpf/lddw-pseudoc.d: Likewise. * testsuite/gas/bpf/lddw.d: #dump lddw.dump. * testsuite/gas/bpf/jump.dump: New file. * testsuite/gas/bpf/jump-pseudoc.d: Likewise * testsuite/gas/bpf/jump.d: #dump jump.dump. * testsuite/gas/bpf/jump32.dump: New file. * testsuite/gas/bpf/jump32-pseudoc.d: Likewise. * testsuite/gas/bpf/jump32.d: #dump jump32.dump. * testsuite/gas/bpf/lddw-be.dump: New file. * testsuite/gas/bpf/lddw-be-pseudoc.d: Likewise. * testsuite/gas/bpf/lddw-be.d: #dump lddw-be.dump. * testsuite/gas/bpf/indcall-1.dump: New file. * testsuite/gas/bpf/indcall-1-pseudoc.d: Likewise. * testsuite/gas/bpf/indcall-1.d: #dump indcall-1.dump. * testsuite/gas/bpf/indcall-1-pseudoc.s (main): Fix lddw instruction. * testsuite/gas/bpf/atomic.dump: New file. * testsuite/gas/bpf/atomic-pseudoc.d: Likewise. * testsuite/gas/bpf/atomic.d: #dump atomic.dump. * testsuite/gas/bpf/alu32.dump: New file. * testsuite/gas/bpf/alu32-pseudoc.d: Likewise. * testsuite/gas/bpf/alu32.d: #dump alu32.dump. * testsuite/gas/bpf/alu.dump: New file. * testsuite/gas/bpf/alu-pseudoc.d: Likewise. * testsuite/gas/bpf/alu.d: #dump alu.dump. * testsuite/gas/bpf/alu-be.dump: New file. * testsuite/gas/bpf/alu-be-pseudoc.d: Likewise. * testsuite/gas/bpf/alu-be.d: #dump alu-be.dump. * testsuite/gas/bpf/alu32-be-pseudoc.d: New file. * testsuite/gas/bpf/alu32-be-dump: Likewise. * testsuite/gas/bpf/alu32-be.d: #dump alu32-be-dump. * testsuite/gas/bpf/bpf.exp: Run *-pseudoc tests.
2023-04-26gas: documentation for the BPF pseudo-c asm syntaxJose E. Marchesi1-0/+5
This patch expands the GAS manual in order to specify the alternate pseudo-C assembly syntax used in BPF, and now supported by the assembler. gas/ChangeLog: 2023-04-19 Jose E. Marchesi <jose.marchesi@oracle.com> PR gas/29757 * doc/c-bpf.texi (BPF Pseudo-C Syntax): New section.
2023-04-26gas: BPF pseudo-c syntax testsGuillermo E. Martinez1-0/+20
This patch expands the GAS BPF testsuite in order to also test the alternative pseudo-C syntax used in BPF assembly. This includes three main changes: - Some general GAS tests involving assignment and equality operands in expressions (such as = and ==) are disabled in bpf-* targets, because the syntax collides with the pseudo-C BPF assembly syntax. - New tests are added to the BPF GAS testsuite that test the pseudo-c syntax. Tests for all BPF instructions are included. - New tests are added to the BPF GAS testsuite that test the support for both syntaxes in the same source. gas/ChangeLog: 2023-04-20 Guillermo E. Martinez <guillermo.e.martinez@oracle.com> PR gas/29728 * testsuite/gas/all/assign-bad-recursive.d: Skip test in bpf-* targets. * testsuite/gas/all/eqv-dot.d: Likewise. * testsuite/gas/all/gas.exp: Skip other assignment tests in bpf-*. * testsuite/gas/bpf/alu-pseudoc.s: New file. * testsuite/gas/bpf/pseudoc-normal.s: Likewise. * testsuite/gas/bpf/pseudoc-normal.d: Likewise. * testsuite/gas/bpf/pseudoc-normal-be.d: Likewise. * testsuite/gas/bpf/mem-pseudoc.s: Likewise. * testsuite/gas/bpf/lddw-pseudoc.s: Likewise. * testsuite/gas/bpf/jump32-pseudoc.s: Likewise. * testsuite/gas/bpf/jump-pseudoc.s: Likewise. * testsuite/gas/bpf/indcall-1-pseudoc.s: Likewise. * testsuite/gas/bpf/atomic-pseudoc.s: Likewise. * testsuite/gas/bpf/alu32-pseudoc.s: Likewise. * testsuite/gas/bpf/*.d: Add -pseudoc variants of the tests.
2023-04-26gas: support for the BPF pseudo-c assembly syntaxGuillermo E. Martinez1-0/+32
This patch adds support to the GNU assembler for an alternative assembly syntax used in BPF. This syntax is C-like and very unconventional for an assembly language, but it is generated by clang/llvm and is also used in inline asm templates in kernel code, so we ought to support it. After this patch, the assembler is able to parse instructions in both supported syntax: the normal assembly-like syntax and the pseudo-C syntax. Instruction formats can be mixed in the source program: the assembler recognizes the right syntax to use. gas/ChangeLog: 2023-04-20 Guillermo E. Martinez <guillermo.e.martinez@oracle.com> PR gas/29728 * config/tc-bpf.h (TC_EQUAL_IN_INSN): Define. * config/tc-bpf.c (LEX_IS_SYMBOL_COMPONENT): Define. (LEX_IS_WHITESPACE): Likewise. (LEX_IS_NEWLINE): Likewise. (LEX_IS_ARITHM_OP): Likewise. (LEX_IS_STAR): Likewise. (LEX_IS_CLSE_BR): Likewise. (LEX_IS_OPEN_BR): Likewise. (LEX_IS_EQUAL): Likewise. (LEX_IS_EXCLA): Likewise. (ST_EOI): Likewise. (MAX_TOKEN_SZ): Likewise. (init_pseudoc_lex): New function. (md_begin): Call init_pseudoc_lex. (valid_expr): New function. (build_bpf_non_generic_load): Likewise. (build_bpf_atomic_insn): Likewise. (build_bpf_jmp_insn): Likewise. (build_bpf_arithm_insn): Likewise. (build_bpf_endianness): Likewise. (build_bpf_load_store_insn): Likewise. (look_for_reserved_word): Likewise. (is_register): Likewise. (is_cast): Likewise. (get_token): Likewise. (bpf_pseudoc_to_normal_syntax): Likewise. (md_assemble): Try pseudo-C syntax if an instruction cannot be parsed.
2023-04-18Symbols with GOT relocatios do not fix adjustbalemengqinggang1-0/+7
gas * config/tc-loongarch.c (loongarch_fix_adjustable): Symbols with GOT relocatios do not fix adjustbale. * testsuite/gas/loongarch/macro_op_large_abs.d: Regenerated. * testsuite/gas/loongarch/macro_op_large_pc.d: Regenerated. ld * testsuite/ld-loongarch-elf/macro_op.d: Regenerated. -
2023-04-18Assembler Internal Docs: Describe handling of opcodes for relaxation a bit ↵Thomas Koenig1-0/+5
better.
2023-04-13arc: Update ARC's CFI tests.Claudiu Zissulescu1-0/+5
The double store/loads instructions (e.g. STD/LDD) are not baseline ARC ISA. The same holds for some short instructions. Update the tests to use base ARC ISA. Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2023-04-13arc: Update GAS testClaudiu Zissulescu1-0/+5
Signed-off-by: Claudiu Zissulescu <claziss@gmail.com>
2023-03-14Fix assembler documentation regarding data directives.Nick Clifton1-0/+6
PR 30206 * doc/as.texi (Pseudo Ops): Document that data directives such as .byte and .int are not intended for encoding instructions.
2023-02-28[Aarch64] Add Binutils support for MECRichard Ball1-0/+8
This change supports MEC which is part of RME (Realm Management Extension).
2023-02-27Do not change the timestamp when updating the gas asconfig file.Benson Muite1-0/+7
PR 28909 * doc/local.mk (asconfig.texi): Use "cp -p" to preserve timestamps. * Makefile.in: Regenerate.
2023-02-01Fix compilation of the assembler with sanitization enabled.Nick Clifton1-0/+5
* dwarf2dbg.c (emit_inc_line_addr): Use unsigned constants when checking addr_delta.
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