riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-12-01	RISC-V: Add SiFive custom vector coprocessor interface instructions v1.0	Nelson Chu	1	-0/+5
2023-12-01	RISC-V: Zv*: Add support for Zvkb ISA extension	Christoph Müllner	1	-2/+8
2023-11-24	RISC-V: Update 'Zfa' extension version	zengxiao	1	-1/+1
2023-11-23	RISC-V: Add sub-extension XTheadZvamo for T-Head VECTOR vendor extension	Jin Ma	1	-0/+5
2023-11-23	RISC-V: Add T-Head VECTOR vendor extension.	Jin Ma	1	-0/+12
2023-11-07	RISC-V: Add support for XCValu extension in CV32E40P	Mary Bennett	1	-0/+5
2023-11-07	RISC-V: Add support for XCVmac extension in CV32E40P	Mary Bennett	1	-0/+5
2023-11-06	RISC-V: Moved out linker internal relocations after R_RISCV_max.	Nelson Chu	1	-85/+93
2023-10-16	RISC-V: Remove RV64E conflict	Tsukasa OI	1	-7/+0
2023-09-07	RISC-V: Clarify the naming rules of vendor operands.	Nelson Chu	1	-1/+0
2023-09-05	RISC-V: Add stub support for the 'Svadu' extension	Tsukasa OI	1	-0/+2
2023-09-05	RISC-V: Add 'Smcntrpmf' extension and its CSRs	Tsukasa OI	1	-0/+2
2023-09-05	RISC-V: Prohibit combination of 'E' and 'H'	Tsukasa OI	1	-0/+7
2023-08-18	RISC-V: Report "c or zca" for INSN_CLASS_C when error reporting.	Nelson Chu	1	-1/+1
2023-08-15	RISC-V: Make "fli.h" available to 'Zvfh' + 'Zfa'	Tsukasa OI	1	-0/+15
2023-08-15	RISC-V: Add support for the 'Zihintntl' extension	Tsukasa OI	1	-0/+20
2023-08-11	RISC-V: Remove support for non-existing 'Zve32d'	Tsukasa OI	1	-1/+0
2023-08-08	RISC-V: Update ratified 'Ztso' extension version	Tsukasa OI	1	-1/+1
2023-08-03	RISC-V: Add support for 'Zvfh' and 'Zvfhmin'	Tsukasa OI	1	-0/+5
2023-08-03	RISC-V: Imply 'Zicsr' from 'Zve32x'	Tsukasa OI	1	-0/+1
2023-08-02	Revert "2.41 Release sources"	Sam James	1	-23/+61
2023-08-02	2.41 Release sourcesbinutils-2_41-release	Nick Clifton	1	-61/+23
2023-07-28	RISC-V: Add actual 'Zvkt' extension support	Tsukasa OI	1	-0/+3
2023-07-24	RISC-V: Implications from 'Zc[fd]' extensions	Tsukasa OI	1	-0/+2
2023-07-24	RISC-V: Prohibit the 'Zcf' extension on RV64	Tsukasa OI	1	-0/+7
2023-07-18	RISC-V: Supports Zcb extension.	Jiawei	1	-0/+21
2023-07-18	RISC-V: Support Zca/f/d extensions.	Jiawei	1	-15/+29
2023-07-03	RISC-V: Zvkh[a,b]: Remove individual instruction class	Christoph Müllner	1	-8/+2
2023-07-01	RISC-V: Add support for the Zvksc ISA extension	Nathan Huckleberry	1	-0/+3
2023-07-01	RISC-V: Add support for the Zvknc ISA extension	Nathan Huckleberry	1	-0/+3
2023-07-01	RISC-V: Add support for the Zvksg ISA extension	Nathan Huckleberry	1	-0/+3
2023-07-01	RISC-V: Add support for the Zvks ISA extension	Christoph Müllner	1	-0/+4
2023-07-01	RISC-V: Add support for the Zvkng ISA extension	Nathan Huckleberry	1	-0/+3
2023-07-01	RISC-V: Allow nested implications for extensions	Nathan Huckleberry	1	-7/+22
2023-07-01	RISC-V: Add support for the Zvkn ISA extension	Christoph Müllner	1	-0/+5
2023-07-01	RISC-V: Add support for the Zvksh ISA extension	Christoph Müllner	1	-0/+5
2023-07-01	RISC-V: Add support for the Zvksed ISA extension	Christoph Müllner	1	-0/+5
2023-07-01	RISC-V: Add support for the Zvknh[a,b] ISA extensions	Christoph Müllner	1	-0/+13
2023-07-01	RISC-V: Add support for the Zvkned ISA extension	Christoph Müllner	1	-0/+5
2023-07-01	RISC-V: Add support for the Zvkg ISA extension	Christoph Müllner	1	-0/+5
2023-07-01	RISC-V: Add support for the Zvbc extension	Nathan Huckleberry	1	-0/+5
2023-07-01	RISC-V: Add support for the Zvbb ISA extension	Christoph Müllner	1	-0/+5
2023-06-30	RISC-V: Add support for the Zfa extension	Christoph Müllner	1	-0/+39
2023-06-27	RISC-V: Support Zicond extension	Philipp Tomsich	1	-0/+5
2023-05-19	RISC-V: Support subtraction of .uleb128.	Kuan-Lin Chen	1	-0/+54
2023-04-26	RISC-V: Support XVentanaCondOps extension	Philipp Tomsich	1	-0/+4
2023-01-01	Update year range in copyright notice of binutils files	Alan Modra	1	-1/+1
2022-12-23	RISC-V: Relax the order checking for the architecture string	Nelson Chu	1	-135/+75
2022-11-25	riscv: Add AIA extension support (Smaia, Ssaia)	Christoph Müllner	1	-0/+4
2022-11-23	RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standard	Xiao Zeng	1	-0/+4