diff options
Diffstat (limited to 'sim/frv')
-rw-r--r-- | sim/frv/arch.c | 5 | ||||
-rw-r--r-- | sim/frv/arch.h | 13 | ||||
-rw-r--r-- | sim/frv/cpu.c | 5 | ||||
-rw-r--r-- | sim/frv/cpu.h | 21 | ||||
-rw-r--r-- | sim/frv/cpuall.h | 5 | ||||
-rw-r--r-- | sim/frv/decode.c | 27 | ||||
-rw-r--r-- | sim/frv/decode.h | 5 | ||||
-rw-r--r-- | sim/frv/model.c | 5 | ||||
-rw-r--r-- | sim/frv/sem.c | 5 |
9 files changed, 55 insertions, 36 deletions
diff --git a/sim/frv/arch.c b/sim/frv/arch.c index 0ac34c0..9fa4a25 100644 --- a/sim/frv/arch.c +++ b/sim/frv/arch.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/arch.h b/sim/frv/arch.h index 2bd9869..0fb1644 100644 --- a/sim/frv/arch.h +++ b/sim/frv/arch.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,13 +17,22 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ #ifndef FRV_ARCH_H #define FRV_ARCH_H +#define TARGET_BIG_ENDIAN 1 + +#define WI SI +#define UWI USI +#define AI USI + +#define IAI USI + /* Enum declaration for model types. */ typedef enum model_type { MODEL_FRV, MODEL_FR550, MODEL_FR500, MODEL_TOMCAT diff --git a/sim/frv/cpu.c b/sim/frv/cpu.c index aa116ca..195c8a1 100644 --- a/sim/frv/cpu.c +++ b/sim/frv/cpu.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/cpu.h b/sim/frv/cpu.h index b129c14..fbb6c57 100644 --- a/sim/frv/cpu.h +++ b/sim/frv/cpu.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -2191,7 +2192,7 @@ struct scache { f_ICCi_2_null = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \ f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \ f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \ - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \ + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); \ #define EXTRACT_IFMT_BNO_VARS \ UINT f_pack; \ @@ -2225,7 +2226,7 @@ struct scache { f_ICCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \ f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \ f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \ - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \ + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); \ #define EXTRACT_IFMT_FBRA_VARS \ UINT f_pack; \ @@ -2242,7 +2243,7 @@ struct scache { f_FCCi_2_null = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \ f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \ f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \ - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \ + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); \ #define EXTRACT_IFMT_FBNO_VARS \ UINT f_pack; \ @@ -2276,7 +2277,7 @@ struct scache { f_FCCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); \ f_op = EXTRACT_LSB0_UINT (insn, 32, 24, 7); \ f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); \ - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); \ + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); \ #define EXTRACT_IFMT_BCTRLR_VARS \ UINT f_pack; \ @@ -2595,7 +2596,7 @@ struct scache { f_labelH6 = EXTRACT_LSB0_SINT (insn, 32, 30, 6); \ f_labelL18 = EXTRACT_LSB0_UINT (insn, 32, 17, 18); \ {\ - f_label24 = ((((((((f_labelH6) << (18))) | (f_labelL18))) << (2))) + (pc));\ + f_label24 = ((((((((f_labelH6) * (((1) << (18))))) | (f_labelL18))) * (4))) + (pc));\ }\ #define EXTRACT_IFMT_RETT_VARS \ @@ -3584,7 +3585,7 @@ struct scache { f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); \ f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \ {\ - f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));\ + f_u12 = ((((f_u12_h) * (64))) | (f_u12_l));\ }\ #define EXTRACT_IFMT_MHSETHIS_VARS \ @@ -3605,7 +3606,7 @@ struct scache { f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); \ f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \ {\ - f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));\ + f_u12 = ((((f_u12_h) * (64))) | (f_u12_l));\ }\ #define EXTRACT_IFMT_MHDSETS_VARS \ @@ -3626,7 +3627,7 @@ struct scache { f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); \ f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); \ {\ - f_u12 = ((((f_u12_h) << (6))) | (f_u12_l));\ + f_u12 = ((((f_u12_h) * (64))) | (f_u12_l));\ }\ #define EXTRACT_IFMT_MHSETLOH_VARS \ diff --git a/sim/frv/cpuall.h b/sim/frv/cpuall.h index 2210fb1..cee529f 100644 --- a/sim/frv/cpuall.h +++ b/sim/frv/cpuall.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/decode.c b/sim/frv/decode.c index d6d2cdb..876dda2 100644 --- a/sim/frv/decode.c +++ b/sim/frv/decode.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ @@ -26,6 +27,8 @@ This file is part of the GNU simulators. #include "sim-main.h" #include "sim-assert.h" +#include "cgen-mem.h" +#include "cgen-ops.h" /* The instruction descriptor array. This is computed at runtime. Space for it is not malloc'd to save a @@ -7302,7 +7305,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, SI f_label16; f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_hint) = f_hint; @@ -7328,7 +7331,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, SI f_label16; f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_hint) = f_hint; @@ -7350,7 +7353,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, f_ICCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_ICCi_2) = f_ICCi_2; @@ -7378,7 +7381,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, SI f_label16; f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_hint) = f_hint; @@ -7404,7 +7407,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, SI f_label16; f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_hint) = f_hint; @@ -7426,7 +7429,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, f_FCCi_2 = EXTRACT_LSB0_UINT (insn, 32, 26, 2); f_hint = EXTRACT_LSB0_UINT (insn, 32, 17, 2); - f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) << (2))) + (pc)); + f_label16 = ((((EXTRACT_LSB0_SINT (insn, 32, 15, 16)) * (4))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_FCCi_2) = f_FCCi_2; @@ -7936,7 +7939,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, f_labelH6 = EXTRACT_LSB0_SINT (insn, 32, 30, 6); f_labelL18 = EXTRACT_LSB0_UINT (insn, 32, 17, 18); { - f_label24 = ((((((((f_labelH6) << (18))) | (f_labelL18))) << (2))) + (pc)); + f_label24 = ((((((((f_labelH6) * (((1) << (18))))) | (f_labelL18))) * (4))) + (pc)); } /* Record the fields for the semantic handler. */ @@ -9919,7 +9922,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); { - f_u12 = ((((f_u12_h) << (6))) | (f_u12_l)); + f_u12 = ((((f_u12_h) * (64))) | (f_u12_l)); } /* Record the fields for the semantic handler. */ @@ -9952,7 +9955,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); { - f_u12 = ((((f_u12_h) << (6))) | (f_u12_l)); + f_u12 = ((((f_u12_h) * (64))) | (f_u12_l)); } /* Record the fields for the semantic handler. */ @@ -9985,7 +9988,7 @@ frvbf_decode (SIM_CPU *current_cpu, IADDR pc, f_u12_h = EXTRACT_LSB0_SINT (insn, 32, 17, 6); f_u12_l = EXTRACT_LSB0_UINT (insn, 32, 5, 6); { - f_u12 = ((((f_u12_h) << (6))) | (f_u12_l)); + f_u12 = ((((f_u12_h) * (64))) | (f_u12_l)); } /* Record the fields for the semantic handler. */ diff --git a/sim/frv/decode.h b/sim/frv/decode.h index 4b2be35..cd7f711 100644 --- a/sim/frv/decode.h +++ b/sim/frv/decode.h @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/model.c b/sim/frv/model.c index 8a67c82..30a6bad 100644 --- a/sim/frv/model.c +++ b/sim/frv/model.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ diff --git a/sim/frv/sem.c b/sim/frv/sem.c index d7e54d6..20ac47b 100644 --- a/sim/frv/sem.c +++ b/sim/frv/sem.c @@ -2,7 +2,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright 1996-2023 Free Software Foundation, Inc. +Copyright (C) 1996-2023 Free Software Foundation, Inc. This file is part of the GNU simulators. @@ -17,7 +17,8 @@ This file is part of the GNU simulators. License for more details. You should have received a copy of the GNU General Public License along - with this program; if not, see <http://www.gnu.org/licenses/>. + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |