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-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/po/opcodes.pot782
-rw-r--r--opcodes/z80-dis.c624
3 files changed, 878 insertions, 532 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c78b42b..e3be019 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ * z80-dis.c: Add support for eZ80 and Z80 instructions.
+
2020-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
diff --git a/opcodes/po/opcodes.pot b/opcodes/po/opcodes.pot
index ccfa503..11de499 100644
--- a/opcodes/po/opcodes.pot
+++ b/opcodes/po/opcodes.pot
@@ -8,7 +8,7 @@ msgid ""
msgstr ""
"Project-Id-Version: PACKAGE VERSION\n"
"Report-Msgid-Bugs-To: bug-binutils@gnu.org\n"
-"POT-Creation-Date: 2019-01-19 16:35+0000\n"
+"POT-Creation-Date: 2020-01-02 11:10+0000\n"
"PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
"Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
"Language-Team: LANGUAGE <LL@li.org>\n"
@@ -17,21 +17,21 @@ msgstr ""
"Content-Type: text/plain; charset=CHARSET\n"
"Content-Transfer-Encoding: 8bit\n"
-#: aarch64-asm.c:819
+#: aarch64-asm.c:809
msgid "specified register cannot be read from"
msgstr ""
-#: aarch64-asm.c:828
+#: aarch64-asm.c:818
msgid "specified register cannot be written to"
msgstr ""
#. Invalid option.
-#: aarch64-dis.c:92 arc-dis.c:782 arm-dis.c:6174
+#: aarch64-dis.c:93 arc-dis.c:801 arm-dis.c:11328
#, c-format
msgid "unrecognised disassembler option: %s"
msgstr ""
-#: aarch64-dis.c:3448
+#: aarch64-dis.c:3521
#, c-format
msgid ""
"\n"
@@ -39,299 +39,299 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: aarch64-dis.c:3452
+#: aarch64-dis.c:3525
#, c-format
msgid ""
"\n"
" no-aliases Don't print instruction aliases.\n"
msgstr ""
-#: aarch64-dis.c:3455
+#: aarch64-dis.c:3528
#, c-format
msgid ""
"\n"
" aliases Do print instruction aliases.\n"
msgstr ""
-#: aarch64-dis.c:3458
+#: aarch64-dis.c:3531
#, c-format
msgid ""
"\n"
" no-notes Don't print instruction notes.\n"
msgstr ""
-#: aarch64-dis.c:3461
+#: aarch64-dis.c:3534
#, c-format
msgid ""
"\n"
" notes Do print instruction notes.\n"
msgstr ""
-#: aarch64-dis.c:3465
+#: aarch64-dis.c:3538
#, c-format
msgid ""
"\n"
" debug_dump Temp switch for debug trace.\n"
msgstr ""
-#: aarch64-dis.c:3469 mips-dis.c:2773 mips-dis.c:2783 mips-dis.c:2786
-#: nfp-dis.c:2981 riscv-dis.c:552
+#: aarch64-dis.c:3542 mips-dis.c:2778 mips-dis.c:2788 mips-dis.c:2791
+#: nfp-dis.c:2981 riscv-dis.c:556
#, c-format
msgid "\n"
msgstr ""
-#: aarch64-opc.c:1339
+#: aarch64-opc.c:1346
msgid "immediate value"
msgstr ""
-#: aarch64-opc.c:1349
+#: aarch64-opc.c:1356
msgid "immediate offset"
msgstr ""
-#: aarch64-opc.c:1359
+#: aarch64-opc.c:1366
msgid "register number"
msgstr ""
-#: aarch64-opc.c:1369
+#: aarch64-opc.c:1376
msgid "register element index"
msgstr ""
-#: aarch64-opc.c:1379
+#: aarch64-opc.c:1386
msgid "shift amount"
msgstr ""
-#: aarch64-opc.c:1391
+#: aarch64-opc.c:1398
msgid "multiplier"
msgstr ""
-#: aarch64-opc.c:1464
+#: aarch64-opc.c:1471
msgid "reg pair must start from even reg"
msgstr ""
-#: aarch64-opc.c:1470
+#: aarch64-opc.c:1477
msgid "reg pair must be contiguous"
msgstr ""
-#: aarch64-opc.c:1484
+#: aarch64-opc.c:1491
msgid "extraneous register"
msgstr ""
-#: aarch64-opc.c:1490
+#: aarch64-opc.c:1497
msgid "missing register"
msgstr ""
-#: aarch64-opc.c:1501
+#: aarch64-opc.c:1508
msgid "stack pointer register expected"
msgstr ""
-#: aarch64-opc.c:1524
+#: aarch64-opc.c:1533
msgid "z0-z15 expected"
msgstr ""
-#: aarch64-opc.c:1525
+#: aarch64-opc.c:1534
msgid "z0-z7 expected"
msgstr ""
-#: aarch64-opc.c:1551
+#: aarch64-opc.c:1560
msgid "invalid register list"
msgstr ""
-#: aarch64-opc.c:1565
+#: aarch64-opc.c:1574
msgid "p0-p7 expected"
msgstr ""
-#: aarch64-opc.c:1591 aarch64-opc.c:1599
+#: aarch64-opc.c:1600 aarch64-opc.c:1608
msgid "unexpected address writeback"
msgstr ""
-#: aarch64-opc.c:1611
+#: aarch64-opc.c:1619
msgid "address writeback expected"
msgstr ""
-#: aarch64-opc.c:1658
+#: aarch64-opc.c:1666
msgid "negative or unaligned offset expected"
msgstr ""
-#: aarch64-opc.c:1715
+#: aarch64-opc.c:1723
msgid "invalid register offset"
msgstr ""
-#: aarch64-opc.c:1737
+#: aarch64-opc.c:1745
msgid "invalid post-increment amount"
msgstr ""
-#: aarch64-opc.c:1753 aarch64-opc.c:2247
+#: aarch64-opc.c:1761 aarch64-opc.c:2269
msgid "invalid shift amount"
msgstr ""
-#: aarch64-opc.c:1766
+#: aarch64-opc.c:1774
msgid "invalid extend/shift operator"
msgstr ""
-#: aarch64-opc.c:1812 aarch64-opc.c:2052 aarch64-opc.c:2087 aarch64-opc.c:2106
-#: aarch64-opc.c:2114 aarch64-opc.c:2201 aarch64-opc.c:2377 aarch64-opc.c:2477
-#: aarch64-opc.c:2490
+#: aarch64-opc.c:1820 aarch64-opc.c:2072 aarch64-opc.c:2107 aarch64-opc.c:2126
+#: aarch64-opc.c:2134 aarch64-opc.c:2222 aarch64-opc.c:2399 aarch64-opc.c:2499
+#: aarch64-opc.c:2512
msgid "immediate out of range"
msgstr ""
-#: aarch64-opc.c:1834 aarch64-opc.c:1876 aarch64-opc.c:1926 aarch64-opc.c:1960
+#: aarch64-opc.c:1842 aarch64-opc.c:1884 aarch64-opc.c:1946 aarch64-opc.c:1980
msgid "invalid addressing mode"
msgstr ""
-#: aarch64-opc.c:1918
+#: aarch64-opc.c:1938
msgid "index register xzr is not allowed"
msgstr ""
-#: aarch64-opc.c:2040 aarch64-opc.c:2062 aarch64-opc.c:2280 aarch64-opc.c:2288
-#: aarch64-opc.c:2354 aarch64-opc.c:2383
+#: aarch64-opc.c:2060 aarch64-opc.c:2082 aarch64-opc.c:2302 aarch64-opc.c:2310
+#: aarch64-opc.c:2376 aarch64-opc.c:2405
msgid "invalid shift operator"
msgstr ""
-#: aarch64-opc.c:2046
+#: aarch64-opc.c:2066
msgid "shift amount must be 0 or 12"
msgstr ""
-#: aarch64-opc.c:2069
+#: aarch64-opc.c:2089
msgid "shift amount must be a multiple of 16"
msgstr ""
-#: aarch64-opc.c:2081
+#: aarch64-opc.c:2101
msgid "negative immediate value not allowed"
msgstr ""
-#: aarch64-opc.c:2212
+#: aarch64-opc.c:2233
msgid "immediate zero expected"
msgstr ""
-#: aarch64-opc.c:2226
+#: aarch64-opc.c:2247
msgid "rotate expected to be 0, 90, 180 or 270"
msgstr ""
-#: aarch64-opc.c:2236
+#: aarch64-opc.c:2258
msgid "rotate expected to be 90 or 270"
msgstr ""
-#: aarch64-opc.c:2296
+#: aarch64-opc.c:2318
msgid "shift is not permitted"
msgstr ""
-#: aarch64-opc.c:2321
+#: aarch64-opc.c:2343
msgid "invalid value for immediate"
msgstr ""
-#: aarch64-opc.c:2346
+#: aarch64-opc.c:2368
msgid "shift amount must be 0 or 16"
msgstr ""
-#: aarch64-opc.c:2367
+#: aarch64-opc.c:2389
msgid "floating-point immediate expected"
msgstr ""
-#: aarch64-opc.c:2401
+#: aarch64-opc.c:2423
msgid "no shift amount allowed for 8-bit constants"
msgstr ""
-#: aarch64-opc.c:2411
+#: aarch64-opc.c:2433
msgid "shift amount must be 0 or 8"
msgstr ""
-#: aarch64-opc.c:2424
+#: aarch64-opc.c:2446
msgid "immediate too big for element size"
msgstr ""
-#: aarch64-opc.c:2431
+#: aarch64-opc.c:2453
msgid "invalid arithmetic immediate"
msgstr ""
-#: aarch64-opc.c:2445
+#: aarch64-opc.c:2467
msgid "floating-point value must be 0.5 or 1.0"
msgstr ""
-#: aarch64-opc.c:2455
+#: aarch64-opc.c:2477
msgid "floating-point value must be 0.5 or 2.0"
msgstr ""
-#: aarch64-opc.c:2465
+#: aarch64-opc.c:2487
msgid "floating-point value must be 0.0 or 1.0"
msgstr ""
-#: aarch64-opc.c:2496
+#: aarch64-opc.c:2518
msgid "invalid replicated MOV immediate"
msgstr ""
-#: aarch64-opc.c:2614
+#: aarch64-opc.c:2639
msgid "extend operator expected"
msgstr ""
-#: aarch64-opc.c:2627
+#: aarch64-opc.c:2652
msgid "missing extend operator"
msgstr ""
-#: aarch64-opc.c:2633
+#: aarch64-opc.c:2658
msgid "'LSL' operator not allowed"
msgstr ""
-#: aarch64-opc.c:2654
+#: aarch64-opc.c:2679
msgid "W register expected"
msgstr ""
-#: aarch64-opc.c:2665
+#: aarch64-opc.c:2690
msgid "shift operator expected"
msgstr ""
-#: aarch64-opc.c:2672
+#: aarch64-opc.c:2697
msgid "'ROR' operator not allowed"
msgstr ""
-#: aarch64-opc.c:3671
+#: aarch64-opc.c:3711
msgid "reading from a write-only register"
msgstr ""
-#: aarch64-opc.c:3673
+#: aarch64-opc.c:3713
msgid "writing to a read-only register"
msgstr ""
-#: aarch64-opc.c:4815
+#: aarch64-opc.c:4880
msgid "instruction opens new dependency sequence without ending previous one"
msgstr ""
-#: aarch64-opc.c:4835
+#: aarch64-opc.c:4900
msgid "previous `movprfx' sequence not closed"
msgstr ""
-#: aarch64-opc.c:4852
+#: aarch64-opc.c:4919
msgid "SVE instruction expected after `movprfx'"
msgstr ""
-#: aarch64-opc.c:4865
+#: aarch64-opc.c:4932
msgid "SVE `movprfx' compatible instruction expected"
msgstr ""
-#: aarch64-opc.c:4956
+#: aarch64-opc.c:5019
msgid "predicated instruction expected after `movprfx'"
msgstr ""
-#: aarch64-opc.c:4968
+#: aarch64-opc.c:5031
msgid "merging predicate expected due to preceding `movprfx'"
msgstr ""
-#: aarch64-opc.c:4980
+#: aarch64-opc.c:5043
msgid "predicate register differs from that in preceding `movprfx'"
msgstr ""
-#: aarch64-opc.c:4999
+#: aarch64-opc.c:5062
msgid "output register of preceding `movprfx' not used in current instruction"
msgstr ""
-#: aarch64-opc.c:5012
+#: aarch64-opc.c:5075
msgid "output register of preceding `movprfx' expected as output"
msgstr ""
-#: aarch64-opc.c:5024
+#: aarch64-opc.c:5087
msgid "output register of preceding `movprfx' used as input"
msgstr ""
-#: aarch64-opc.c:5040
+#: aarch64-opc.c:5103
msgid "register size not compatible with previous `movprfx'"
msgstr ""
@@ -343,7 +343,7 @@ msgstr ""
msgid "jump hint unaligned"
msgstr ""
-#: arc-dis.c:377
+#: arc-dis.c:379
msgid ""
"\n"
"Warning: disassembly may be wrong due to guessed opcode class choice.\n"
@@ -351,12 +351,12 @@ msgid ""
"\t\t\t\t"
msgstr ""
-#: arc-dis.c:825
+#: arc-dis.c:844
#, c-format
msgid "unrecognised disassembler CPU option: %s"
msgstr ""
-#: arc-dis.c:1387
+#: arc-dis.c:1411
#, c-format
msgid ""
"\n"
@@ -364,42 +364,47 @@ msgid ""
"with -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: arc-dis.c:1399
+#: arc-dis.c:1423
#, c-format
msgid " dsp Recognize DSP instructions.\n"
msgstr ""
-#: arc-dis.c:1401
+#: arc-dis.c:1425
#, c-format
msgid " spfp Recognize FPX SP instructions.\n"
msgstr ""
-#: arc-dis.c:1403
+#: arc-dis.c:1427
#, c-format
msgid " dpfp Recognize FPX DP instructions.\n"
msgstr ""
-#: arc-dis.c:1405
+#: arc-dis.c:1429
#, c-format
msgid " quarkse_em Recognize FPU QuarkSE-EM instructions.\n"
msgstr ""
-#: arc-dis.c:1407
+#: arc-dis.c:1431
#, c-format
msgid " fpuda Recognize double assist FPU instructions.\n"
msgstr ""
-#: arc-dis.c:1409
+#: arc-dis.c:1433
#, c-format
msgid " fpus Recognize single precision FPU instructions.\n"
msgstr ""
-#: arc-dis.c:1411
+#: arc-dis.c:1435
#, c-format
msgid " fpud Recognize double precision FPU instructions.\n"
msgstr ""
-#: arc-dis.c:1413
+#: arc-dis.c:1437
+#, c-format
+msgid " nps400 Recognize NPS400 instructions.\n"
+msgstr ""
+
+#: arc-dis.c:1439
#, c-format
msgid " hex Use only hexadecimal number to print immediates.\n"
msgstr ""
@@ -565,48 +570,48 @@ msgstr ""
msgid "invalid position, should be one of: 0,4,8,...124."
msgstr ""
-#: arm-dis.c:3242
+#: arm-dis.c:5105
msgid "Select raw register names"
msgstr ""
-#: arm-dis.c:3244
+#: arm-dis.c:5107
msgid "Select register names used by GCC"
msgstr ""
-#: arm-dis.c:3246
+#: arm-dis.c:5109
msgid "Select register names used in ARM's ISA documentation"
msgstr ""
-#: arm-dis.c:3248
+#: arm-dis.c:5111
msgid "Assume all insns are Thumb insns"
msgstr ""
-#: arm-dis.c:3249
+#: arm-dis.c:5112
msgid "Examine preceding label to determine an insn's type"
msgstr ""
-#: arm-dis.c:3250
+#: arm-dis.c:5113
msgid "Select register names used in the APCS"
msgstr ""
-#: arm-dis.c:3252
+#: arm-dis.c:5115
msgid "Select register names used in the ATPCS"
msgstr ""
-#: arm-dis.c:3254
+#: arm-dis.c:5117
msgid "Select special register names used in the ATPCS"
msgstr ""
-#: arm-dis.c:3652
+#: arm-dis.c:8286
msgid "<illegal precision>"
msgstr ""
-#: arm-dis.c:6165
+#: arm-dis.c:11319
#, c-format
msgid "unrecognised register name set: %s"
msgstr ""
-#: arm-dis.c:6906
+#: arm-dis.c:12018
#, c-format
msgid ""
"\n"
@@ -619,257 +624,280 @@ msgstr ""
msgid "undefined"
msgstr ""
-#: avr-dis.c:216
+#: avr-dis.c:218
#, c-format
msgid "internal disassembler error"
msgstr ""
-#: avr-dis.c:270
+#: avr-dis.c:272
#, c-format
msgid "unknown constraint `%c'"
msgstr ""
-#: cgen-asm.c:351 epiphany-ibld.c:201 fr30-ibld.c:201 frv-ibld.c:201
-#: ip2k-ibld.c:201 iq2000-ibld.c:201 lm32-ibld.c:201 m32c-ibld.c:201
-#: m32r-ibld.c:201 mep-ibld.c:201 mt-ibld.c:201 or1k-ibld.c:201
-#: xc16x-ibld.c:201 xstormy16-ibld.c:201
-#, c-format
-msgid "operand out of range (%ld not between %ld and %ld)"
-msgstr ""
-
-#: cgen-asm.c:373
-#, c-format
-msgid "operand out of range (%lu not between %lu and %lu)"
-msgstr ""
-
-#: d30v-dis.c:229
-#, c-format
-msgid "illegal id (%d)"
-msgstr ""
-
-#: d30v-dis.c:256
-#, c-format
-msgid "<unknown register %d>"
-msgstr ""
-
-#. Can't happen.
-#: dis-buf.c:61
-#, c-format
-msgid "Unknown error %d\n"
-msgstr ""
-
-#: dis-buf.c:70
-#, c-format
-msgid "Address 0x%s is out of bounds.\n"
-msgstr ""
-
-#: epiphany-asm.c:68
-msgid "register unavailable for short instructions"
-msgstr ""
-
-#: epiphany-asm.c:115
-msgid "register name used as immediate value"
-msgstr ""
-
-#. Don't treat "mov ip,ip" as a move-immediate.
-#: epiphany-asm.c:178 epiphany-asm.c:234
-msgid "register source in immediate move"
-msgstr ""
-
-#: epiphany-asm.c:187
-msgid "byte relocation unsupported"
+#: bpf-asm.c:97
+msgid "expected 16, 32 or 64 in"
msgstr ""
-#. -- assembler routines inserted here.
-#. -- asm.c
-#: epiphany-asm.c:193 frv-asm.c:972 iq2000-asm.c:56 lm32-asm.c:95
-#: lm32-asm.c:127 lm32-asm.c:157 lm32-asm.c:187 lm32-asm.c:217 lm32-asm.c:247
-#: m32c-asm.c:140 m32c-asm.c:235 m32c-asm.c:276 m32c-asm.c:334 m32c-asm.c:355
-#: m32r-asm.c:53 mep-asm.c:241 mep-asm.c:259 mep-asm.c:274 mep-asm.c:289
-#: mep-asm.c:301 or1k-asm.c:54
-msgid "missing `)'"
-msgstr ""
-
-#: epiphany-asm.c:270
-msgid "ABORT: unknown operand"
-msgstr ""
-
-#: epiphany-asm.c:296
-msgid "Not a pc-relative address."
-msgstr ""
-
-#: epiphany-asm.c:456 fr30-asm.c:311 frv-asm.c:1264 ip2k-asm.c:512
-#: iq2000-asm.c:460 lm32-asm.c:350 m32c-asm.c:1585 m32r-asm.c:329
-#: mep-asm.c:1288 mt-asm.c:596 or1k-asm.c:512 xc16x-asm.c:377
+#: bpf-asm.c:181 epiphany-asm.c:456 fr30-asm.c:311 frv-asm.c:1264
+#: ip2k-asm.c:512 iq2000-asm.c:460 lm32-asm.c:350 m32c-asm.c:1585
+#: m32r-asm.c:329 mep-asm.c:1288 mt-asm.c:596 or1k-asm.c:580 xc16x-asm.c:377
#: xstormy16-asm.c:277
#, c-format
msgid "internal error: unrecognized field %d while parsing"
msgstr ""
-#: epiphany-asm.c:508 fr30-asm.c:363 frv-asm.c:1316 ip2k-asm.c:564
-#: iq2000-asm.c:512 lm32-asm.c:402 m32c-asm.c:1637 m32r-asm.c:381
-#: mep-asm.c:1340 mt-asm.c:648 or1k-asm.c:564 xc16x-asm.c:429
+#: bpf-asm.c:233 epiphany-asm.c:508 fr30-asm.c:363 frv-asm.c:1316
+#: ip2k-asm.c:564 iq2000-asm.c:512 lm32-asm.c:402 m32c-asm.c:1637
+#: m32r-asm.c:381 mep-asm.c:1340 mt-asm.c:648 or1k-asm.c:632 xc16x-asm.c:429
#: xstormy16-asm.c:329
msgid "missing mnemonic in syntax string"
msgstr ""
#. We couldn't parse it.
-#: epiphany-asm.c:643 epiphany-asm.c:647 epiphany-asm.c:736 epiphany-asm.c:843
-#: fr30-asm.c:498 fr30-asm.c:502 fr30-asm.c:591 fr30-asm.c:698 frv-asm.c:1451
-#: frv-asm.c:1455 frv-asm.c:1544 frv-asm.c:1651 ip2k-asm.c:699 ip2k-asm.c:703
-#: ip2k-asm.c:792 ip2k-asm.c:899 iq2000-asm.c:647 iq2000-asm.c:651
-#: iq2000-asm.c:740 iq2000-asm.c:847 lm32-asm.c:537 lm32-asm.c:541
-#: lm32-asm.c:630 lm32-asm.c:737 m32c-asm.c:1772 m32c-asm.c:1776
-#: m32c-asm.c:1865 m32c-asm.c:1972 m32r-asm.c:516 m32r-asm.c:520 m32r-asm.c:609
-#: m32r-asm.c:716 mep-asm.c:1475 mep-asm.c:1479 mep-asm.c:1568 mep-asm.c:1675
-#: mt-asm.c:783 mt-asm.c:787 mt-asm.c:876 mt-asm.c:983 or1k-asm.c:699
-#: or1k-asm.c:703 or1k-asm.c:792 or1k-asm.c:899 xc16x-asm.c:564 xc16x-asm.c:568
-#: xc16x-asm.c:657 xc16x-asm.c:764 xstormy16-asm.c:464 xstormy16-asm.c:468
-#: xstormy16-asm.c:557 xstormy16-asm.c:664
+#: bpf-asm.c:368 bpf-asm.c:372 bpf-asm.c:461 bpf-asm.c:568 epiphany-asm.c:643
+#: epiphany-asm.c:647 epiphany-asm.c:736 epiphany-asm.c:843 fr30-asm.c:498
+#: fr30-asm.c:502 fr30-asm.c:591 fr30-asm.c:698 frv-asm.c:1451 frv-asm.c:1455
+#: frv-asm.c:1544 frv-asm.c:1651 ip2k-asm.c:699 ip2k-asm.c:703 ip2k-asm.c:792
+#: ip2k-asm.c:899 iq2000-asm.c:647 iq2000-asm.c:651 iq2000-asm.c:740
+#: iq2000-asm.c:847 lm32-asm.c:537 lm32-asm.c:541 lm32-asm.c:630 lm32-asm.c:737
+#: m32c-asm.c:1772 m32c-asm.c:1776 m32c-asm.c:1865 m32c-asm.c:1972
+#: m32r-asm.c:516 m32r-asm.c:520 m32r-asm.c:609 m32r-asm.c:716 mep-asm.c:1475
+#: mep-asm.c:1479 mep-asm.c:1568 mep-asm.c:1675 mt-asm.c:783 mt-asm.c:787
+#: mt-asm.c:876 mt-asm.c:983 or1k-asm.c:767 or1k-asm.c:771 or1k-asm.c:860
+#: or1k-asm.c:967 xc16x-asm.c:564 xc16x-asm.c:568 xc16x-asm.c:657
+#: xc16x-asm.c:764 xstormy16-asm.c:464 xstormy16-asm.c:468 xstormy16-asm.c:557
+#: xstormy16-asm.c:664
msgid "unrecognized instruction"
msgstr ""
-#: epiphany-asm.c:690 fr30-asm.c:545 frv-asm.c:1498 ip2k-asm.c:746
-#: iq2000-asm.c:694 lm32-asm.c:584 m32c-asm.c:1819 m32r-asm.c:563
-#: mep-asm.c:1522 mt-asm.c:830 or1k-asm.c:746 xc16x-asm.c:611
+#: bpf-asm.c:415 epiphany-asm.c:690 fr30-asm.c:545 frv-asm.c:1498
+#: ip2k-asm.c:746 iq2000-asm.c:694 lm32-asm.c:584 m32c-asm.c:1819
+#: m32r-asm.c:563 mep-asm.c:1522 mt-asm.c:830 or1k-asm.c:814 xc16x-asm.c:611
#: xstormy16-asm.c:511
#, c-format
msgid "syntax error (expected char `%c', found `%c')"
msgstr ""
-#: epiphany-asm.c:700 fr30-asm.c:555 frv-asm.c:1508 ip2k-asm.c:756
-#: iq2000-asm.c:704 lm32-asm.c:594 m32c-asm.c:1829 m32r-asm.c:573
-#: mep-asm.c:1532 mt-asm.c:840 or1k-asm.c:756 xc16x-asm.c:621
+#: bpf-asm.c:425 epiphany-asm.c:700 fr30-asm.c:555 frv-asm.c:1508
+#: ip2k-asm.c:756 iq2000-asm.c:704 lm32-asm.c:594 m32c-asm.c:1829
+#: m32r-asm.c:573 mep-asm.c:1532 mt-asm.c:840 or1k-asm.c:824 xc16x-asm.c:621
#: xstormy16-asm.c:521
#, c-format
msgid "syntax error (expected char `%c', found end of instruction)"
msgstr ""
-#: epiphany-asm.c:730 fr30-asm.c:585 frv-asm.c:1538 ip2k-asm.c:786
-#: iq2000-asm.c:734 lm32-asm.c:624 m32c-asm.c:1859 m32r-asm.c:603
-#: mep-asm.c:1562 mt-asm.c:870 or1k-asm.c:786 xc16x-asm.c:651
+#: bpf-asm.c:455 epiphany-asm.c:730 fr30-asm.c:585 frv-asm.c:1538
+#: ip2k-asm.c:786 iq2000-asm.c:734 lm32-asm.c:624 m32c-asm.c:1859
+#: m32r-asm.c:603 mep-asm.c:1562 mt-asm.c:870 or1k-asm.c:854 xc16x-asm.c:651
#: xstormy16-asm.c:551
msgid "junk at end of line"
msgstr ""
-#: epiphany-asm.c:842 fr30-asm.c:697 frv-asm.c:1650 ip2k-asm.c:898
-#: iq2000-asm.c:846 lm32-asm.c:736 m32c-asm.c:1971 m32r-asm.c:715
-#: mep-asm.c:1674 mt-asm.c:982 or1k-asm.c:898 xc16x-asm.c:763
+#: bpf-asm.c:567 epiphany-asm.c:842 fr30-asm.c:697 frv-asm.c:1650
+#: ip2k-asm.c:898 iq2000-asm.c:846 lm32-asm.c:736 m32c-asm.c:1971
+#: m32r-asm.c:715 mep-asm.c:1674 mt-asm.c:982 or1k-asm.c:966 xc16x-asm.c:763
#: xstormy16-asm.c:663
msgid "unrecognized form of instruction"
msgstr ""
-#: epiphany-asm.c:856 fr30-asm.c:711 frv-asm.c:1664 ip2k-asm.c:912
-#: iq2000-asm.c:860 lm32-asm.c:750 m32c-asm.c:1985 m32r-asm.c:729
-#: mep-asm.c:1688 mt-asm.c:996 or1k-asm.c:912 xc16x-asm.c:777
+#: bpf-asm.c:581 epiphany-asm.c:856 fr30-asm.c:711 frv-asm.c:1664
+#: ip2k-asm.c:912 iq2000-asm.c:860 lm32-asm.c:750 m32c-asm.c:1985
+#: m32r-asm.c:729 mep-asm.c:1688 mt-asm.c:996 or1k-asm.c:980 xc16x-asm.c:777
#: xstormy16-asm.c:677
#, c-format
msgid "bad instruction `%.50s...'"
msgstr ""
-#: epiphany-asm.c:859 fr30-asm.c:714 frv-asm.c:1667 ip2k-asm.c:915
-#: iq2000-asm.c:863 lm32-asm.c:753 m32c-asm.c:1988 m32r-asm.c:732
-#: mep-asm.c:1691 mt-asm.c:999 or1k-asm.c:915 xc16x-asm.c:780
+#: bpf-asm.c:584 epiphany-asm.c:859 fr30-asm.c:714 frv-asm.c:1667
+#: ip2k-asm.c:915 iq2000-asm.c:863 lm32-asm.c:753 m32c-asm.c:1988
+#: m32r-asm.c:732 mep-asm.c:1691 mt-asm.c:999 or1k-asm.c:983 xc16x-asm.c:780
#: xstormy16-asm.c:680
#, c-format
msgid "bad instruction `%.50s'"
msgstr ""
-#: epiphany-desc.c:2109
+#: bpf-desc.c:1441
#, c-format
msgid ""
-"internal error: epiphany_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"internal error: bpf_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
"values: `%d' vs. `%d'"
msgstr ""
-#: epiphany-desc.c:2192
+#: bpf-desc.c:1524
#, c-format
-msgid "internal error: epiphany_cgen_cpu_open: unsupported argument `%d'"
+msgid "internal error: bpf_cgen_cpu_open: unsupported argument `%d'"
msgstr ""
-#: epiphany-desc.c:2211
+#: bpf-desc.c:1543
#, c-format
-msgid "internal error: epiphany_cgen_cpu_open: no endianness specified"
+msgid "internal error: bpf_cgen_cpu_open: no endianness specified"
msgstr ""
#. Default text to print if an instruction isn't recognized.
-#: epiphany-dis.c:41 fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41 iq2000-dis.c:41
-#: lm32-dis.c:41 m32c-dis.c:41 m32r-dis.c:41 mep-dis.c:41 mmix-dis.c:275
-#: mt-dis.c:41 nds32-dis.c:64 or1k-dis.c:41 xc16x-dis.c:41 xstormy16-dis.c:41
+#: bpf-dis.c:41 epiphany-dis.c:41 fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41
+#: iq2000-dis.c:41 lm32-dis.c:41 m32c-dis.c:41 m32r-dis.c:41 mep-dis.c:41
+#: mmix-dis.c:293 mt-dis.c:41 nds32-dis.c:64 or1k-dis.c:41 xc16x-dis.c:41
+#: xstormy16-dis.c:41
msgid "*unknown*"
msgstr ""
-#: epiphany-dis.c:279 fr30-dis.c:300 frv-dis.c:397 ip2k-dis.c:289
+#: bpf-dis.c:203 epiphany-dis.c:279 fr30-dis.c:300 frv-dis.c:397 ip2k-dis.c:289
#: iq2000-dis.c:190 lm32-dis.c:148 m32c-dis.c:892 m32r-dis.c:280 mep-dis.c:1188
-#: mt-dis.c:291 or1k-dis.c:145 xc16x-dis.c:421 xstormy16-dis.c:169
+#: mt-dis.c:291 or1k-dis.c:184 xc16x-dis.c:421 xstormy16-dis.c:169
#, c-format
msgid "internal error: unrecognized field %d while printing insn"
msgstr ""
-#: epiphany-ibld.c:164 fr30-ibld.c:164 frv-ibld.c:164 ip2k-ibld.c:164
-#: iq2000-ibld.c:164 lm32-ibld.c:164 m32c-ibld.c:164 m32r-ibld.c:164
-#: mep-ibld.c:164 mt-ibld.c:164 or1k-ibld.c:164 xc16x-ibld.c:164
-#: xstormy16-ibld.c:164
+#: bpf-ibld.c:164 epiphany-ibld.c:164 fr30-ibld.c:164 frv-ibld.c:164
+#: ip2k-ibld.c:164 iq2000-ibld.c:164 lm32-ibld.c:164 m32c-ibld.c:164
+#: m32r-ibld.c:164 mep-ibld.c:164 mt-ibld.c:164 or1k-ibld.c:164
+#: xc16x-ibld.c:164 xstormy16-ibld.c:164
#, c-format
msgid "operand out of range (%ld not between %ld and %lu)"
msgstr ""
-#: epiphany-ibld.c:185 fr30-ibld.c:185 frv-ibld.c:185 ip2k-ibld.c:185
-#: iq2000-ibld.c:185 lm32-ibld.c:185 m32c-ibld.c:185 m32r-ibld.c:185
-#: mep-ibld.c:185 mt-ibld.c:185 or1k-ibld.c:185 xc16x-ibld.c:185
-#: xstormy16-ibld.c:185
+#: bpf-ibld.c:185 epiphany-ibld.c:185 fr30-ibld.c:185 frv-ibld.c:185
+#: ip2k-ibld.c:185 iq2000-ibld.c:185 lm32-ibld.c:185 m32c-ibld.c:185
+#: m32r-ibld.c:185 mep-ibld.c:185 mt-ibld.c:185 or1k-ibld.c:185
+#: xc16x-ibld.c:185 xstormy16-ibld.c:185
#, c-format
msgid "operand out of range (0x%lx not between 0 and 0x%lx)"
msgstr ""
-#: epiphany-ibld.c:880 fr30-ibld.c:735 frv-ibld.c:861 ip2k-ibld.c:612
-#: iq2000-ibld.c:718 lm32-ibld.c:639 m32c-ibld.c:1736 m32r-ibld.c:670
-#: mep-ibld.c:1213 mt-ibld.c:754 or1k-ibld.c:658 xc16x-ibld.c:757
-#: xstormy16-ibld.c:683
+#: bpf-ibld.c:201 cgen-asm.c:351 epiphany-ibld.c:201 fr30-ibld.c:201
+#: frv-ibld.c:201 ip2k-ibld.c:201 iq2000-ibld.c:201 lm32-ibld.c:201
+#: m32c-ibld.c:201 m32r-ibld.c:201 mep-ibld.c:201 mt-ibld.c:201 or1k-ibld.c:201
+#: xc16x-ibld.c:201 xstormy16-ibld.c:201
+#, c-format
+msgid "operand out of range (%ld not between %ld and %ld)"
+msgstr ""
+
+#: bpf-ibld.c:625 epiphany-ibld.c:880 fr30-ibld.c:735 frv-ibld.c:861
+#: ip2k-ibld.c:612 iq2000-ibld.c:718 lm32-ibld.c:639 m32c-ibld.c:1736
+#: m32r-ibld.c:670 mep-ibld.c:1213 mt-ibld.c:754 or1k-ibld.c:742
+#: xc16x-ibld.c:757 xstormy16-ibld.c:683
#, c-format
msgid "internal error: unrecognized field %d while building insn"
msgstr ""
-#: epiphany-ibld.c:1175 fr30-ibld.c:941 frv-ibld.c:1179 ip2k-ibld.c:688
-#: iq2000-ibld.c:894 lm32-ibld.c:744 m32c-ibld.c:2898 m32r-ibld.c:808
-#: mep-ibld.c:1813 mt-ibld.c:975 or1k-ibld.c:772 xc16x-ibld.c:978
-#: xstormy16-ibld.c:830
+#: bpf-ibld.c:709 epiphany-ibld.c:1175 fr30-ibld.c:941 frv-ibld.c:1179
+#: ip2k-ibld.c:688 iq2000-ibld.c:894 lm32-ibld.c:744 m32c-ibld.c:2898
+#: m32r-ibld.c:808 mep-ibld.c:1813 mt-ibld.c:975 or1k-ibld.c:910
+#: xc16x-ibld.c:978 xstormy16-ibld.c:830
#, c-format
msgid "internal error: unrecognized field %d while decoding insn"
msgstr ""
-#: epiphany-ibld.c:1319 fr30-ibld.c:1088 frv-ibld.c:1458 ip2k-ibld.c:763
-#: iq2000-ibld.c:1026 lm32-ibld.c:834 m32c-ibld.c:3516 m32r-ibld.c:922
-#: mep-ibld.c:2284 mt-ibld.c:1176 or1k-ibld.c:859 xc16x-ibld.c:1200
-#: xstormy16-ibld.c:941
+#: bpf-ibld.c:778 epiphany-ibld.c:1319 fr30-ibld.c:1088 frv-ibld.c:1458
+#: ip2k-ibld.c:763 iq2000-ibld.c:1026 lm32-ibld.c:834 m32c-ibld.c:3516
+#: m32r-ibld.c:922 mep-ibld.c:2284 mt-ibld.c:1176 or1k-ibld.c:1015
+#: xc16x-ibld.c:1200 xstormy16-ibld.c:941
#, c-format
msgid "internal error: unrecognized field %d while getting int operand"
msgstr ""
-#: epiphany-ibld.c:1445 fr30-ibld.c:1217 frv-ibld.c:1719 ip2k-ibld.c:820
-#: iq2000-ibld.c:1140 lm32-ibld.c:906 m32c-ibld.c:4116 m32r-ibld.c:1018
-#: mep-ibld.c:2737 mt-ibld.c:1359 or1k-ibld.c:928 xc16x-ibld.c:1404
-#: xstormy16-ibld.c:1034
+#: bpf-ibld.c:829 epiphany-ibld.c:1445 fr30-ibld.c:1217 frv-ibld.c:1719
+#: ip2k-ibld.c:820 iq2000-ibld.c:1140 lm32-ibld.c:906 m32c-ibld.c:4116
+#: m32r-ibld.c:1018 mep-ibld.c:2737 mt-ibld.c:1359 or1k-ibld.c:1102
+#: xc16x-ibld.c:1404 xstormy16-ibld.c:1034
#, c-format
msgid "internal error: unrecognized field %d while getting vma operand"
msgstr ""
-#: epiphany-ibld.c:1578 fr30-ibld.c:1349 frv-ibld.c:1987 ip2k-ibld.c:880
-#: iq2000-ibld.c:1261 lm32-ibld.c:985 m32c-ibld.c:4704 m32r-ibld.c:1120
-#: mep-ibld.c:3151 mt-ibld.c:1549 or1k-ibld.c:1004 xc16x-ibld.c:1609
-#: xstormy16-ibld.c:1134
+#: bpf-ibld.c:887 epiphany-ibld.c:1578 fr30-ibld.c:1349 frv-ibld.c:1987
+#: ip2k-ibld.c:880 iq2000-ibld.c:1261 lm32-ibld.c:985 m32c-ibld.c:4704
+#: m32r-ibld.c:1120 mep-ibld.c:3151 mt-ibld.c:1549 or1k-ibld.c:1196
+#: xc16x-ibld.c:1609 xstormy16-ibld.c:1134
#, c-format
msgid "internal error: unrecognized field %d while setting int operand"
msgstr ""
-#: epiphany-ibld.c:1701 fr30-ibld.c:1471 frv-ibld.c:2245 ip2k-ibld.c:930
-#: iq2000-ibld.c:1372 lm32-ibld.c:1054 m32c-ibld.c:5282 m32r-ibld.c:1212
-#: mep-ibld.c:3555 mt-ibld.c:1729 or1k-ibld.c:1070 xc16x-ibld.c:1804
-#: xstormy16-ibld.c:1224
+#: bpf-ibld.c:935 epiphany-ibld.c:1701 fr30-ibld.c:1471 frv-ibld.c:2245
+#: ip2k-ibld.c:930 iq2000-ibld.c:1372 lm32-ibld.c:1054 m32c-ibld.c:5282
+#: m32r-ibld.c:1212 mep-ibld.c:3555 mt-ibld.c:1729 or1k-ibld.c:1280
+#: xc16x-ibld.c:1804 xstormy16-ibld.c:1224
#, c-format
msgid "internal error: unrecognized field %d while setting vma operand"
msgstr ""
+#: cgen-asm.c:373
+#, c-format
+msgid "operand out of range (%lu not between %lu and %lu)"
+msgstr ""
+
+#: d30v-dis.c:232
+#, c-format
+msgid "illegal id (%d)"
+msgstr ""
+
+#: d30v-dis.c:259
+#, c-format
+msgid "<unknown register %d>"
+msgstr ""
+
+#. Can't happen.
+#: dis-buf.c:61
+#, c-format
+msgid "Unknown error %d\n"
+msgstr ""
+
+#: dis-buf.c:70
+#, c-format
+msgid "Address 0x%s is out of bounds.\n"
+msgstr ""
+
+#: epiphany-asm.c:68
+msgid "register unavailable for short instructions"
+msgstr ""
+
+#: epiphany-asm.c:115
+msgid "register name used as immediate value"
+msgstr ""
+
+#. Don't treat "mov ip,ip" as a move-immediate.
+#: epiphany-asm.c:178 epiphany-asm.c:234
+msgid "register source in immediate move"
+msgstr ""
+
+#: epiphany-asm.c:187
+msgid "byte relocation unsupported"
+msgstr ""
+
+#. -- assembler routines inserted here.
+#. -- asm.c
+#: epiphany-asm.c:193 frv-asm.c:972 iq2000-asm.c:56 lm32-asm.c:95
+#: lm32-asm.c:127 lm32-asm.c:157 lm32-asm.c:187 lm32-asm.c:217 lm32-asm.c:247
+#: m32c-asm.c:140 m32c-asm.c:235 m32c-asm.c:276 m32c-asm.c:334 m32c-asm.c:355
+#: m32r-asm.c:53 mep-asm.c:241 mep-asm.c:259 mep-asm.c:274 mep-asm.c:289
+#: mep-asm.c:301 or1k-asm.c:54
+msgid "missing `)'"
+msgstr ""
+
+#: epiphany-asm.c:270
+msgid "ABORT: unknown operand"
+msgstr ""
+
+#: epiphany-asm.c:296
+msgid "Not a pc-relative address."
+msgstr ""
+
+#: epiphany-desc.c:2109
+#, c-format
+msgid ""
+"internal error: epiphany_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
+"values: `%d' vs. `%d'"
+msgstr ""
+
+#: epiphany-desc.c:2192
+#, c-format
+msgid "internal error: epiphany_cgen_cpu_open: unsupported argument `%d'"
+msgstr ""
+
+#: epiphany-desc.c:2211
+#, c-format
+msgid "internal error: epiphany_cgen_cpu_open: no endianness specified"
+msgstr ""
+
#: fr30-asm.c:93 m32c-asm.c:872 m32c-asm.c:879
msgid "Register number is not valid"
msgstr ""
@@ -956,21 +984,21 @@ msgstr ""
msgid "internal error, h8_disassemble_init"
msgstr ""
-#: h8300-dis.c:314
+#: h8300-dis.c:315
#, c-format
msgid "Hmmmm 0x%x"
msgstr ""
-#: h8300-dis.c:691
+#: h8300-dis.c:692
#, c-format
msgid "Don't understand 0x%x \n"
msgstr ""
-#: i386-dis.c:11058
+#: i386-dis.c:11060
msgid "<internal disassembler error>"
msgstr ""
-#: i386-dis.c:11353
+#: i386-dis.c:11355
#, c-format
msgid ""
"\n"
@@ -979,145 +1007,145 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: i386-dis.c:11357
+#: i386-dis.c:11359
#, c-format
msgid " x86-64 Disassemble in 64bit mode\n"
msgstr ""
-#: i386-dis.c:11358
+#: i386-dis.c:11360
#, c-format
msgid " i386 Disassemble in 32bit mode\n"
msgstr ""
-#: i386-dis.c:11359
+#: i386-dis.c:11361
#, c-format
msgid " i8086 Disassemble in 16bit mode\n"
msgstr ""
-#: i386-dis.c:11360
+#: i386-dis.c:11362
#, c-format
msgid " att Display instruction in AT&T syntax\n"
msgstr ""
-#: i386-dis.c:11361
+#: i386-dis.c:11363
#, c-format
msgid " intel Display instruction in Intel syntax\n"
msgstr ""
-#: i386-dis.c:11362
+#: i386-dis.c:11364
#, c-format
msgid ""
" att-mnemonic\n"
" Display instruction in AT&T mnemonic\n"
msgstr ""
-#: i386-dis.c:11364
+#: i386-dis.c:11366
#, c-format
msgid ""
" intel-mnemonic\n"
" Display instruction in Intel mnemonic\n"
msgstr ""
-#: i386-dis.c:11366
+#: i386-dis.c:11368
#, c-format
msgid " addr64 Assume 64bit address size\n"
msgstr ""
-#: i386-dis.c:11367
+#: i386-dis.c:11369
#, c-format
msgid " addr32 Assume 32bit address size\n"
msgstr ""
-#: i386-dis.c:11368
+#: i386-dis.c:11370
#, c-format
msgid " addr16 Assume 16bit address size\n"
msgstr ""
-#: i386-dis.c:11369
+#: i386-dis.c:11371
#, c-format
msgid " data32 Assume 32bit data size\n"
msgstr ""
-#: i386-dis.c:11370
+#: i386-dis.c:11372
#, c-format
msgid " data16 Assume 16bit data size\n"
msgstr ""
-#: i386-dis.c:11371
+#: i386-dis.c:11373
#, c-format
msgid " suffix Always display instruction suffix in AT&T syntax\n"
msgstr ""
-#: i386-dis.c:11372
+#: i386-dis.c:11374
#, c-format
msgid " amd64 Display instruction in AMD64 ISA\n"
msgstr ""
-#: i386-dis.c:11373
+#: i386-dis.c:11375
#, c-format
msgid " intel64 Display instruction in Intel64 ISA\n"
msgstr ""
-#: i386-dis.c:11936
+#: i386-dis.c:11938
msgid "64-bit address is disabled"
msgstr ""
-#: i386-gen.c:732
+#: i386-gen.c:754
#, c-format
msgid "%s: error: "
msgstr ""
-#: i386-gen.c:911
+#: i386-gen.c:917
#, c-format
msgid "%s: %d: unknown bitfield: %s\n"
msgstr ""
-#: i386-gen.c:913
+#: i386-gen.c:919
#, c-format
msgid "unknown bitfield: %s\n"
msgstr ""
-#: i386-gen.c:976
+#: i386-gen.c:982
#, c-format
msgid "%s: %d: missing `)' in bitfield: %s\n"
msgstr ""
-#: i386-gen.c:1077
+#: i386-gen.c:1083
#, c-format
msgid "unknown broadcast operand: %s\n"
msgstr ""
-#: i386-gen.c:1478
+#: i386-gen.c:1538
#, c-format
msgid "can't find i386-reg.tbl for reading, errno = %s\n"
msgstr ""
-#: i386-gen.c:1556
+#: i386-gen.c:1616
#, c-format
msgid "can't create i386-init.h, errno = %s\n"
msgstr ""
-#: i386-gen.c:1646 ia64-gen.c:2829
+#: i386-gen.c:1706 ia64-gen.c:2829
#, c-format
msgid "unable to change directory to \"%s\", errno = %s\n"
msgstr ""
-#: i386-gen.c:1658 i386-gen.c:1661
+#: i386-gen.c:1720 i386-gen.c:1725
#, c-format
msgid "CpuMax != %d!\n"
msgstr ""
-#: i386-gen.c:1665
+#: i386-gen.c:1729
#, c-format
msgid "%d unused bits in i386_cpu_flags.\n"
msgstr ""
-#: i386-gen.c:1672
+#: i386-gen.c:1744
#, c-format
msgid "%d unused bits in i386_operand_type.\n"
msgstr ""
-#: i386-gen.c:1686
+#: i386-gen.c:1758
#, c-format
msgid "can't create i386-tbl.h, errno = %s\n"
msgstr ""
@@ -1477,12 +1505,12 @@ msgstr ""
msgid "internal error: m32r_cgen_cpu_open: no endianness specified"
msgstr ""
-#: m68k-dis.c:1292
+#: m68k-dis.c:1294
#, c-format
msgid "<function code %d>"
msgstr ""
-#: m68k-dis.c:1455
+#: m68k-dis.c:1457
#, c-format
msgid "<internal error in opcode table: %s %s>\n"
msgstr ""
@@ -1537,86 +1565,86 @@ msgstr ""
msgid "internal error: mep_cgen_cpu_open: no endianness specified"
msgstr ""
-#: mips-dis.c:1800 mips-dis.c:2026
+#: mips-dis.c:1805 mips-dis.c:2031
#, c-format
msgid "# internal error, undefined operand in `%s %s'"
msgstr ""
-#: mips-dis.c:2615
+#: mips-dis.c:2620
msgid "Use canonical instruction forms.\n"
msgstr ""
-#: mips-dis.c:2617
+#: mips-dis.c:2622
msgid "Recognize MSA instructions.\n"
msgstr ""
-#: mips-dis.c:2619
+#: mips-dis.c:2624
msgid "Recognize the virtualization ASE instructions.\n"
msgstr ""
-#: mips-dis.c:2621
+#: mips-dis.c:2626
msgid ""
"Recognize the eXtended Physical Address (XPA) ASE\n"
" instructions.\n"
msgstr ""
-#: mips-dis.c:2624
+#: mips-dis.c:2629
msgid "Recognize the Global INValidate (GINV) ASE instructions.\n"
msgstr ""
-#: mips-dis.c:2628
+#: mips-dis.c:2633
msgid ""
"Recognize the Loongson MultiMedia extensions Instructions (MMI) ASE "
"instructions.\n"
msgstr ""
-#: mips-dis.c:2632
+#: mips-dis.c:2637
msgid "Recognize the Loongson Content Address Memory (CAM) instructions.\n"
msgstr ""
-#: mips-dis.c:2636
+#: mips-dis.c:2641
msgid "Recognize the Loongson EXTensions (EXT) instructions.\n"
msgstr ""
-#: mips-dis.c:2640
+#: mips-dis.c:2645
msgid "Recognize the Loongson EXTensions R2 (EXT2) instructions.\n"
msgstr ""
-#: mips-dis.c:2643
+#: mips-dis.c:2648
msgid ""
"Print GPR names according to specified ABI.\n"
" Default: based on binary being disassembled.\n"
msgstr ""
-#: mips-dis.c:2646
+#: mips-dis.c:2651
msgid ""
"Print FPR names according to specified ABI.\n"
" Default: numeric.\n"
msgstr ""
-#: mips-dis.c:2649
+#: mips-dis.c:2654
msgid ""
"Print CP0 register names according to specified architecture.\n"
" Default: based on binary being disassembled.\n"
msgstr ""
-#: mips-dis.c:2653
+#: mips-dis.c:2658
msgid ""
"Print HWR names according to specified architecture.\n"
" Default: based on binary being disassembled.\n"
msgstr ""
-#: mips-dis.c:2656
+#: mips-dis.c:2661
msgid "Print GPR and FPR names according to specified ABI.\n"
msgstr ""
-#: mips-dis.c:2658
+#: mips-dis.c:2663
msgid ""
"Print CP0 register and HWR names according to specified\n"
" architecture."
msgstr ""
-#: mips-dis.c:2744
+#: mips-dis.c:2749
#, c-format
msgid ""
"\n"
@@ -1625,7 +1653,7 @@ msgid ""
"\n"
msgstr ""
-#: mips-dis.c:2778
+#: mips-dis.c:2783
#, c-format
msgid ""
"\n"
@@ -1647,7 +1675,11 @@ msgstr ""
msgid "(unknown)"
msgstr ""
-#: mmix-dis.c:510
+#: mmix-dis.c:247 mmix-dis.c:255
+msgid "*illegal*"
+msgstr ""
+
+#: mmix-dis.c:529
#, c-format
msgid "*unknown operands type: %d*"
msgstr ""
@@ -1805,7 +1837,7 @@ msgstr ""
#. an immediate either. We don't know how much to increase
#. aoffsetp by since whatever generated this is broken
#. anyway!
-#: ns32k-dis.c:533
+#: ns32k-dis.c:537
#, c-format
msgid "$<undefined>"
msgstr ""
@@ -1818,29 +1850,29 @@ msgstr ""
msgid "internal relocation type invalid"
msgstr ""
-#: or1k-desc.c:1978
+#: or1k-desc.c:2213
#, c-format
msgid ""
"internal error: or1k_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
"values: `%d' vs. `%d'"
msgstr ""
-#: or1k-desc.c:2061
+#: or1k-desc.c:2296
#, c-format
msgid "internal error: or1k_cgen_cpu_open: unsupported argument `%d'"
msgstr ""
-#: or1k-desc.c:2080
+#: or1k-desc.c:2315
#, c-format
msgid "internal error: or1k_cgen_cpu_open: no endianness specified"
msgstr ""
-#: ppc-dis.c:370
+#: ppc-dis.c:376
#, c-format
msgid "warning: ignoring unknown -M%s option"
msgstr ""
-#: ppc-dis.c:858
+#: ppc-dis.c:957
#, c-format
msgid ""
"\n"
@@ -1852,95 +1884,107 @@ msgstr ""
msgid "invalid register"
msgstr ""
-#: ppc-opc.c:384 ppc-opc.c:412
+#: ppc-opc.c:396
msgid "invalid conditional option"
msgstr ""
-#: ppc-opc.c:386 ppc-opc.c:414
+#: ppc-opc.c:399
msgid "invalid counter access"
msgstr ""
-#: ppc-opc.c:416
+#: ppc-opc.c:463
+msgid "BO value implies no branch hint, when using + or - modifier"
+msgstr ""
+
+#: ppc-opc.c:468
msgid "attempt to set y bit when using + or - modifier"
msgstr ""
-#: ppc-opc.c:507
+#: ppc-opc.c:470
+msgid "attempt to set 'at' bits when using + or - modifier"
+msgstr ""
+
+#: ppc-opc.c:658
+msgid "invalid R operand"
+msgstr ""
+
+#: ppc-opc.c:713
msgid "invalid mask field"
msgstr ""
-#: ppc-opc.c:530
+#: ppc-opc.c:736
msgid "invalid mfcr mask"
msgstr ""
-#: ppc-opc.c:606
+#: ppc-opc.c:812
msgid "illegal L operand value"
msgstr ""
-#: ppc-opc.c:645
+#: ppc-opc.c:851
msgid "incompatible L operand value"
msgstr ""
-#: ppc-opc.c:684 ppc-opc.c:719
+#: ppc-opc.c:891 ppc-opc.c:926
msgid "illegal bitmask"
msgstr ""
-#: ppc-opc.c:806
+#: ppc-opc.c:1013
msgid "address register in load range"
msgstr ""
-#: ppc-opc.c:872
+#: ppc-opc.c:1079
msgid "index register in load range"
msgstr ""
-#: ppc-opc.c:901 ppc-opc.c:986
+#: ppc-opc.c:1108 ppc-opc.c:1194
msgid "source and target register operands must be different"
msgstr ""
-#: ppc-opc.c:931
+#: ppc-opc.c:1139
msgid "invalid register operand when updating"
msgstr ""
-#: ppc-opc.c:1049
+#: ppc-opc.c:1257
msgid "illegal immediate value"
msgstr ""
-#: ppc-opc.c:1154
+#: ppc-opc.c:1362
msgid "invalid bat number"
msgstr ""
-#: ppc-opc.c:1189
+#: ppc-opc.c:1397
msgid "invalid sprg number"
msgstr ""
-#: ppc-opc.c:1226
+#: ppc-opc.c:1434
msgid "invalid tbr number"
msgstr ""
-#: ppc-opc.c:1372
+#: ppc-opc.c:1581
msgid "invalid constant"
msgstr ""
-#: ppc-opc.c:1474 ppc-opc.c:1497 ppc-opc.c:1520 ppc-opc.c:1543
+#: ppc-opc.c:1683 ppc-opc.c:1706 ppc-opc.c:1729 ppc-opc.c:1752
msgid "UIMM = 00000 is illegal"
msgstr ""
-#: ppc-opc.c:1566
+#: ppc-opc.c:1775
msgid "UIMM values >7 are illegal"
msgstr ""
-#: ppc-opc.c:1589
+#: ppc-opc.c:1798
msgid "UIMM values >15 are illegal"
msgstr ""
-#: ppc-opc.c:1612
+#: ppc-opc.c:1821
msgid "GPR odd is illegal"
msgstr ""
-#: ppc-opc.c:1635 ppc-opc.c:1658
+#: ppc-opc.c:1844 ppc-opc.c:1867
msgid "invalid offset"
msgstr ""
-#: ppc-opc.c:1681
+#: ppc-opc.c:1890
msgid "invalid Ddd value"
msgstr ""
@@ -1954,7 +1998,7 @@ msgstr ""
msgid "# internal error, undefined modifier (%c)"
msgstr ""
-#: riscv-dis.c:541
+#: riscv-dis.c:545
#, c-format
msgid ""
"\n"
@@ -1962,14 +2006,14 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: riscv-dis.c:545
+#: riscv-dis.c:549
#, c-format
msgid ""
"\n"
" numeric Print numeric register names, rather than ABI names.\n"
msgstr ""
-#: riscv-dis.c:548
+#: riscv-dis.c:552
#, c-format
msgid ""
"\n"
@@ -1977,6 +2021,38 @@ msgid ""
" than into pseudoinstructions.\n"
msgstr ""
+#: rx-dis.c:139 rx-dis.c:163 rx-dis.c:171 rx-dis.c:179 rx-dis.c:187
+msgid "<invalid register number>"
+msgstr ""
+
+#: rx-dis.c:147 rx-dis.c:195
+msgid "<invalid condition code>"
+msgstr ""
+
+#: rx-dis.c:155
+msgid "<invalid flag>"
+msgstr ""
+
+#: rx-dis.c:203
+msgid "<invalid opsize>"
+msgstr ""
+
+#: rx-dis.c:211
+msgid "<invalid size>"
+msgstr ""
+
+#: s12z-dis.c:258 s12z-dis.c:315 s12z-dis.c:326
+msgid "<illegal reg num>"
+msgstr ""
+
+#: s12z-dis.c:389
+msgid "<bad>"
+msgstr ""
+
+#: s12z-dis.c:400
+msgid ".<bad>"
+msgstr ""
+
#: s390-dis.c:42
msgid "Disassemble in ESA architecture mode"
msgstr ""
@@ -2002,8 +2078,8 @@ msgid ""
"with the -M switch (multiple options should be separated by commas):\n"
msgstr ""
-#: score-dis.c:663 score-dis.c:870 score-dis.c:1031 score-dis.c:1145
-#: score-dis.c:1152 score-dis.c:1159 score7-dis.c:695 score7-dis.c:858
+#: score-dis.c:660 score-dis.c:867 score-dis.c:1026 score-dis.c:1140
+#: score-dis.c:1147 score-dis.c:1154 score7-dis.c:695 score7-dis.c:858
msgid "<illegal instruction>"
msgstr ""
@@ -2018,16 +2094,44 @@ msgid "internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
msgstr ""
#. Mark as non-valid instruction.
-#: sparc-dis.c:1098
+#: sparc-dis.c:1095
msgid "unknown"
msgstr ""
-#: v850-dis.c:453
+#: v850-dis.c:190
+msgid "<invalid s-reg number>"
+msgstr ""
+
+#: v850-dis.c:206
+msgid "<invalid reg number>"
+msgstr ""
+
+#: v850-dis.c:222
+msgid "<invalid v-reg number>"
+msgstr ""
+
+#: v850-dis.c:236
+msgid "<invalid CC-reg number>"
+msgstr ""
+
+#: v850-dis.c:250
+msgid "<invalid float-CC-reg number>"
+msgstr ""
+
+#: v850-dis.c:264
+msgid "<invalid cacheop number>"
+msgstr ""
+
+#: v850-dis.c:275
+msgid "<invalid prefop number>"
+msgstr ""
+
+#: v850-dis.c:510
#, c-format
msgid "unknown operand shift: %x"
msgstr ""
-#: v850-dis.c:469
+#: v850-dis.c:526
#, c-format
msgid "unknown reg: %d"
msgstr ""
@@ -2109,7 +2213,7 @@ msgstr ""
msgid "Name well-known globals"
msgstr ""
-#: wasm32-dis.c:503
+#: wasm32-dis.c:510
#, c-format
msgid ""
"The following WebAssembly-specific disassembler options are supported for "
diff --git a/opcodes/z80-dis.c b/opcodes/z80-dis.c
index a0e1025..99be7f8 100644
--- a/opcodes/z80-dis.c
+++ b/opcodes/z80-dis.c
@@ -1,4 +1,4 @@
-/* Print Z80 and R800 instructions
+/* Print Z80, Z180, EZ80 and R800 instructions
Copyright (C) 2005-2020 Free Software Foundation, Inc.
Contributed by Arnold Metselaar <arnold_m@operamail.com>
@@ -28,38 +28,61 @@ struct buffer
bfd_vma base;
int n_fetch;
int n_used;
- signed char data[4];
+ signed char data[6];
+ long inss; /* instruction set bit mask, taken from bfd_mach */
+ int nn_len; /* address length: 2 - Z80 mode, 3 - ADL mode*/
} ;
-typedef int (*func)(struct buffer *, disassemble_info *, char *);
+typedef int (*func)(struct buffer *, disassemble_info *, const char *);
struct tab_elt
{
unsigned char val;
unsigned char mask;
func fp;
- char * text;
+ const char * text;
+ unsigned inss; /* bit mask of supported bfd_mach_* or 0 for all mach */
} ;
+#define INSS_ALL 0
+#define INSS_Z80 ((1 << bfd_mach_z80) | (1 << bfd_mach_z80strict) | (1 << bfd_mach_z80full))
+#define INSS_R800 (1 << bfd_mach_r800)
+#define INSS_GBZ80 (1 << bfd_mach_gbz80)
+#define INSS_Z180 (1 << bfd_mach_z180)
+#define INSS_EZ80_Z80 (1 << bfd_mach_ez80_z80)
+#define INSS_EZ80_ADL (1 << bfd_mach_ez80_adl)
+#define INSS_EZ80 (INSS_EZ80_ADL | INSS_EZ80_Z80)
+
#define TXTSIZ 24
/* Names of 16-bit registers. */
-static char * rr_str[] = { "bc", "de", "hl", "sp" };
+static const char * rr_str[] = { "bc", "de", "hl", "sp" };
/* Names of 8-bit registers. */
-static char * r_str[] = { "b", "c", "d", "e", "h", "l", "(hl)", "a" };
+static const char * r_str[] = { "b", "c", "d", "e", "h", "l", "(hl)", "a" };
/* Texts for condition codes. */
-static char * cc_str[] = { "nz", "z", "nc", "c", "po", "pe", "p", "m" };
+static const char * cc_str[] = { "nz", "z", "nc", "c", "po", "pe", "p", "m" };
/* Instruction names for 8-bit arithmetic, operand "a" is often implicit */
-static char * arit_str[] =
+static const char * arit_str[] =
{
"add a,", "adc a,", "sub ", "sbc a,", "and ", "xor ", "or ", "cp "
} ;
+static const char * arit_str_ez80[] =
+{
+ "add a,", "adc a,", "sub a,", "sbc a,", "and a,", "xor a,", "or a,", "cp a,"
+} ;
+
static int
+mach_inst (struct buffer *buf, struct tab_elt *p)
+{
+ return !p->inss || (p->inss & buf->inss);
+}
+
+static int
fetch_data (struct buffer *buf, disassemble_info * info, int n)
{
int r;
- if (buf->n_fetch + n > 4)
+ if (buf->n_fetch + n > (int)sizeof(buf->data))
abort ();
r = info->read_memory_func (buf->base + buf->n_fetch,
@@ -71,7 +94,7 @@ fetch_data (struct buffer *buf, disassemble_info * info, int n)
}
static int
-prt (struct buffer *buf, disassemble_info * info, char *txt)
+prt (struct buffer *buf, disassemble_info * info, const char *txt)
{
info->fprintf_func (info->stream, "%s", txt);
buf->n_used = buf->n_fetch;
@@ -79,7 +102,7 @@ prt (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-prt_e (struct buffer *buf, disassemble_info * info, char *txt)
+prt_e (struct buffer *buf, disassemble_info * info, const char *txt)
{
char e;
int target_addr;
@@ -98,7 +121,7 @@ prt_e (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-jr_cc (struct buffer *buf, disassemble_info * info, char *txt)
+jr_cc (struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
@@ -107,15 +130,19 @@ jr_cc (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-prt_nn (struct buffer *buf, disassemble_info * info, char *txt)
+prt_nn (struct buffer *buf, disassemble_info * info, const char *txt)
{
int nn;
unsigned char *p;
+ int i;
p = (unsigned char*) buf->data + buf->n_fetch;
- if (fetch_data (buf, info, 2))
+ if (fetch_data (buf, info, buf->nn_len))
{
- nn = p[0] + (p[1] << 8);
+ nn = 0;
+ i = buf->nn_len;
+ while (i--)
+ nn = nn * 0x100 + p[i];
info->fprintf_func (info->stream, txt, nn);
buf->n_used = buf->n_fetch;
}
@@ -125,7 +152,7 @@ prt_nn (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-prt_rr_nn (struct buffer *buf, disassemble_info * info, char *txt)
+prt_rr_nn (struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
int rr;
@@ -136,7 +163,7 @@ prt_rr_nn (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-prt_rr (struct buffer *buf, disassemble_info * info, char *txt)
+prt_rr (struct buffer *buf, disassemble_info * info, const char *txt)
{
info->fprintf_func (info->stream, "%s%s", txt,
rr_str[(buf->data[buf->n_fetch - 1] >> 4) & 3]);
@@ -145,7 +172,7 @@ prt_rr (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-prt_n (struct buffer *buf, disassemble_info * info, char *txt)
+prt_n (struct buffer *buf, disassemble_info * info, const char *txt)
{
int n;
unsigned char *p;
@@ -165,16 +192,27 @@ prt_n (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-ld_r_n (struct buffer *buf, disassemble_info * info, char *txt)
+prt_r_n (struct buffer *buf, disassemble_info * info, const char *txt)
+{
+ char mytxt[TXTSIZ];
+ int r;
+
+ r = (buf->data[buf->n_fetch - 1] >> 3) & 7;
+ snprintf (mytxt, TXTSIZ, txt, r_str[r]);
+ return prt_n (buf, info, mytxt);
+}
+
+static int
+ld_r_n (struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
- snprintf (mytxt, TXTSIZ, txt, r_str[(buf->data[0] >> 3) & 7]);
+ snprintf (mytxt, TXTSIZ, txt, r_str[(buf->data[buf->n_fetch - 1] >> 3) & 7]);
return prt_n (buf, info, mytxt);
}
static int
-prt_r (struct buffer *buf, disassemble_info * info, char *txt)
+prt_r (struct buffer *buf, disassemble_info * info, const char *txt)
{
info->fprintf_func (info->stream, txt,
r_str[(buf->data[buf->n_fetch - 1] >> 3) & 7]);
@@ -183,7 +221,7 @@ prt_r (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-ld_r_r (struct buffer *buf, disassemble_info * info, char *txt)
+ld_r_r (struct buffer *buf, disassemble_info * info, const char *txt)
{
info->fprintf_func (info->stream, txt,
r_str[(buf->data[buf->n_fetch - 1] >> 3) & 7],
@@ -193,17 +231,53 @@ ld_r_r (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-arit_r (struct buffer *buf, disassemble_info * info, char *txt)
+prt_d (struct buffer *buf, disassemble_info * info, const char *txt)
{
+ int d;
+ signed char *p;
+
+ p = buf->data + buf->n_fetch;
+
+ if (fetch_data (buf, info, 1))
+ {
+ d = p[0];
+ info->fprintf_func (info->stream, txt, d);
+ buf->n_used = buf->n_fetch;
+ }
+ else
+ buf->n_used = -1;
+
+ return buf->n_used;
+}
+
+static int
+prt_rr_d (struct buffer *buf, disassemble_info * info, const char *txt)
+{
+ char mytxt[TXTSIZ];
+ int rr;
+
+ rr = (buf->data[buf->n_fetch - 1] >> 4) & 3;
+ if (rr == 3) /* SP is not supported */
+ return 0;
+
+ snprintf (mytxt, TXTSIZ, txt, rr_str[rr]);
+ return prt_d (buf, info, mytxt);
+}
+
+static int
+arit_r (struct buffer *buf, disassemble_info * info, const char *txt)
+{
+ const char * const *arit;
+ arit = (buf->inss & INSS_EZ80) ? arit_str_ez80 : arit_str;
info->fprintf_func (info->stream, txt,
- arit_str[(buf->data[buf->n_fetch - 1] >> 3) & 7],
- r_str[buf->data[buf->n_fetch - 1] & 7]);
+ arit[(buf->data[buf->n_fetch - 1] >> 3) & 7],
+ r_str[buf->data[buf->n_fetch - 1] & 7]);
buf->n_used = buf->n_fetch;
return buf->n_used;
}
static int
-prt_cc (struct buffer *buf, disassemble_info * info, char *txt)
+prt_cc (struct buffer *buf, disassemble_info * info, const char *txt)
{
info->fprintf_func (info->stream, "%s%s", txt,
cc_str[(buf->data[0] >> 3) & 7]);
@@ -212,7 +286,7 @@ prt_cc (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-pop_rr (struct buffer *buf, disassemble_info * info, char *txt)
+pop_rr (struct buffer *buf, disassemble_info * info, const char *txt)
{
static char *rr_stack[] = { "bc","de","hl","af"};
@@ -224,7 +298,7 @@ pop_rr (struct buffer *buf, disassemble_info * info, char *txt)
static int
-jp_cc_nn (struct buffer *buf, disassemble_info * info, char *txt)
+jp_cc_nn (struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
@@ -234,16 +308,18 @@ jp_cc_nn (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-arit_n (struct buffer *buf, disassemble_info * info, char *txt)
+arit_n (struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
+ const char * const *arit;
- snprintf (mytxt,TXTSIZ, txt, arit_str[(buf->data[0] >> 3) & 7]);
+ arit = (buf->inss & INSS_EZ80) ? arit_str_ez80 : arit_str;
+ snprintf (mytxt,TXTSIZ, txt, arit[(buf->data[0] >> 3) & 7]);
return prt_n (buf, info, mytxt);
}
static int
-rst (struct buffer *buf, disassemble_info * info, char *txt)
+rst (struct buffer *buf, disassemble_info * info, const char *txt)
{
info->fprintf_func (info->stream, txt, buf->data[0] & 0x38);
buf->n_used = buf->n_fetch;
@@ -252,7 +328,7 @@ rst (struct buffer *buf, disassemble_info * info, char *txt)
static int
-cis (struct buffer *buf, disassemble_info * info, char *txt ATTRIBUTE_UNUSED)
+cis (struct buffer *buf, disassemble_info * info, const char *txt ATTRIBUTE_UNUSED)
{
static char * opar[] = { "ld", "cp", "in", "out" };
char * op;
@@ -269,7 +345,42 @@ cis (struct buffer *buf, disassemble_info * info, char *txt ATTRIBUTE_UNUSED)
}
static int
-dump (struct buffer *buf, disassemble_info * info, char *txt)
+cism (struct buffer *buf, disassemble_info * info, const char *txt ATTRIBUTE_UNUSED)
+{
+ static char * opar[] = { "in%cm%s", "ot%cm%s" };
+ char * op;
+ char c;
+
+ c = buf->data[1];
+ op = opar[c & 1];
+ info->fprintf_func (info->stream,
+ op,
+ (c & 0x08) ? 'd' : 'i',
+ (c & 0x10) ? "r" : "");
+ buf->n_used = 2;
+ return buf->n_used;
+}
+
+static int
+cis2 (struct buffer *buf, disassemble_info * info, const char *txt ATTRIBUTE_UNUSED)
+{
+ static char * opar[] = { "in", "out" };
+ char * op;
+ char c;
+
+ c = buf->data[1];
+ op = ((0x14 & c) == 0x14) ? "ot" : (opar[c & 1]);
+ info->fprintf_func (info->stream,
+ "%s%c2%s",
+ op,
+ (c & 0x08) ? 'd' : 'i',
+ (c & 0x10) ? "r" : "");
+ buf->n_used = 2;
+ return buf->n_used;
+}
+
+static int
+dump (struct buffer *buf, disassemble_info * info, const char *txt)
{
int i;
@@ -284,45 +395,85 @@ dump (struct buffer *buf, disassemble_info * info, char *txt)
/* Table to disassemble machine codes with prefix 0xED. */
struct tab_elt opc_ed[] =
{
- { 0x70, 0xFF, prt, "in f,(c)" },
- { 0x70, 0xFF, dump, "xx" },
- { 0x40, 0xC7, prt_r, "in %s,(c)" },
- { 0x71, 0xFF, prt, "out (c),0" },
- { 0x70, 0xFF, dump, "xx" },
- { 0x41, 0xC7, prt_r, "out (c),%s" },
- { 0x42, 0xCF, prt_rr, "sbc hl," },
- { 0x43, 0xCF, prt_rr_nn, "ld (0x%%04x),%s" },
- { 0x44, 0xFF, prt, "neg" },
- { 0x45, 0xFF, prt, "retn" },
- { 0x46, 0xFF, prt, "im 0" },
- { 0x47, 0xFF, prt, "ld i,a" },
- { 0x4A, 0xCF, prt_rr, "adc hl," },
- { 0x4B, 0xCF, prt_rr_nn, "ld %s,(0x%%04x)" },
- { 0x4D, 0xFF, prt, "reti" },
- { 0x4F, 0xFF, prt, "ld r,a" },
- { 0x56, 0xFF, prt, "im 1" },
- { 0x57, 0xFF, prt, "ld a,i" },
- { 0x5E, 0xFF, prt, "im 2" },
- { 0x5F, 0xFF, prt, "ld a,r" },
- { 0x67, 0xFF, prt, "rrd" },
- { 0x6F, 0xFF, prt, "rld" },
- { 0xA0, 0xE4, cis, "" },
- { 0xC3, 0xFF, prt, "muluw hl,bc" },
- { 0xC5, 0xE7, prt_r, "mulub a,%s" },
- { 0xF3, 0xFF, prt, "muluw hl,sp" },
- { 0x00, 0x00, dump, "xx" }
+ { 0x30, 0xFE, dump, "xx", INSS_ALL },
+ { 0x00, 0xC7, prt_r_n, "in0 %s,(0x%%02x)", INSS_Z180|INSS_EZ80 },
+ { 0x01, 0xC7, prt_r_n, "out0 (0x%%02x),%s", INSS_Z180|INSS_EZ80 },
+ { 0x32, 0xFF, prt_d, "lea ix,ix%+d", INSS_EZ80 },
+ { 0x33, 0xFF, prt_d, "lea iy,iy%+d", INSS_EZ80 },
+ { 0x02, 0xCF, prt_rr_d, "lea %s,ix%%+d", INSS_EZ80 },
+ { 0x03, 0xCF, prt_rr_d, "lea %s,iy%%+d", INSS_EZ80 },
+ { 0x04, 0xC7, prt_r, "tst %s", INSS_Z180},
+ { 0x04, 0xC7, prt_r, "tst a,%s", INSS_EZ80 },
+ { 0x07, 0xFF, prt, "ld bc,(hl)", INSS_EZ80 },
+ { 0x0F, 0xCF, prt_rr, "ld (hl),", INSS_EZ80 },
+ { 0x17, 0xFF, prt, "ld de,(hl)", INSS_EZ80 },
+ { 0x27, 0xFF, prt, "ld hl,(hl)", INSS_EZ80 },
+ { 0x36, 0xFF, prt, "ld iy,(hl)", INSS_EZ80 },
+ { 0x37, 0xFF, prt, "ld ix,(hl)", INSS_EZ80 },
+ { 0x3E, 0xFF, prt, "ld (hl),iy", INSS_EZ80 },
+ { 0x3F, 0xFF, prt, "ld (hl),ix", INSS_EZ80 },
+ { 0x70, 0xFF, prt, "in f,(c)", INSS_Z80 | INSS_R800 },
+ { 0x70, 0xFF, dump, "xx", INSS_ALL },
+ { 0x40, 0xC7, prt_r, "in %s,(bc)", INSS_EZ80 },
+ { 0x40, 0xC7, prt_r, "in %s,(c)", INSS_ALL },
+ { 0x71, 0xFF, prt, "out (c),0", INSS_Z80 },
+ { 0x70, 0xFF, dump, "xx", INSS_ALL },
+ { 0x41, 0xC7, prt_r, "out (bc),%s", INSS_EZ80 },
+ { 0x41, 0xC7, prt_r, "out (c),%s", INSS_ALL },
+ { 0x42, 0xCF, prt_rr, "sbc hl,", INSS_ALL },
+ { 0x43, 0xCF, prt_rr_nn, "ld (0x%%04x),%s", INSS_ALL },
+ { 0x44, 0xFF, prt, "neg", INSS_ALL },
+ { 0x45, 0xFF, prt, "retn", INSS_ALL },
+ { 0x46, 0xFF, prt, "im 0", INSS_ALL },
+ { 0x47, 0xFF, prt, "ld i,a", INSS_ALL },
+ { 0x4A, 0xCF, prt_rr, "adc hl,", INSS_ALL },
+ { 0x4B, 0xCF, prt_rr_nn, "ld %s,(0x%%04x)", INSS_ALL },
+ { 0x4C, 0xCF, prt_rr, "mlt ", INSS_Z180|INSS_EZ80 },
+ { 0x4D, 0xFF, prt, "reti", INSS_ALL },
+ { 0x4F, 0xFF, prt, "ld r,a", INSS_ALL },
+ { 0x54, 0xFF, prt_d, "lea ix,iy%+d", INSS_EZ80 },
+ { 0x55, 0xFF, prt_d, "lea iy,ix%+d", INSS_EZ80 },
+ { 0x56, 0xFF, prt, "im 1", INSS_ALL },
+ { 0x57, 0xFF, prt, "ld a,i", INSS_ALL },
+ { 0x5E, 0xFF, prt, "im 2", INSS_ALL },
+ { 0x5F, 0xFF, prt, "ld a,r", INSS_ALL },
+ { 0x64, 0xFF, prt_n, "tst 0x%02x", INSS_Z180 },
+ { 0x64, 0xFF, prt_n, "tst a,0x%02x", INSS_EZ80 },
+ { 0x65, 0xFF, prt_d, "pea ix%+d", INSS_EZ80 },
+ { 0x66, 0xFF, prt_d, "pea iy%+d", INSS_EZ80 },
+ { 0x67, 0xFF, prt, "rrd", INSS_ALL },
+ { 0x6F, 0xFF, prt, "rld", INSS_ALL },
+ { 0x74, 0xFF, prt_n, "tstio 0x%02x", INSS_Z180|INSS_EZ80 },
+ { 0x76, 0xFF, prt, "slp", INSS_Z180|INSS_EZ80 },
+ { 0x82, 0xE6, cism, "", INSS_Z180|INSS_EZ80 },
+ { 0x84, 0xC7, cis2, "", INSS_EZ80 },
+ { 0xA0, 0xE4, cis, "", INSS_ALL },
+ { 0x7D, 0xFF, prt, "stmix", INSS_EZ80 },
+ { 0x7E, 0xFF, prt, "rsmix", INSS_EZ80 },
+ { 0x6D, 0xFF, prt, "ld mb,a", INSS_EZ80 },
+ { 0x6E, 0xFF, prt, "ld a,mb", INSS_EZ80 },
+ { 0xC7, 0xFF, prt, "ld i,hl", INSS_EZ80 },
+ { 0xD7, 0xFF, prt, "ld hl,i", INSS_EZ80 },
+ { 0xC2, 0xFF, prt, "inirx", INSS_EZ80 },
+ { 0xC3, 0xFF, prt, "otirx", INSS_EZ80 },
+ { 0xCA, 0xFF, prt, "indrx", INSS_EZ80 },
+ { 0xCB, 0xFF, prt, "otdrx", INSS_EZ80 },
+ { 0xC3, 0xFF, prt, "muluw hl,bc", INSS_R800 },
+ { 0xC5, 0xE7, prt_r, "mulub a,%s", INSS_R800 },
+ { 0xF3, 0xFF, prt, "muluw hl,sp", INSS_R800 },
+ { 0x00, 0x00, dump, "xx", INSS_ALL }
};
static int
-pref_ed (struct buffer * buf, disassemble_info * info,
- char* txt ATTRIBUTE_UNUSED)
+pref_ed (struct buffer *buf, disassemble_info *info,
+ const char *txt ATTRIBUTE_UNUSED)
{
struct tab_elt *p;
if (fetch_data(buf, info, 1))
{
- for (p = opc_ed; p->val != (buf->data[1] & p->mask); ++p)
- ;
+ for (p = opc_ed; p->val != (buf->data[1] & p->mask) || !mach_inst(buf, p); ++p)
+ ;
p->fp (buf, info, p->text);
}
else
@@ -340,16 +491,25 @@ static char *cb2_str[] =
};
static int
-pref_cb (struct buffer * buf, disassemble_info * info,
- char* txt ATTRIBUTE_UNUSED)
+pref_cb (struct buffer *buf, disassemble_info *info,
+ const char *txt ATTRIBUTE_UNUSED)
{
+ const char *op_txt;
+ int idx;
if (fetch_data (buf, info, 1))
{
buf->n_used = 2;
if ((buf->data[1] & 0xc0) == 0)
- info->fprintf_func (info->stream, "%s %s",
- cb2_str[(buf->data[1] >> 3) & 7],
- r_str[buf->data[1] & 7]);
+ {
+ idx = (buf->data[1] >> 3) & 7;
+ if ((buf->inss & INSS_GBZ80) && (idx == 6))
+ op_txt = "swap";
+ else
+ op_txt = cb2_str[idx];
+ info->fprintf_func (info->stream, "%s %s",
+ op_txt,
+ r_str[buf->data[1] & 7]);
+ }
else
info->fprintf_func (info->stream, "%s %d,%s",
cb1_str[(buf->data[1] >> 6) & 3],
@@ -363,7 +523,7 @@ pref_cb (struct buffer * buf, disassemble_info * info,
}
static int
-addvv (struct buffer * buf, disassemble_info * info, char* txt)
+addvv (struct buffer * buf, disassemble_info * info, const char *txt)
{
info->fprintf_func (info->stream, "add %s,%s", txt, txt);
@@ -371,7 +531,7 @@ addvv (struct buffer * buf, disassemble_info * info, char* txt)
}
static int
-ld_v_v (struct buffer * buf, disassemble_info * info, char* txt)
+ld_v_v (struct buffer * buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
@@ -380,8 +540,9 @@ ld_v_v (struct buffer * buf, disassemble_info * info, char* txt)
}
static int
-prt_d (struct buffer *buf, disassemble_info * info, char *txt)
+prt_d_n (struct buffer *buf, disassemble_info * info, const char *txt)
{
+ char mytxt[TXTSIZ];
int d;
signed char *p;
@@ -390,8 +551,8 @@ prt_d (struct buffer *buf, disassemble_info * info, char *txt)
if (fetch_data (buf, info, 1))
{
d = p[0];
- info->fprintf_func (info->stream, txt, d);
- buf->n_used = buf->n_fetch;
+ snprintf (mytxt, TXTSIZ, txt, d);
+ return prt_n (buf, info, mytxt);
}
else
buf->n_used = -1;
@@ -400,61 +561,58 @@ prt_d (struct buffer *buf, disassemble_info * info, char *txt)
}
static int
-prt_d_n (struct buffer *buf, disassemble_info * info, char *txt)
+arit_d (struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
- int d;
- signed char *p;
-
- p = buf->data + buf->n_fetch;
-
- if (fetch_data (buf, info, 1))
- {
- d = p[0];
- snprintf (mytxt, TXTSIZ, txt, d);
- return prt_n (buf, info, mytxt);
- }
- else
- buf->n_used = -1;
+ signed char c;
+ const char * const *arit;
- return buf->n_used;
+ arit = (buf->inss & INSS_EZ80) ? arit_str_ez80 : arit_str;
+ c = buf->data[buf->n_fetch - 1];
+ snprintf (mytxt, TXTSIZ, txt, arit[(c >> 3) & 7]);
+ return prt_d (buf, info, mytxt);
}
static int
-arit_d (struct buffer *buf, disassemble_info * info, char *txt)
+ld_r_d (struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
signed char c;
c = buf->data[buf->n_fetch - 1];
- snprintf (mytxt, TXTSIZ, txt, arit_str[(c >> 3) & 7]);
+ snprintf (mytxt, TXTSIZ, txt, r_str[(c >> 3) & 7]);
return prt_d (buf, info, mytxt);
}
static int
-ld_r_d (struct buffer *buf, disassemble_info * info, char *txt)
+ld_d_r(struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
signed char c;
c = buf->data[buf->n_fetch - 1];
- snprintf (mytxt, TXTSIZ, txt, r_str[(c >> 3) & 7]);
+ snprintf (mytxt, TXTSIZ, txt, r_str[c & 7]);
return prt_d (buf, info, mytxt);
}
static int
-ld_d_r(struct buffer *buf, disassemble_info * info, char *txt)
+ld_ii_ii(struct buffer *buf, disassemble_info * info, const char *txt)
{
char mytxt[TXTSIZ];
signed char c;
+ int p;
+ static const char *ii[2] = { "ix", "iy" };
+ p = (buf->data[buf->n_fetch - 2] == '\xdd') ? 0 : 1;
c = buf->data[buf->n_fetch - 1];
- snprintf (mytxt, TXTSIZ, txt, r_str[c & 7]);
+ if ((c & 0x07) != 0x07)
+ p = 1 - p; /* 0 -> 1, 1 -> 0 */
+ snprintf (mytxt, TXTSIZ, txt, ii[p]);
return prt_d (buf, info, mytxt);
}
static int
-pref_xd_cb (struct buffer * buf, disassemble_info * info, char* txt)
+pref_xd_cb (struct buffer * buf, disassemble_info * info, const char *txt)
{
if (fetch_data (buf, info, 2))
{
@@ -490,49 +648,58 @@ pref_xd_cb (struct buffer * buf, disassemble_info * info, char* txt)
/* Table to disassemble machine codes with prefix 0xDD or 0xFD. */
static struct tab_elt opc_ind[] =
{
- { 0x24, 0xF7, prt_r, "inc %s%%s" },
- { 0x25, 0xF7, prt_r, "dec %s%%s" },
- { 0x26, 0xF7, ld_r_n, "ld %s%%s,0x%%%%02x" },
- { 0x21, 0xFF, prt_nn, "ld %s,0x%%04x" },
- { 0x22, 0xFF, prt_nn, "ld (0x%%04x),%s" },
- { 0x2A, 0xFF, prt_nn, "ld %s,(0x%%04x)" },
- { 0x23, 0xFF, prt, "inc %s" },
- { 0x2B, 0xFF, prt, "dec %s" },
- { 0x29, 0xFF, addvv, "%s" },
- { 0x09, 0xCF, prt_rr, "add %s," },
- { 0x34, 0xFF, prt_d, "inc (%s%%+d)" },
- { 0x35, 0xFF, prt_d, "dec (%s%%+d)" },
- { 0x36, 0xFF, prt_d_n, "ld (%s%%+d),0x%%%%02x" },
-
- { 0x76, 0xFF, dump, "h" },
- { 0x46, 0xC7, ld_r_d, "ld %%s,(%s%%%%+d)" },
- { 0x70, 0xF8, ld_d_r, "ld (%s%%%%+d),%%s" },
- { 0x64, 0xF6, ld_v_v, "%s" },
- { 0x60, 0xF0, ld_r_r, "ld %s%%s,%%s" },
- { 0x44, 0xC6, ld_r_r, "ld %%s,%s%%s" },
-
- { 0x86, 0xC7, arit_d, "%%s(%s%%%%+d)" },
- { 0x84, 0xC6, arit_r, "%%s%s%%s" },
-
- { 0xE1, 0xFF, prt, "pop %s" },
- { 0xE5, 0xFF, prt, "push %s" },
- { 0xCB, 0xFF, pref_xd_cb, "%s" },
- { 0xE3, 0xFF, prt, "ex (sp),%s" },
- { 0xE9, 0xFF, prt, "jp (%s)" },
- { 0xF9, 0xFF, prt, "ld sp,%s" },
- { 0x00, 0x00, dump, "?" },
+ { 0x07, 0xFF, prt_d, "ld bc,(%s%%+d)", INSS_EZ80 },
+ { 0x0F, 0xFF, prt_d, "ld (%s%%+d),bc", INSS_EZ80 },
+ { 0x17, 0xFF, prt_d, "ld de,(%s%%+d)", INSS_EZ80 },
+ { 0x1F, 0xFF, prt_d, "ld (%s%%+d),de", INSS_EZ80 },
+ { 0x24, 0xF7, prt_r, "inc %s%%s", INSS_ALL },
+ { 0x25, 0xF7, prt_r, "dec %s%%s", INSS_ALL },
+ { 0x26, 0xF7, ld_r_n, "ld %s%%s,0x%%%%02x", INSS_ALL },
+ { 0x27, 0xFF, prt_d, "ld hl,(%s%%+d)", INSS_EZ80 },
+ { 0x2F, 0xFF, prt_d, "ld (%s%%+d),hl", INSS_EZ80 },
+ { 0x21, 0xFF, prt_nn, "ld %s,0x%%04x", INSS_ALL },
+ { 0x22, 0xFF, prt_nn, "ld (0x%%04x),%s", INSS_ALL },
+ { 0x2A, 0xFF, prt_nn, "ld %s,(0x%%04x)", INSS_ALL },
+ { 0x23, 0xFF, prt, "inc %s", INSS_ALL },
+ { 0x2B, 0xFF, prt, "dec %s", INSS_ALL },
+ { 0x29, 0xFF, addvv, "%s", INSS_ALL },
+ { 0x31, 0xFF, ld_ii_ii, "ld %%s,(%s%%%%+d)", INSS_EZ80 },
+ { 0x37, 0xFF, ld_ii_ii, "ld %%s,(%s%%%%+d)", INSS_EZ80 },
+ { 0x3E, 0xFE, ld_ii_ii, "ld (%s%%%%+d),%%s", INSS_EZ80 },
+ { 0x09, 0xCF, prt_rr, "add %s,", INSS_ALL },
+ { 0x34, 0xFF, prt_d, "inc (%s%%+d)", INSS_ALL },
+ { 0x35, 0xFF, prt_d, "dec (%s%%+d)", INSS_ALL },
+ { 0x36, 0xFF, prt_d_n, "ld (%s%%+d),0x%%%%02x", INSS_ALL },
+
+ { 0x76, 0xFF, dump, "h", INSS_ALL },
+ { 0x46, 0xC7, ld_r_d, "ld %%s,(%s%%%%+d)", INSS_ALL },
+ { 0x70, 0xF8, ld_d_r, "ld (%s%%%%+d),%%s", INSS_ALL },
+ { 0x64, 0xF6, ld_v_v, "%s", INSS_ALL },
+ { 0x60, 0xF0, ld_r_r, "ld %s%%s,%%s", INSS_ALL },
+ { 0x44, 0xC6, ld_r_r, "ld %%s,%s%%s", INSS_ALL },
+
+ { 0x86, 0xC7, arit_d, "%%s(%s%%%%+d)", INSS_ALL },
+ { 0x84, 0xC6, arit_r, "%%s%s%%s", INSS_ALL },
+
+ { 0xE1, 0xFF, prt, "pop %s", INSS_ALL },
+ { 0xE5, 0xFF, prt, "push %s", INSS_ALL },
+ { 0xCB, 0xFF, pref_xd_cb, "%s", INSS_ALL },
+ { 0xE3, 0xFF, prt, "ex (sp),%s", INSS_ALL },
+ { 0xE9, 0xFF, prt, "jp (%s)", INSS_ALL },
+ { 0xF9, 0xFF, prt, "ld sp,%s", INSS_ALL },
+ { 0x00, 0x00, dump, "?", INSS_ALL },
} ;
static int
-pref_ind (struct buffer * buf, disassemble_info * info, char* txt)
+pref_ind (struct buffer *buf, disassemble_info *info, const char *txt)
{
if (fetch_data (buf, info, 1))
{
char mytxt[TXTSIZ];
struct tab_elt *p;
- for (p = opc_ind; p->val != (buf->data[1] & p->mask); ++p)
- ;
+ for (p = opc_ind; p->val != (buf->data[1] & p->mask) || !mach_inst (buf, p); ++p)
+ ;
snprintf (mytxt, TXTSIZ, p->text, txt);
p->fp (buf, info, mytxt);
}
@@ -542,85 +709,156 @@ pref_ind (struct buffer * buf, disassemble_info * info, char* txt)
return buf->n_used;
}
+static int
+print_insn_z80_buf (struct buffer *buf, disassemble_info *info);
+
+static int
+suffix (struct buffer *buf_in, disassemble_info *info, const char *txt)
+{
+ struct buffer buf;
+ char mybuf[TXTSIZ*4];
+ fprintf_ftype old_fprintf;
+ void *old_stream;
+ char *p;
+
+ buf_in->n_used++;
+ buf = *buf_in;
+ buf.n_fetch = 0;
+ buf.n_used = 0;
+ buf.base++;
+ switch (txt[2])
+ {
+ case 'l': /* SIL or LIL */
+ buf.nn_len = 3;
+ break;
+ case 's': /* SIS or LIS */
+ buf.nn_len = 2;
+ break;
+ default:
+ /* unknown suffix */
+ return -1;
+ }
+ old_fprintf = info->fprintf_func;
+ old_stream = info->stream;
+ info->fprintf_func = (fprintf_ftype)&sprintf;
+ info->stream = mybuf;
+ print_insn_z80_buf(&buf, info);
+ info->fprintf_func = old_fprintf;
+ info->stream = old_stream;
+
+ for (p = &mybuf[0]; *p && *p != ' ' && *p != '.'; ++p)
+ ;
+
+ if (*p == '.') /* suffix already present */
+ {
+ info->fprintf_func(info->stream, "nop ;%s", txt); /* double prefix */
+ return buf_in->n_used;
+ }
+
+ *p++ = '\0';
+ info->fprintf_func(info->stream, *p ? "%s.%s %s" : "%s.%s", mybuf, txt, p);
+
+ memcpy(&buf_in->data[1], buf.data, sizeof(buf.data)-1);
+ buf_in->n_used += buf.n_used;
+ buf_in->n_fetch += buf.n_fetch;
+ return buf_in->n_used;
+}
+
/* Table to disassemble machine codes without prefix. */
static struct tab_elt opc_main[] =
{
- { 0x00, 0xFF, prt, "nop" },
- { 0x01, 0xCF, prt_rr_nn, "ld %s,0x%%04x" },
- { 0x02, 0xFF, prt, "ld (bc),a" },
- { 0x03, 0xCF, prt_rr, "inc " },
- { 0x04, 0xC7, prt_r, "inc %s" },
- { 0x05, 0xC7, prt_r, "dec %s" },
- { 0x06, 0xC7, ld_r_n, "ld %s,0x%%02x" },
- { 0x07, 0xFF, prt, "rlca" },
- { 0x08, 0xFF, prt, "ex af,af'" },
- { 0x09, 0xCF, prt_rr, "add hl," },
- { 0x0A, 0xFF, prt, "ld a,(bc)" },
- { 0x0B, 0xCF, prt_rr, "dec " },
- { 0x0F, 0xFF, prt, "rrca" },
- { 0x10, 0xFF, prt_e, "djnz " },
- { 0x12, 0xFF, prt, "ld (de),a" },
- { 0x17, 0xFF, prt, "rla" },
- { 0x18, 0xFF, prt_e, "jr "},
- { 0x1A, 0xFF, prt, "ld a,(de)" },
- { 0x1F, 0xFF, prt, "rra" },
- { 0x20, 0xE7, jr_cc, "jr %s,"},
- { 0x22, 0xFF, prt_nn, "ld (0x%04x),hl" },
- { 0x27, 0xFF, prt, "daa"},
- { 0x2A, 0xFF, prt_nn, "ld hl,(0x%04x)" },
- { 0x2F, 0xFF, prt, "cpl" },
- { 0x32, 0xFF, prt_nn, "ld (0x%04x),a" },
- { 0x37, 0xFF, prt, "scf" },
- { 0x3A, 0xFF, prt_nn, "ld a,(0x%04x)" },
- { 0x3F, 0xFF, prt, "ccf" },
-
- { 0x76, 0xFF, prt, "halt" },
- { 0x40, 0xC0, ld_r_r, "ld %s,%s"},
-
- { 0x80, 0xC0, arit_r, "%s%s" },
-
- { 0xC0, 0xC7, prt_cc, "ret " },
- { 0xC1, 0xCF, pop_rr, "pop" },
- { 0xC2, 0xC7, jp_cc_nn, "jp " },
- { 0xC3, 0xFF, prt_nn, "jp 0x%04x" },
- { 0xC4, 0xC7, jp_cc_nn, "call " },
- { 0xC5, 0xCF, pop_rr, "push" },
- { 0xC6, 0xC7, arit_n, "%s0x%%02x" },
- { 0xC7, 0xC7, rst, "rst 0x%02x" },
- { 0xC9, 0xFF, prt, "ret" },
- { 0xCB, 0xFF, pref_cb, "" },
- { 0xCD, 0xFF, prt_nn, "call 0x%04x" },
- { 0xD3, 0xFF, prt_n, "out (0x%02x),a" },
- { 0xD9, 0xFF, prt, "exx" },
- { 0xDB, 0xFF, prt_n, "in a,(0x%02x)" },
- { 0xDD, 0xFF, pref_ind, "ix" },
- { 0xE3, 0xFF, prt, "ex (sp),hl" },
- { 0xE9, 0xFF, prt, "jp (hl)" },
- { 0xEB, 0xFF, prt, "ex de,hl" },
- { 0xED, 0xFF, pref_ed, ""},
- { 0xF3, 0xFF, prt, "di" },
- { 0xF9, 0xFF, prt, "ld sp,hl" },
- { 0xFB, 0xFF, prt, "ei" },
- { 0xFD, 0xFF, pref_ind, "iy" },
- { 0x00, 0x00, prt, "????" },
+ { 0x00, 0xFF, prt, "nop", INSS_ALL },
+ { 0x01, 0xCF, prt_rr_nn, "ld %s,0x%%04x", INSS_ALL },
+ { 0x02, 0xFF, prt, "ld (bc),a", INSS_ALL },
+ { 0x03, 0xCF, prt_rr, "inc ", INSS_ALL },
+ { 0x04, 0xC7, prt_r, "inc %s", INSS_ALL },
+ { 0x05, 0xC7, prt_r, "dec %s", INSS_ALL },
+ { 0x06, 0xC7, ld_r_n, "ld %s,0x%%02x", INSS_ALL },
+ { 0x07, 0xFF, prt, "rlca", INSS_ALL },
+ { 0x08, 0xFF, prt, "ex af,af'", ~INSS_GBZ80 },
+ { 0x09, 0xCF, prt_rr, "add hl,", INSS_ALL },
+ { 0x0A, 0xFF, prt, "ld a,(bc)", INSS_ALL },
+ { 0x0B, 0xCF, prt_rr, "dec ", INSS_ALL },
+ { 0x0F, 0xFF, prt, "rrca", INSS_ALL },
+ { 0x10, 0xFF, prt_e, "djnz ", ~INSS_GBZ80 },
+ { 0x12, 0xFF, prt, "ld (de),a", INSS_ALL },
+ { 0x17, 0xFF, prt, "rla", INSS_ALL },
+ { 0x18, 0xFF, prt_e, "jr ", INSS_ALL },
+ { 0x1A, 0xFF, prt, "ld a,(de)", INSS_ALL },
+ { 0x1F, 0xFF, prt, "rra", INSS_ALL },
+ { 0x20, 0xE7, jr_cc, "jr %s,", INSS_ALL },
+ { 0x22, 0xFF, prt_nn, "ld (0x%04x),hl", ~INSS_GBZ80 },
+ { 0x27, 0xFF, prt, "daa", INSS_ALL },
+ { 0x2A, 0xFF, prt_nn, "ld hl,(0x%04x)", ~INSS_GBZ80 },
+ { 0x2F, 0xFF, prt, "cpl", INSS_ALL },
+ { 0x32, 0xFF, prt_nn, "ld (0x%04x),a", INSS_ALL },
+ { 0x37, 0xFF, prt, "scf", INSS_ALL },
+ { 0x3A, 0xFF, prt_nn, "ld a,(0x%04x)", INSS_ALL },
+ { 0x3F, 0xFF, prt, "ccf", INSS_ALL },
+
+ { 0x76, 0xFF, prt, "halt", INSS_ALL },
+
+ { 0x40, 0xFF, suffix, "sis", INSS_EZ80 },
+ { 0x49, 0xFF, suffix, "lis", INSS_EZ80 },
+ { 0x52, 0xFF, suffix, "sil", INSS_EZ80 },
+ { 0x5B, 0xFF, suffix, "lil", INSS_EZ80 },
+
+ { 0x40, 0xC0, ld_r_r, "ld %s,%s", INSS_ALL},
+
+ { 0x80, 0xC0, arit_r, "%s%s", INSS_ALL },
+
+ { 0xC0, 0xC7, prt_cc, "ret ", INSS_ALL },
+ { 0xC1, 0xCF, pop_rr, "pop", INSS_ALL },
+ { 0xC2, 0xC7, jp_cc_nn, "jp ", INSS_ALL },
+ { 0xC3, 0xFF, prt_nn, "jp 0x%04x", INSS_ALL },
+ { 0xC4, 0xC7, jp_cc_nn, "call ", INSS_ALL },
+ { 0xC5, 0xCF, pop_rr, "push", INSS_ALL },
+ { 0xC6, 0xC7, arit_n, "%s0x%%02x", INSS_ALL },
+ { 0xC7, 0xC7, rst, "rst 0x%02x", INSS_ALL },
+ { 0xC9, 0xFF, prt, "ret", INSS_ALL },
+ { 0xCB, 0xFF, pref_cb, "", INSS_ALL },
+ { 0xCD, 0xFF, prt_nn, "call 0x%04x", INSS_ALL },
+ { 0xD3, 0xFF, prt_n, "out (0x%02x),a", ~INSS_GBZ80 },
+ { 0xD9, 0xFF, prt, "exx", ~INSS_GBZ80 },
+ { 0xDB, 0xFF, prt_n, "in a,(0x%02x)", ~INSS_GBZ80 },
+ { 0xDD, 0xFF, pref_ind, "ix", ~INSS_GBZ80 },
+ { 0xE3, 0xFF, prt, "ex (sp),hl", ~INSS_GBZ80 },
+ { 0xE9, 0xFF, prt, "jp (hl)", INSS_ALL },
+ { 0xEB, 0xFF, prt, "ex de,hl", ~INSS_GBZ80 },
+ { 0xED, 0xFF, pref_ed, "", ~INSS_GBZ80 },
+ { 0xF3, 0xFF, prt, "di", INSS_ALL },
+ { 0xF9, 0xFF, prt, "ld sp,hl", ~INSS_GBZ80 },
+ { 0xFB, 0xFF, prt, "ei", INSS_ALL },
+ { 0xFD, 0xFF, pref_ind, "iy", ~INSS_GBZ80 },
+ { 0x00, 0x00, prt, "????", INSS_ALL },
} ;
int
print_insn_z80 (bfd_vma addr, disassemble_info * info)
{
struct buffer buf;
- struct tab_elt *p;
buf.base = addr;
buf.n_fetch = 0;
buf.n_used = 0;
+ buf.inss = 1 << info->mach;
+ buf.nn_len = info->mach == bfd_mach_ez80_adl ? 3 : 2;
+ info->bytes_per_line = (buf.inss & INSS_EZ80) ? 6 : 4; /* <ss pp oo nn mm MM> OR <pp oo nn mm> */
- if (! fetch_data (& buf, info, 1))
+ return print_insn_z80_buf (&buf, info);
+}
+
+static int
+print_insn_z80_buf (struct buffer *buf, disassemble_info *info)
+{
+ struct tab_elt *p;
+
+ if (! fetch_data (buf, info, 1))
return -1;
- for (p = opc_main; p->val != (buf.data[0] & p->mask); ++p)
+ for (p = opc_main; p->val != (buf->data[0] & p->mask) || !mach_inst(buf, p); ++p)
;
- p->fp (& buf, info, p->text);
+ p->fp (buf, info, p->text);
- return buf.n_used;
+ return buf->n_used;
}
generated by cgit v1.1 at 2024-11-24 02:07:47 +0000