diff options
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 7 | ||||
-rw-r--r-- | opcodes/aarch64-opc-2.c | 2 | ||||
-rw-r--r-- | opcodes/aarch64-opc.c | 7 | ||||
-rw-r--r-- | opcodes/aarch64-tbl.h | 2 |
4 files changed, 15 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index dc22f41..d88aee3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2019-10-30 Delia Burduv <delia.burduv@arm.com> + + * aarch64-opc.c (print_immediate_offset_address): Don't print the + immediate for the writeback form of ldraa/ldrab if it is 0. + * aarch64-tbl.h: Updated the documentation for ADDR_SIMM10. + * aarch64-opc-2.c: Regenerated. + 2019-10-30 Jan Beulich <jbeulich@suse.com> * i386-gen.c (operand_type_shorthands): Delete. diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index 178d210..53d5946 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -112,7 +112,7 @@ const struct aarch64_operand aarch64_operands[] = {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM7", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm7,FLD_index2}, "an address with 7-bit signed immediate offset"}, {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM9", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm9,FLD_index}, "an address with 9-bit signed immediate offset"}, {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM9_2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm9,FLD_index}, "an address with 9-bit negative or unaligned immediate offset"}, - {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_S_imm10,FLD_imm9,FLD_index}, "an address with 10-bit scaled, signed immediate offset"}, + {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM10", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_S_imm10,FLD_imm9,FLD_index}, "an address with an optional 10-bit scaled, signed immediate offset"}, {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM11", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm7,FLD_index2}, "an address with 11-bit signed immediate (multiple of 16) offset"}, {AARCH64_OPND_CLASS_ADDRESS, "ADDR_UIMM12", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_imm12}, "an address with scaled, unsigned immediate offset"}, {AARCH64_OPND_CLASS_ADDRESS, "ADDR_SIMM13", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm9,FLD_index}, "an address with 13-bit signed immediate (multiple of 16) offset"}, diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 2e205e5..992a2af 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -3063,7 +3063,12 @@ print_immediate_offset_address (char *buf, size_t size, if (opnd->addr.writeback) { if (opnd->addr.preind) - snprintf (buf, size, "[%s, #%d]!", base, opnd->addr.offset.imm); + { + if (opnd->type == AARCH64_OPND_ADDR_SIMM10 && !opnd->addr.offset.imm) + snprintf (buf, size, "[%s]!", base); + else + snprintf (buf, size, "[%s, #%d]!", base, opnd->addr.offset.imm); + } else snprintf (buf, size, "[%s], #%d", base, opnd->addr.offset.imm); } diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index ee36f1c..00168dd 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -5141,7 +5141,7 @@ struct aarch64_opcode aarch64_opcode_table[] = Y(ADDRESS, addr_simm, "ADDR_SIMM9_2", 0, F(FLD_imm9,FLD_index), \ "an address with 9-bit negative or unaligned immediate offset") \ Y(ADDRESS, addr_simm10, "ADDR_SIMM10", 0, F(FLD_Rn,FLD_S_imm10,FLD_imm9,FLD_index),\ - "an address with 10-bit scaled, signed immediate offset") \ + "an address with an optional 10-bit scaled, signed immediate offset") \ Y(ADDRESS, addr_simm, "ADDR_SIMM11", 0, F(FLD_imm7,FLD_index2),\ "an address with 11-bit signed immediate (multiple of 16) offset")\ Y(ADDRESS, addr_uimm12, "ADDR_UIMM12", 0, F(FLD_Rn,FLD_imm12), \ |