diff options
Diffstat (limited to 'opcodes/aarch64-opc-2.c')
-rw-r--r-- | opcodes/aarch64-opc-2.c | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c index e7ecc76..aa728d1 100644 --- a/opcodes/aarch64-opc-2.c +++ b/opcodes/aarch64-opc-2.c @@ -137,6 +137,8 @@ const struct aarch64_operand aarch64_operands[] = {AARCH64_OPND_CLASS_SYSTEM, "BARRIER_PSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the PSB/TSB option name CSYNC"}, {AARCH64_OPND_CLASS_SYSTEM, "BARRIER_GCSB", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "the GCSB option name DSYNC"}, {AARCH64_OPND_CLASS_SYSTEM, "BTI_TARGET", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {}, "BTI targets j/c/jc"}, + {AARCH64_OPND_CLASS_INT_REG, "LSE128_Rt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_LSE128_Rt}, "an integer register"}, + {AARCH64_OPND_CLASS_INT_REG, "LSE128_Rt2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_LSE128_Rt2}, "an integer register"}, {AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4x16", 4 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by 16"}, {AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4x32", 5 << OPD_F_OD_LSB | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by 32"}, {AARCH64_OPND_CLASS_ADDRESS, "SVE_ADDR_RI_S4xVL", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an address with a 4-bit signed offset, multiplied by VL"}, @@ -344,12 +346,12 @@ static const unsigned op_enum_table [] = 12, 636, 637, - 1186, - 1188, - 1190, + 1198, + 1200, + 1202, 998, - 1189, - 1187, + 1201, + 1199, 318, 624, 635, @@ -381,18 +383,18 @@ static const unsigned op_enum_table [] = 391, 413, 415, - 1287, - 1288, - 1293, - 1285, - 1284, - 1289, - 1296, - 1298, 1299, - 1295, - 1301, 1300, + 1305, + 1297, + 1296, + 1301, + 1308, + 1310, + 1311, + 1307, + 1313, + 1312, 131, }; |