diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 5 | ||||
| -rw-r--r-- | include/elf/mips.h | 1 | ||||
| -rw-r--r-- | include/opcode/mips.h | 5 |
3 files changed, 11 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 1eec0a4..0204432 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2014-10-30 Andrew Pinski <apinski@cavium.com> + + * elf/mips.h (AFL_EXT_OCTEON3): Define. + INSN_OCTEON3, CPU_OCTEON3): Define. + 2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com> * elf/mips.h (AFL_ASE_MASK): Define. diff --git a/include/elf/mips.h b/include/elf/mips.h index 2ed6acd..8b885bc 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -1246,6 +1246,7 @@ extern void bfd_mips_elf_swap_abiflags_v0_out #define AFL_EXT_5500 16 /* NEC VR5500 instruction. */ #define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */ #define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */ +#define AFL_EXT_OCTEON3 19 /* Cavium Networks Octeon3. */ /* Masks for the flags1 word of an ABI flags structure. */ #define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */ diff --git a/include/opcode/mips.h b/include/opcode/mips.h index ef26167..ab40c60 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1196,6 +1196,7 @@ static const unsigned int mips_isa_table[] = { #define INSN_OCTEON 0x00000800 #define INSN_OCTEONP 0x00000200 #define INSN_OCTEON2 0x00000100 +#define INSN_OCTEON3 0x00000040 /* MIPS R5900 instruction */ #define INSN_5900 0x00004000 @@ -1323,6 +1324,7 @@ static const unsigned int mips_isa_table[] = { #define CPU_OCTEON 6501 #define CPU_OCTEONP 6601 #define CPU_OCTEON2 6502 +#define CPU_OCTEON3 6503 #define CPU_XLR 887682 /* decimal 'XLR' */ /* Return true if the given CPU is included in INSN_* mask MASK. */ @@ -1388,6 +1390,9 @@ cpu_is_member (int cpu, unsigned int mask) case CPU_OCTEON2: return (mask & INSN_OCTEON2) != 0; + case CPU_OCTEON3: + return (mask & INSN_OCTEON3) != 0; + case CPU_XLR: return (mask & INSN_XLR) != 0; |