diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/elf/ChangeLog | 4 | ||||
| -rw-r--r-- | include/elf/sparc.h | 2 | ||||
| -rw-r--r-- | include/opcode/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/sparc.h | 2 |
4 files changed, 10 insertions, 2 deletions
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 17978ba..001a940 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,7 @@ +2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com> + + * sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved. + 2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc.h (Tag_GNU_Sparc_HWCAPS2): New object attribute. diff --git a/include/elf/sparc.h b/include/elf/sparc.h index d41ba35..fd17a24f 100644 --- a/include/elf/sparc.h +++ b/include/elf/sparc.h @@ -237,7 +237,7 @@ enum #define ELF_SPARC_HWCAP_CRC32C 0x20000000 /* CRC32C insn */ #define ELF_SPARC_HWCAP2_FJATHPLUS 0x00000001 /* Fujitsu Athena+ */ -#define ELF_SPARC_HWCAP2_VIS3B 0x00000002 /* VIS3 present on multiple chips */ +#define ELF_SPARC_HWCAP2_VIS3B 0x00000002 /* Subset of VIS3 present on sparc64 X+ */ #define ELF_SPARC_HWCAP2_ADP 0x00000004 /* Application Data Protection */ #define ELF_SPARC_HWCAP2_SPARC5 0x00000008 /* The 29 new fp and sub instructions */ #define ELF_SPARC_HWCAP2_MWAIT 0x00000010 /* mwait instruction and load/monitor ASIs */ diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index d378910..a8b6229 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com> + + * sparc.h (HWCAP2_VIS3B): Documentation improved. + 2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc.h (sparc_opcode): new field `hwcaps2'. diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h index cf4ff1c..463b9c1 100644 --- a/include/opcode/sparc.h +++ b/include/opcode/sparc.h @@ -151,7 +151,7 @@ typedef struct sparc_opcode #define HWCAP_CRC32C 0x20000000 /* CRC32C insn */ #define HWCAP2_FJATHPLUS 0x00000001 /* Fujitsu Athena+ */ -#define HWCAP2_VIS3B 0x00000002 /* VIS3 present on multiple chips */ +#define HWCAP2_VIS3B 0x00000002 /* Subset of VIS3 present on sparc64 X+. */ #define HWCAP2_ADP 0x00000004 /* Application Data Protection */ #define HWCAP2_SPARC5 0x00000008 /* The 29 new fp and sub instructions */ #define HWCAP2_MWAIT 0x00000010 /* mwait instruction and load/monitor ASIs */ |