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-rw-r--r--gas/config/tc-mips.c8
-rw-r--r--gas/testsuite/gas/mips/allegrex@c0.d265
-rw-r--r--gas/testsuite/gas/mips/allegrex@c1.d265
-rw-r--r--gas/testsuite/gas/mips/allegrex@c3.d5
-rw-r--r--gas/testsuite/gas/mips/allegrex@cp0b.d5
-rw-r--r--gas/testsuite/gas/mips/allegrex@cp0bl.d5
-rw-r--r--gas/testsuite/gas/mips/allegrex@cp0c.d5
-rw-r--r--gas/testsuite/gas/mips/allegrex@cp2d.d5
-rw-r--r--gas/testsuite/gas/mips/allegrex@isa-override-1.d29
-rw-r--r--gas/testsuite/gas/mips/allegrex@isa-override-2.d4
-rw-r--r--gas/testsuite/gas/mips/allegrex@isa-override-2.l4
-rw-r--r--gas/testsuite/gas/mips/allegrex@save-sub.d5
-rw-r--r--gas/testsuite/gas/mips/mips.exp46
13 files changed, 633 insertions, 18 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 55a116f..0439a3e 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -437,6 +437,7 @@ static int mips_32bitmode = 0;
|| (ISA) == ISA_MIPS64R3 \
|| (ISA) == ISA_MIPS64R5 \
|| (ISA) == ISA_MIPS64R6 \
+ || (CPU) == CPU_ALLEGREX \
|| (CPU) == CPU_R5900) \
&& ((CPU) != CPU_GS464 \
|| (CPU) != CPU_GS464E \
@@ -535,8 +536,9 @@ static int mips_32bitmode = 0;
#define CPU_HAS_SEQ(CPU) (CPU_IS_OCTEON (CPU))
/* True, if CPU has support for ldc1 and sdc1. */
-#define CPU_HAS_LDC1_SDC1(CPU) \
- ((mips_opts.isa != ISA_MIPS1) && ((CPU) != CPU_R5900))
+#define CPU_HAS_LDC1_SDC1(CPU) (mips_opts.isa != ISA_MIPS1 \
+ && (CPU) != CPU_ALLEGREX \
+ && (CPU) != CPU_R5900)
/* True if mflo and mfhi can be immediately followed by instructions
which write to the HI and LO registers.
@@ -561,6 +563,7 @@ static int mips_32bitmode = 0;
|| mips_opts.isa == ISA_MIPS64R3 \
|| mips_opts.isa == ISA_MIPS64R5 \
|| mips_opts.isa == ISA_MIPS64R6 \
+ || mips_opts.arch == CPU_ALLEGREX \
|| mips_opts.arch == CPU_R4010 \
|| mips_opts.arch == CPU_R5900 \
|| mips_opts.arch == CPU_R10000 \
@@ -20008,6 +20011,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
/* MIPS II */
{ "r6000", 0, 0, ISA_MIPS2, CPU_R6000 },
+ { "allegrex", 0, 0, ISA_MIPS2, CPU_ALLEGREX },
/* MIPS III */
{ "r4000", 0, 0, ISA_MIPS3, CPU_R4000 },
diff --git a/gas/testsuite/gas/mips/allegrex@c0.d b/gas/testsuite/gas/mips/allegrex@c0.d
new file mode 100644
index 0000000..8e3ca43
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@c0.d
@@ -0,0 +1,265 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS C0/COP0 instructions
+#as: -32
+#source: c0.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 42000000 c0 0x0
+[0-9a-f]+ <[^>]*> 42000001 tlbr
+[0-9a-f]+ <[^>]*> 42000002 tlbwi
+[0-9a-f]+ <[^>]*> 42000003 c0 0x3
+[0-9a-f]+ <[^>]*> 42000004 c0 0x4
+[0-9a-f]+ <[^>]*> 42000005 c0 0x5
+[0-9a-f]+ <[^>]*> 42000006 tlbwr
+[0-9a-f]+ <[^>]*> 42000007 c0 0x7
+[0-9a-f]+ <[^>]*> 42000008 tlbp
+[0-9a-f]+ <[^>]*> 42000009 c0 0x9
+[0-9a-f]+ <[^>]*> 4200000a c0 0xa
+[0-9a-f]+ <[^>]*> 4200000b c0 0xb
+[0-9a-f]+ <[^>]*> 4200000c c0 0xc
+[0-9a-f]+ <[^>]*> 4200000d c0 0xd
+[0-9a-f]+ <[^>]*> 4200000e c0 0xe
+[0-9a-f]+ <[^>]*> 4200000f c0 0xf
+[0-9a-f]+ <[^>]*> 42000010 c0 0x10
+[0-9a-f]+ <[^>]*> 42000011 c0 0x11
+[0-9a-f]+ <[^>]*> 42000012 c0 0x12
+[0-9a-f]+ <[^>]*> 42000013 c0 0x13
+[0-9a-f]+ <[^>]*> 42000014 c0 0x14
+[0-9a-f]+ <[^>]*> 42000015 c0 0x15
+[0-9a-f]+ <[^>]*> 42000016 c0 0x16
+[0-9a-f]+ <[^>]*> 42000017 c0 0x17
+[0-9a-f]+ <[^>]*> 42000018 eret
+[0-9a-f]+ <[^>]*> 42000019 c0 0x19
+[0-9a-f]+ <[^>]*> 4200001a c0 0x1a
+[0-9a-f]+ <[^>]*> 4200001b c0 0x1b
+[0-9a-f]+ <[^>]*> 4200001c c0 0x1c
+[0-9a-f]+ <[^>]*> 4200001d c0 0x1d
+[0-9a-f]+ <[^>]*> 4200001e c0 0x1e
+[0-9a-f]+ <[^>]*> 4200001f c0 0x1f
+[0-9a-f]+ <[^>]*> 42000020 c0 0x20
+[0-9a-f]+ <[^>]*> 42000021 c0 0x21
+[0-9a-f]+ <[^>]*> 42000022 c0 0x22
+[0-9a-f]+ <[^>]*> 42000023 c0 0x23
+[0-9a-f]+ <[^>]*> 42000024 c0 0x24
+[0-9a-f]+ <[^>]*> 42000025 c0 0x25
+[0-9a-f]+ <[^>]*> 42000026 c0 0x26
+[0-9a-f]+ <[^>]*> 42000027 c0 0x27
+[0-9a-f]+ <[^>]*> 42000028 c0 0x28
+[0-9a-f]+ <[^>]*> 42000029 c0 0x29
+[0-9a-f]+ <[^>]*> 4200002a c0 0x2a
+[0-9a-f]+ <[^>]*> 4200002b c0 0x2b
+[0-9a-f]+ <[^>]*> 4200002c c0 0x2c
+[0-9a-f]+ <[^>]*> 4200002d c0 0x2d
+[0-9a-f]+ <[^>]*> 4200002e c0 0x2e
+[0-9a-f]+ <[^>]*> 4200002f c0 0x2f
+[0-9a-f]+ <[^>]*> 42000030 c0 0x30
+[0-9a-f]+ <[^>]*> 42000031 c0 0x31
+[0-9a-f]+ <[^>]*> 42000032 c0 0x32
+[0-9a-f]+ <[^>]*> 42000033 c0 0x33
+[0-9a-f]+ <[^>]*> 42000034 c0 0x34
+[0-9a-f]+ <[^>]*> 42000035 c0 0x35
+[0-9a-f]+ <[^>]*> 42000036 c0 0x36
+[0-9a-f]+ <[^>]*> 42000037 c0 0x37
+[0-9a-f]+ <[^>]*> 42000038 c0 0x38
+[0-9a-f]+ <[^>]*> 42000039 c0 0x39
+[0-9a-f]+ <[^>]*> 4200003a c0 0x3a
+[0-9a-f]+ <[^>]*> 4200003b c0 0x3b
+[0-9a-f]+ <[^>]*> 4200003c c0 0x3c
+[0-9a-f]+ <[^>]*> 4200003d c0 0x3d
+[0-9a-f]+ <[^>]*> 4200003e c0 0x3e
+[0-9a-f]+ <[^>]*> 4200003f c0 0x3f
+[0-9a-f]+ <[^>]*> 43000000 c0 0x1000000
+[0-9a-f]+ <[^>]*> 43000001 c0 0x1000001
+[0-9a-f]+ <[^>]*> 43000002 c0 0x1000002
+[0-9a-f]+ <[^>]*> 43000003 c0 0x1000003
+[0-9a-f]+ <[^>]*> 43000004 c0 0x1000004
+[0-9a-f]+ <[^>]*> 43000005 c0 0x1000005
+[0-9a-f]+ <[^>]*> 43000006 c0 0x1000006
+[0-9a-f]+ <[^>]*> 43000007 c0 0x1000007
+[0-9a-f]+ <[^>]*> 43000008 c0 0x1000008
+[0-9a-f]+ <[^>]*> 43000009 c0 0x1000009
+[0-9a-f]+ <[^>]*> 4300000a c0 0x100000a
+[0-9a-f]+ <[^>]*> 4300000b c0 0x100000b
+[0-9a-f]+ <[^>]*> 4300000c c0 0x100000c
+[0-9a-f]+ <[^>]*> 4300000d c0 0x100000d
+[0-9a-f]+ <[^>]*> 4300000e c0 0x100000e
+[0-9a-f]+ <[^>]*> 4300000f c0 0x100000f
+[0-9a-f]+ <[^>]*> 43000010 c0 0x1000010
+[0-9a-f]+ <[^>]*> 43000011 c0 0x1000011
+[0-9a-f]+ <[^>]*> 43000012 c0 0x1000012
+[0-9a-f]+ <[^>]*> 43000013 c0 0x1000013
+[0-9a-f]+ <[^>]*> 43000014 c0 0x1000014
+[0-9a-f]+ <[^>]*> 43000015 c0 0x1000015
+[0-9a-f]+ <[^>]*> 43000016 c0 0x1000016
+[0-9a-f]+ <[^>]*> 43000017 c0 0x1000017
+[0-9a-f]+ <[^>]*> 43000018 c0 0x1000018
+[0-9a-f]+ <[^>]*> 43000019 c0 0x1000019
+[0-9a-f]+ <[^>]*> 4300001a c0 0x100001a
+[0-9a-f]+ <[^>]*> 4300001b c0 0x100001b
+[0-9a-f]+ <[^>]*> 4300001c c0 0x100001c
+[0-9a-f]+ <[^>]*> 4300001d c0 0x100001d
+[0-9a-f]+ <[^>]*> 4300001e c0 0x100001e
+[0-9a-f]+ <[^>]*> 4300001f c0 0x100001f
+[0-9a-f]+ <[^>]*> 43000020 c0 0x1000020
+[0-9a-f]+ <[^>]*> 43000021 c0 0x1000021
+[0-9a-f]+ <[^>]*> 43000022 c0 0x1000022
+[0-9a-f]+ <[^>]*> 43000023 c0 0x1000023
+[0-9a-f]+ <[^>]*> 43000024 c0 0x1000024
+[0-9a-f]+ <[^>]*> 43000025 c0 0x1000025
+[0-9a-f]+ <[^>]*> 43000026 c0 0x1000026
+[0-9a-f]+ <[^>]*> 43000027 c0 0x1000027
+[0-9a-f]+ <[^>]*> 43000028 c0 0x1000028
+[0-9a-f]+ <[^>]*> 43000029 c0 0x1000029
+[0-9a-f]+ <[^>]*> 4300002a c0 0x100002a
+[0-9a-f]+ <[^>]*> 4300002b c0 0x100002b
+[0-9a-f]+ <[^>]*> 4300002c c0 0x100002c
+[0-9a-f]+ <[^>]*> 4300002d c0 0x100002d
+[0-9a-f]+ <[^>]*> 4300002e c0 0x100002e
+[0-9a-f]+ <[^>]*> 4300002f c0 0x100002f
+[0-9a-f]+ <[^>]*> 43000030 c0 0x1000030
+[0-9a-f]+ <[^>]*> 43000031 c0 0x1000031
+[0-9a-f]+ <[^>]*> 43000032 c0 0x1000032
+[0-9a-f]+ <[^>]*> 43000033 c0 0x1000033
+[0-9a-f]+ <[^>]*> 43000034 c0 0x1000034
+[0-9a-f]+ <[^>]*> 43000035 c0 0x1000035
+[0-9a-f]+ <[^>]*> 43000036 c0 0x1000036
+[0-9a-f]+ <[^>]*> 43000037 c0 0x1000037
+[0-9a-f]+ <[^>]*> 43000038 c0 0x1000038
+[0-9a-f]+ <[^>]*> 43000039 c0 0x1000039
+[0-9a-f]+ <[^>]*> 4300003a c0 0x100003a
+[0-9a-f]+ <[^>]*> 4300003b c0 0x100003b
+[0-9a-f]+ <[^>]*> 4300003c c0 0x100003c
+[0-9a-f]+ <[^>]*> 4300003d c0 0x100003d
+[0-9a-f]+ <[^>]*> 4300003e c0 0x100003e
+[0-9a-f]+ <[^>]*> 4300003f c0 0x100003f
+[0-9a-f]+ <[^>]*> 42000000 c0 0x0
+[0-9a-f]+ <[^>]*> 42000001 tlbr
+[0-9a-f]+ <[^>]*> 42000002 tlbwi
+[0-9a-f]+ <[^>]*> 42000003 c0 0x3
+[0-9a-f]+ <[^>]*> 42000004 c0 0x4
+[0-9a-f]+ <[^>]*> 42000005 c0 0x5
+[0-9a-f]+ <[^>]*> 42000006 tlbwr
+[0-9a-f]+ <[^>]*> 42000007 c0 0x7
+[0-9a-f]+ <[^>]*> 42000008 tlbp
+[0-9a-f]+ <[^>]*> 42000009 c0 0x9
+[0-9a-f]+ <[^>]*> 4200000a c0 0xa
+[0-9a-f]+ <[^>]*> 4200000b c0 0xb
+[0-9a-f]+ <[^>]*> 4200000c c0 0xc
+[0-9a-f]+ <[^>]*> 4200000d c0 0xd
+[0-9a-f]+ <[^>]*> 4200000e c0 0xe
+[0-9a-f]+ <[^>]*> 4200000f c0 0xf
+[0-9a-f]+ <[^>]*> 42000010 c0 0x10
+[0-9a-f]+ <[^>]*> 42000011 c0 0x11
+[0-9a-f]+ <[^>]*> 42000012 c0 0x12
+[0-9a-f]+ <[^>]*> 42000013 c0 0x13
+[0-9a-f]+ <[^>]*> 42000014 c0 0x14
+[0-9a-f]+ <[^>]*> 42000015 c0 0x15
+[0-9a-f]+ <[^>]*> 42000016 c0 0x16
+[0-9a-f]+ <[^>]*> 42000017 c0 0x17
+[0-9a-f]+ <[^>]*> 42000018 eret
+[0-9a-f]+ <[^>]*> 42000019 c0 0x19
+[0-9a-f]+ <[^>]*> 4200001a c0 0x1a
+[0-9a-f]+ <[^>]*> 4200001b c0 0x1b
+[0-9a-f]+ <[^>]*> 4200001c c0 0x1c
+[0-9a-f]+ <[^>]*> 4200001d c0 0x1d
+[0-9a-f]+ <[^>]*> 4200001e c0 0x1e
+[0-9a-f]+ <[^>]*> 4200001f c0 0x1f
+[0-9a-f]+ <[^>]*> 42000020 c0 0x20
+[0-9a-f]+ <[^>]*> 42000021 c0 0x21
+[0-9a-f]+ <[^>]*> 42000022 c0 0x22
+[0-9a-f]+ <[^>]*> 42000023 c0 0x23
+[0-9a-f]+ <[^>]*> 42000024 c0 0x24
+[0-9a-f]+ <[^>]*> 42000025 c0 0x25
+[0-9a-f]+ <[^>]*> 42000026 c0 0x26
+[0-9a-f]+ <[^>]*> 42000027 c0 0x27
+[0-9a-f]+ <[^>]*> 42000028 c0 0x28
+[0-9a-f]+ <[^>]*> 42000029 c0 0x29
+[0-9a-f]+ <[^>]*> 4200002a c0 0x2a
+[0-9a-f]+ <[^>]*> 4200002b c0 0x2b
+[0-9a-f]+ <[^>]*> 4200002c c0 0x2c
+[0-9a-f]+ <[^>]*> 4200002d c0 0x2d
+[0-9a-f]+ <[^>]*> 4200002e c0 0x2e
+[0-9a-f]+ <[^>]*> 4200002f c0 0x2f
+[0-9a-f]+ <[^>]*> 42000030 c0 0x30
+[0-9a-f]+ <[^>]*> 42000031 c0 0x31
+[0-9a-f]+ <[^>]*> 42000032 c0 0x32
+[0-9a-f]+ <[^>]*> 42000033 c0 0x33
+[0-9a-f]+ <[^>]*> 42000034 c0 0x34
+[0-9a-f]+ <[^>]*> 42000035 c0 0x35
+[0-9a-f]+ <[^>]*> 42000036 c0 0x36
+[0-9a-f]+ <[^>]*> 42000037 c0 0x37
+[0-9a-f]+ <[^>]*> 42000038 c0 0x38
+[0-9a-f]+ <[^>]*> 42000039 c0 0x39
+[0-9a-f]+ <[^>]*> 4200003a c0 0x3a
+[0-9a-f]+ <[^>]*> 4200003b c0 0x3b
+[0-9a-f]+ <[^>]*> 4200003c c0 0x3c
+[0-9a-f]+ <[^>]*> 4200003d c0 0x3d
+[0-9a-f]+ <[^>]*> 4200003e c0 0x3e
+[0-9a-f]+ <[^>]*> 4200003f c0 0x3f
+[0-9a-f]+ <[^>]*> 43000000 c0 0x1000000
+[0-9a-f]+ <[^>]*> 43000001 c0 0x1000001
+[0-9a-f]+ <[^>]*> 43000002 c0 0x1000002
+[0-9a-f]+ <[^>]*> 43000003 c0 0x1000003
+[0-9a-f]+ <[^>]*> 43000004 c0 0x1000004
+[0-9a-f]+ <[^>]*> 43000005 c0 0x1000005
+[0-9a-f]+ <[^>]*> 43000006 c0 0x1000006
+[0-9a-f]+ <[^>]*> 43000007 c0 0x1000007
+[0-9a-f]+ <[^>]*> 43000008 c0 0x1000008
+[0-9a-f]+ <[^>]*> 43000009 c0 0x1000009
+[0-9a-f]+ <[^>]*> 4300000a c0 0x100000a
+[0-9a-f]+ <[^>]*> 4300000b c0 0x100000b
+[0-9a-f]+ <[^>]*> 4300000c c0 0x100000c
+[0-9a-f]+ <[^>]*> 4300000d c0 0x100000d
+[0-9a-f]+ <[^>]*> 4300000e c0 0x100000e
+[0-9a-f]+ <[^>]*> 4300000f c0 0x100000f
+[0-9a-f]+ <[^>]*> 43000010 c0 0x1000010
+[0-9a-f]+ <[^>]*> 43000011 c0 0x1000011
+[0-9a-f]+ <[^>]*> 43000012 c0 0x1000012
+[0-9a-f]+ <[^>]*> 43000013 c0 0x1000013
+[0-9a-f]+ <[^>]*> 43000014 c0 0x1000014
+[0-9a-f]+ <[^>]*> 43000015 c0 0x1000015
+[0-9a-f]+ <[^>]*> 43000016 c0 0x1000016
+[0-9a-f]+ <[^>]*> 43000017 c0 0x1000017
+[0-9a-f]+ <[^>]*> 43000018 c0 0x1000018
+[0-9a-f]+ <[^>]*> 43000019 c0 0x1000019
+[0-9a-f]+ <[^>]*> 4300001a c0 0x100001a
+[0-9a-f]+ <[^>]*> 4300001b c0 0x100001b
+[0-9a-f]+ <[^>]*> 4300001c c0 0x100001c
+[0-9a-f]+ <[^>]*> 4300001d c0 0x100001d
+[0-9a-f]+ <[^>]*> 4300001e c0 0x100001e
+[0-9a-f]+ <[^>]*> 4300001f c0 0x100001f
+[0-9a-f]+ <[^>]*> 43000020 c0 0x1000020
+[0-9a-f]+ <[^>]*> 43000021 c0 0x1000021
+[0-9a-f]+ <[^>]*> 43000022 c0 0x1000022
+[0-9a-f]+ <[^>]*> 43000023 c0 0x1000023
+[0-9a-f]+ <[^>]*> 43000024 c0 0x1000024
+[0-9a-f]+ <[^>]*> 43000025 c0 0x1000025
+[0-9a-f]+ <[^>]*> 43000026 c0 0x1000026
+[0-9a-f]+ <[^>]*> 43000027 c0 0x1000027
+[0-9a-f]+ <[^>]*> 43000028 c0 0x1000028
+[0-9a-f]+ <[^>]*> 43000029 c0 0x1000029
+[0-9a-f]+ <[^>]*> 4300002a c0 0x100002a
+[0-9a-f]+ <[^>]*> 4300002b c0 0x100002b
+[0-9a-f]+ <[^>]*> 4300002c c0 0x100002c
+[0-9a-f]+ <[^>]*> 4300002d c0 0x100002d
+[0-9a-f]+ <[^>]*> 4300002e c0 0x100002e
+[0-9a-f]+ <[^>]*> 4300002f c0 0x100002f
+[0-9a-f]+ <[^>]*> 43000030 c0 0x1000030
+[0-9a-f]+ <[^>]*> 43000031 c0 0x1000031
+[0-9a-f]+ <[^>]*> 43000032 c0 0x1000032
+[0-9a-f]+ <[^>]*> 43000033 c0 0x1000033
+[0-9a-f]+ <[^>]*> 43000034 c0 0x1000034
+[0-9a-f]+ <[^>]*> 43000035 c0 0x1000035
+[0-9a-f]+ <[^>]*> 43000036 c0 0x1000036
+[0-9a-f]+ <[^>]*> 43000037 c0 0x1000037
+[0-9a-f]+ <[^>]*> 43000038 c0 0x1000038
+[0-9a-f]+ <[^>]*> 43000039 c0 0x1000039
+[0-9a-f]+ <[^>]*> 4300003a c0 0x100003a
+[0-9a-f]+ <[^>]*> 4300003b c0 0x100003b
+[0-9a-f]+ <[^>]*> 4300003c c0 0x100003c
+[0-9a-f]+ <[^>]*> 4300003d c0 0x100003d
+[0-9a-f]+ <[^>]*> 4300003e c0 0x100003e
+[0-9a-f]+ <[^>]*> 4300003f c0 0x100003f
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/allegrex@c1.d b/gas/testsuite/gas/mips/allegrex@c1.d
new file mode 100644
index 0000000..9fbf8d3
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@c1.d
@@ -0,0 +1,265 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS C1/COP1 instructions
+#as: -32
+#source: c1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 46000000 add\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000001 sub\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000002 mul\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000003 div\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000004 sqrt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000005 abs\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000006 mov\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000007 neg\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000008 c1 0x8
+[0-9a-f]+ <[^>]*> 46000009 c1 0x9
+[0-9a-f]+ <[^>]*> 4600000a c1 0xa
+[0-9a-f]+ <[^>]*> 4600000b c1 0xb
+[0-9a-f]+ <[^>]*> 4600000c round\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600000d trunc\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600000e ceil\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600000f floor\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000010 c1 0x10
+[0-9a-f]+ <[^>]*> 46000011 c1 0x11
+[0-9a-f]+ <[^>]*> 46000012 c1 0x12
+[0-9a-f]+ <[^>]*> 46000013 c1 0x13
+[0-9a-f]+ <[^>]*> 46000014 c1 0x14
+[0-9a-f]+ <[^>]*> 46000015 c1 0x15
+[0-9a-f]+ <[^>]*> 46000016 c1 0x16
+[0-9a-f]+ <[^>]*> 46000017 c1 0x17
+[0-9a-f]+ <[^>]*> 46000018 c1 0x18
+[0-9a-f]+ <[^>]*> 46000019 c1 0x19
+[0-9a-f]+ <[^>]*> 4600001a c1 0x1a
+[0-9a-f]+ <[^>]*> 4600001b c1 0x1b
+[0-9a-f]+ <[^>]*> 4600001c c1 0x1c
+[0-9a-f]+ <[^>]*> 4600001d c1 0x1d
+[0-9a-f]+ <[^>]*> 4600001e c1 0x1e
+[0-9a-f]+ <[^>]*> 4600001f c1 0x1f
+[0-9a-f]+ <[^>]*> 46000020 c1 0x20
+[0-9a-f]+ <[^>]*> 46000021 c1 0x21
+[0-9a-f]+ <[^>]*> 46000022 c1 0x22
+[0-9a-f]+ <[^>]*> 46000023 c1 0x23
+[0-9a-f]+ <[^>]*> 46000024 cvt\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000025 c1 0x25
+[0-9a-f]+ <[^>]*> 46000026 c1 0x26
+[0-9a-f]+ <[^>]*> 46000027 c1 0x27
+[0-9a-f]+ <[^>]*> 46000028 c1 0x28
+[0-9a-f]+ <[^>]*> 46000029 c1 0x29
+[0-9a-f]+ <[^>]*> 4600002a c1 0x2a
+[0-9a-f]+ <[^>]*> 4600002b c1 0x2b
+[0-9a-f]+ <[^>]*> 4600002c c1 0x2c
+[0-9a-f]+ <[^>]*> 4600002d c1 0x2d
+[0-9a-f]+ <[^>]*> 4600002e c1 0x2e
+[0-9a-f]+ <[^>]*> 4600002f c1 0x2f
+[0-9a-f]+ <[^>]*> 46000030 c\.f\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000031 c\.un\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000032 c\.eq\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000033 c\.ueq\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000034 c\.olt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000035 c\.ult\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000036 c\.ole\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000037 c\.ule\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000038 c\.sf\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000039 c\.ngle\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003a c\.seq\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003b c\.ngl\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003c c\.lt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003d c\.nge\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003e c\.le\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003f c\.ngt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 47000000 c1 0x1000000
+[0-9a-f]+ <[^>]*> 47000001 c1 0x1000001
+[0-9a-f]+ <[^>]*> 47000002 c1 0x1000002
+[0-9a-f]+ <[^>]*> 47000003 c1 0x1000003
+[0-9a-f]+ <[^>]*> 47000004 c1 0x1000004
+[0-9a-f]+ <[^>]*> 47000005 c1 0x1000005
+[0-9a-f]+ <[^>]*> 47000006 c1 0x1000006
+[0-9a-f]+ <[^>]*> 47000007 c1 0x1000007
+[0-9a-f]+ <[^>]*> 47000008 c1 0x1000008
+[0-9a-f]+ <[^>]*> 47000009 c1 0x1000009
+[0-9a-f]+ <[^>]*> 4700000a c1 0x100000a
+[0-9a-f]+ <[^>]*> 4700000b c1 0x100000b
+[0-9a-f]+ <[^>]*> 4700000c c1 0x100000c
+[0-9a-f]+ <[^>]*> 4700000d c1 0x100000d
+[0-9a-f]+ <[^>]*> 4700000e c1 0x100000e
+[0-9a-f]+ <[^>]*> 4700000f c1 0x100000f
+[0-9a-f]+ <[^>]*> 47000010 c1 0x1000010
+[0-9a-f]+ <[^>]*> 47000011 c1 0x1000011
+[0-9a-f]+ <[^>]*> 47000012 c1 0x1000012
+[0-9a-f]+ <[^>]*> 47000013 c1 0x1000013
+[0-9a-f]+ <[^>]*> 47000014 c1 0x1000014
+[0-9a-f]+ <[^>]*> 47000015 c1 0x1000015
+[0-9a-f]+ <[^>]*> 47000016 c1 0x1000016
+[0-9a-f]+ <[^>]*> 47000017 c1 0x1000017
+[0-9a-f]+ <[^>]*> 47000018 c1 0x1000018
+[0-9a-f]+ <[^>]*> 47000019 c1 0x1000019
+[0-9a-f]+ <[^>]*> 4700001a c1 0x100001a
+[0-9a-f]+ <[^>]*> 4700001b c1 0x100001b
+[0-9a-f]+ <[^>]*> 4700001c c1 0x100001c
+[0-9a-f]+ <[^>]*> 4700001d c1 0x100001d
+[0-9a-f]+ <[^>]*> 4700001e c1 0x100001e
+[0-9a-f]+ <[^>]*> 4700001f c1 0x100001f
+[0-9a-f]+ <[^>]*> 47000020 c1 0x1000020
+[0-9a-f]+ <[^>]*> 47000021 c1 0x1000021
+[0-9a-f]+ <[^>]*> 47000022 c1 0x1000022
+[0-9a-f]+ <[^>]*> 47000023 c1 0x1000023
+[0-9a-f]+ <[^>]*> 47000024 c1 0x1000024
+[0-9a-f]+ <[^>]*> 47000025 c1 0x1000025
+[0-9a-f]+ <[^>]*> 47000026 c1 0x1000026
+[0-9a-f]+ <[^>]*> 47000027 c1 0x1000027
+[0-9a-f]+ <[^>]*> 47000028 c1 0x1000028
+[0-9a-f]+ <[^>]*> 47000029 c1 0x1000029
+[0-9a-f]+ <[^>]*> 4700002a c1 0x100002a
+[0-9a-f]+ <[^>]*> 4700002b c1 0x100002b
+[0-9a-f]+ <[^>]*> 4700002c c1 0x100002c
+[0-9a-f]+ <[^>]*> 4700002d c1 0x100002d
+[0-9a-f]+ <[^>]*> 4700002e c1 0x100002e
+[0-9a-f]+ <[^>]*> 4700002f c1 0x100002f
+[0-9a-f]+ <[^>]*> 47000030 c1 0x1000030
+[0-9a-f]+ <[^>]*> 47000031 c1 0x1000031
+[0-9a-f]+ <[^>]*> 47000032 c1 0x1000032
+[0-9a-f]+ <[^>]*> 47000033 c1 0x1000033
+[0-9a-f]+ <[^>]*> 47000034 c1 0x1000034
+[0-9a-f]+ <[^>]*> 47000035 c1 0x1000035
+[0-9a-f]+ <[^>]*> 47000036 c1 0x1000036
+[0-9a-f]+ <[^>]*> 47000037 c1 0x1000037
+[0-9a-f]+ <[^>]*> 47000038 c1 0x1000038
+[0-9a-f]+ <[^>]*> 47000039 c1 0x1000039
+[0-9a-f]+ <[^>]*> 4700003a c1 0x100003a
+[0-9a-f]+ <[^>]*> 4700003b c1 0x100003b
+[0-9a-f]+ <[^>]*> 4700003c c1 0x100003c
+[0-9a-f]+ <[^>]*> 4700003d c1 0x100003d
+[0-9a-f]+ <[^>]*> 4700003e c1 0x100003e
+[0-9a-f]+ <[^>]*> 4700003f c1 0x100003f
+[0-9a-f]+ <[^>]*> 46000000 add\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000001 sub\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000002 mul\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000003 div\.s \$f0,\$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000004 sqrt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000005 abs\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000006 mov\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000007 neg\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000008 c1 0x8
+[0-9a-f]+ <[^>]*> 46000009 c1 0x9
+[0-9a-f]+ <[^>]*> 4600000a c1 0xa
+[0-9a-f]+ <[^>]*> 4600000b c1 0xb
+[0-9a-f]+ <[^>]*> 4600000c round\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600000d trunc\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600000e ceil\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600000f floor\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000010 c1 0x10
+[0-9a-f]+ <[^>]*> 46000011 c1 0x11
+[0-9a-f]+ <[^>]*> 46000012 c1 0x12
+[0-9a-f]+ <[^>]*> 46000013 c1 0x13
+[0-9a-f]+ <[^>]*> 46000014 c1 0x14
+[0-9a-f]+ <[^>]*> 46000015 c1 0x15
+[0-9a-f]+ <[^>]*> 46000016 c1 0x16
+[0-9a-f]+ <[^>]*> 46000017 c1 0x17
+[0-9a-f]+ <[^>]*> 46000018 c1 0x18
+[0-9a-f]+ <[^>]*> 46000019 c1 0x19
+[0-9a-f]+ <[^>]*> 4600001a c1 0x1a
+[0-9a-f]+ <[^>]*> 4600001b c1 0x1b
+[0-9a-f]+ <[^>]*> 4600001c c1 0x1c
+[0-9a-f]+ <[^>]*> 4600001d c1 0x1d
+[0-9a-f]+ <[^>]*> 4600001e c1 0x1e
+[0-9a-f]+ <[^>]*> 4600001f c1 0x1f
+[0-9a-f]+ <[^>]*> 46000020 c1 0x20
+[0-9a-f]+ <[^>]*> 46000021 c1 0x21
+[0-9a-f]+ <[^>]*> 46000022 c1 0x22
+[0-9a-f]+ <[^>]*> 46000023 c1 0x23
+[0-9a-f]+ <[^>]*> 46000024 cvt\.w\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000025 c1 0x25
+[0-9a-f]+ <[^>]*> 46000026 c1 0x26
+[0-9a-f]+ <[^>]*> 46000027 c1 0x27
+[0-9a-f]+ <[^>]*> 46000028 c1 0x28
+[0-9a-f]+ <[^>]*> 46000029 c1 0x29
+[0-9a-f]+ <[^>]*> 4600002a c1 0x2a
+[0-9a-f]+ <[^>]*> 4600002b c1 0x2b
+[0-9a-f]+ <[^>]*> 4600002c c1 0x2c
+[0-9a-f]+ <[^>]*> 4600002d c1 0x2d
+[0-9a-f]+ <[^>]*> 4600002e c1 0x2e
+[0-9a-f]+ <[^>]*> 4600002f c1 0x2f
+[0-9a-f]+ <[^>]*> 46000030 c\.f\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000031 c\.un\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000032 c\.eq\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000033 c\.ueq\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000034 c\.olt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000035 c\.ult\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000036 c\.ole\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000037 c\.ule\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000038 c\.sf\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 46000039 c\.ngle\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003a c\.seq\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003b c\.ngl\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003c c\.lt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003d c\.nge\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003e c\.le\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 4600003f c\.ngt\.s \$f0,\$f0
+[0-9a-f]+ <[^>]*> 47000000 c1 0x1000000
+[0-9a-f]+ <[^>]*> 47000001 c1 0x1000001
+[0-9a-f]+ <[^>]*> 47000002 c1 0x1000002
+[0-9a-f]+ <[^>]*> 47000003 c1 0x1000003
+[0-9a-f]+ <[^>]*> 47000004 c1 0x1000004
+[0-9a-f]+ <[^>]*> 47000005 c1 0x1000005
+[0-9a-f]+ <[^>]*> 47000006 c1 0x1000006
+[0-9a-f]+ <[^>]*> 47000007 c1 0x1000007
+[0-9a-f]+ <[^>]*> 47000008 c1 0x1000008
+[0-9a-f]+ <[^>]*> 47000009 c1 0x1000009
+[0-9a-f]+ <[^>]*> 4700000a c1 0x100000a
+[0-9a-f]+ <[^>]*> 4700000b c1 0x100000b
+[0-9a-f]+ <[^>]*> 4700000c c1 0x100000c
+[0-9a-f]+ <[^>]*> 4700000d c1 0x100000d
+[0-9a-f]+ <[^>]*> 4700000e c1 0x100000e
+[0-9a-f]+ <[^>]*> 4700000f c1 0x100000f
+[0-9a-f]+ <[^>]*> 47000010 c1 0x1000010
+[0-9a-f]+ <[^>]*> 47000011 c1 0x1000011
+[0-9a-f]+ <[^>]*> 47000012 c1 0x1000012
+[0-9a-f]+ <[^>]*> 47000013 c1 0x1000013
+[0-9a-f]+ <[^>]*> 47000014 c1 0x1000014
+[0-9a-f]+ <[^>]*> 47000015 c1 0x1000015
+[0-9a-f]+ <[^>]*> 47000016 c1 0x1000016
+[0-9a-f]+ <[^>]*> 47000017 c1 0x1000017
+[0-9a-f]+ <[^>]*> 47000018 c1 0x1000018
+[0-9a-f]+ <[^>]*> 47000019 c1 0x1000019
+[0-9a-f]+ <[^>]*> 4700001a c1 0x100001a
+[0-9a-f]+ <[^>]*> 4700001b c1 0x100001b
+[0-9a-f]+ <[^>]*> 4700001c c1 0x100001c
+[0-9a-f]+ <[^>]*> 4700001d c1 0x100001d
+[0-9a-f]+ <[^>]*> 4700001e c1 0x100001e
+[0-9a-f]+ <[^>]*> 4700001f c1 0x100001f
+[0-9a-f]+ <[^>]*> 47000020 c1 0x1000020
+[0-9a-f]+ <[^>]*> 47000021 c1 0x1000021
+[0-9a-f]+ <[^>]*> 47000022 c1 0x1000022
+[0-9a-f]+ <[^>]*> 47000023 c1 0x1000023
+[0-9a-f]+ <[^>]*> 47000024 c1 0x1000024
+[0-9a-f]+ <[^>]*> 47000025 c1 0x1000025
+[0-9a-f]+ <[^>]*> 47000026 c1 0x1000026
+[0-9a-f]+ <[^>]*> 47000027 c1 0x1000027
+[0-9a-f]+ <[^>]*> 47000028 c1 0x1000028
+[0-9a-f]+ <[^>]*> 47000029 c1 0x1000029
+[0-9a-f]+ <[^>]*> 4700002a c1 0x100002a
+[0-9a-f]+ <[^>]*> 4700002b c1 0x100002b
+[0-9a-f]+ <[^>]*> 4700002c c1 0x100002c
+[0-9a-f]+ <[^>]*> 4700002d c1 0x100002d
+[0-9a-f]+ <[^>]*> 4700002e c1 0x100002e
+[0-9a-f]+ <[^>]*> 4700002f c1 0x100002f
+[0-9a-f]+ <[^>]*> 47000030 c1 0x1000030
+[0-9a-f]+ <[^>]*> 47000031 c1 0x1000031
+[0-9a-f]+ <[^>]*> 47000032 c1 0x1000032
+[0-9a-f]+ <[^>]*> 47000033 c1 0x1000033
+[0-9a-f]+ <[^>]*> 47000034 c1 0x1000034
+[0-9a-f]+ <[^>]*> 47000035 c1 0x1000035
+[0-9a-f]+ <[^>]*> 47000036 c1 0x1000036
+[0-9a-f]+ <[^>]*> 47000037 c1 0x1000037
+[0-9a-f]+ <[^>]*> 47000038 c1 0x1000038
+[0-9a-f]+ <[^>]*> 47000039 c1 0x1000039
+[0-9a-f]+ <[^>]*> 4700003a c1 0x100003a
+[0-9a-f]+ <[^>]*> 4700003b c1 0x100003b
+[0-9a-f]+ <[^>]*> 4700003c c1 0x100003c
+[0-9a-f]+ <[^>]*> 4700003d c1 0x100003d
+[0-9a-f]+ <[^>]*> 4700003e c1 0x100003e
+[0-9a-f]+ <[^>]*> 4700003f c1 0x100003f
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/allegrex@c3.d b/gas/testsuite/gas/mips/allegrex@c3.d
new file mode 100644
index 0000000..4cdb880
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@c3.d
@@ -0,0 +1,5 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS C3/COP3 instructions
+#as: -32
+#source: c3.s
+#dump: mips1@c3.d
diff --git a/gas/testsuite/gas/mips/allegrex@cp0b.d b/gas/testsuite/gas/mips/allegrex@cp0b.d
new file mode 100644
index 0000000..a4aebdd
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@cp0b.d
@@ -0,0 +1,5 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 branch instructions
+#as: -32
+#source: cp0b.s
+#dump: mips1@cp0b.d
diff --git a/gas/testsuite/gas/mips/allegrex@cp0bl.d b/gas/testsuite/gas/mips/allegrex@cp0bl.d
new file mode 100644
index 0000000..2b1f3bb
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@cp0bl.d
@@ -0,0 +1,5 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 branch likely instructions
+#as: -32
+#source: cp0bl.s
+#dump: mips2@cp0bl.d
diff --git a/gas/testsuite/gas/mips/allegrex@cp0c.d b/gas/testsuite/gas/mips/allegrex@cp0c.d
new file mode 100644
index 0000000..cf8dc94
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@cp0c.d
@@ -0,0 +1,5 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP0 control register move instructions
+#as: -32
+#source: cp0c.s
+#dump: mips1@cp0c.d
diff --git a/gas/testsuite/gas/mips/allegrex@cp2d.d b/gas/testsuite/gas/mips/allegrex@cp2d.d
new file mode 100644
index 0000000..1ab311e
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@cp2d.d
@@ -0,0 +1,5 @@
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS CP2 doubleword memory access instructions
+#as: -32
+#error_output: cp2d.l
+#source: cp2d.s
diff --git a/gas/testsuite/gas/mips/allegrex@isa-override-1.d b/gas/testsuite/gas/mips/allegrex@isa-override-1.d
new file mode 100644
index 0000000..99c9c12
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@isa-override-1.d
@@ -0,0 +1,29 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS ISA override code generation
+#as: -32
+#source: r5900@isa-override-1.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
+[0-9a-f]+ <[^>]*> dc820000 .word 0xdc820000
+[0-9a-f]+ <[^>]*> 340189ab li at,0x89ab
+[0-9a-f]+ <[^>]*> 00010c38 .word 0x10c38
+[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
+[0-9a-f]+ <[^>]*> 3c029000 lui v0,0x9000
+[0-9a-f]+ <[^>]*> 00021438 .word 0x21438
+[0-9a-f]+ <[^>]*> 34428000 ori v0,v0,0x8000
+[0-9a-f]+ <[^>]*> 00021438 .word 0x21438
+[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
+[0-9a-f]+ <[^>]*> 8c820000 lw v0,0\(a0\)
+[0-9a-f]+ <[^>]*> 8c830004 lw v1,4\(a0\)
+[0-9a-f]+ <[^>]*> 3c0189ab lui at,0x89ab
+[0-9a-f]+ <[^>]*> 00411025 or v0,v0,at
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/allegrex@isa-override-2.d b/gas/testsuite/gas/mips/allegrex@isa-override-2.d
new file mode 100644
index 0000000..8ed1129
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@isa-override-2.d
@@ -0,0 +1,4 @@
+#name: MIPS ISA override code generation 2
+#as: -32
+#source: isa-override-2.s
+#error_output: allegrex@isa-override-2.l
diff --git a/gas/testsuite/gas/mips/allegrex@isa-override-2.l b/gas/testsuite/gas/mips/allegrex@isa-override-2.l
new file mode 100644
index 0000000..272a931
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@isa-override-2.l
@@ -0,0 +1,4 @@
+.*: Assembler messages:
+.*:5: Error: opcode not supported on this processor: allegrex \(mips2\) `dli \$2,0x9000000080000000'
+.*:10: Error: opcode not supported on this processor: allegrex \(mips2\) `dli \$2,0x9000000080000000'
+.*:13: Error: opcode not supported on this processor: allegrex \(mips2\) `dli \$2,0x9000000080000000'
diff --git a/gas/testsuite/gas/mips/allegrex@save-sub.d b/gas/testsuite/gas/mips/allegrex@save-sub.d
new file mode 100644
index 0000000..047d323
--- /dev/null
+++ b/gas/testsuite/gas/mips/allegrex@save-sub.d
@@ -0,0 +1,5 @@
+#objdump: -dr
+#as: -32 -I$srcdir/$subdir
+#name: SAVE/RESTORE instruction subset disassembly
+#source: save-sub.s
+#dump: mips1@save-sub.d
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index e358c97..773e5b7 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -81,7 +81,7 @@
# Registers.
#
# singlefloat
-# The CPU is 64 bit, but only supports 32 bit FPU.
+# The FPU only supports 32-bit operations.
#
# nollsc
# The CPU doesn't support ll, sc, lld and scd instructions.
@@ -509,6 +509,9 @@ mips_arch_create r3000 32 mips1 {} \
mips_arch_create r3900 32 mips1 { gpr_ilocks } \
{ -march=r3900 -mtune=r3900 } { -mmips:3900 } \
{ mipstx39-*-* mipstx39el-*-* }
+mips_arch_create allegrex 32 mips2 { singlefloat oddspreg } \
+ { -march=allegrex -mtune=allegrex } \
+ { -mmips:allegrex }
mips_arch_create r4000 64 mips3 {} \
{ -march=r4000 -mtune=r4000 } { -mmips:4000 }
mips_arch_create vr5400 64 mips4 { ror } \
@@ -1358,12 +1361,12 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "cp1-names-mips64r2"
run_dump_test "cp1-names-sb1"
- # The VR5400 and R5900 have their own sets of COP2 instructions, so
+ # The VR5400, R5900 & Allegrex have their own sets of COP2 instructions, so
# exclude them from generic testing. Likewise the Octeon and DMFC2/DMTC2.
run_dump_test_arches "cp2" [mips_arch_list_matching mips1 \
- !vr5400 !r5900]
+ !vr5400 !r5900 !allegrex]
run_dump_test_arches "cp2-64" [mips_arch_list_matching mips1 \
- !vr5400 !r5900 !octeon]
+ !vr5400 !r5900 !octeon !allegrex]
run_dump_test_arches "cp2b" [mips_arch_list_matching mips1]
run_dump_test_arches "cp2bl" [mips_arch_list_matching mips1]
run_dump_test_arches "cp2m" [mips_arch_list_matching mips1]
@@ -1858,7 +1861,8 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "attr-gnu-4-0" "-mfp32 -32" \
[mips_arch_list_matching mips1 !mips32r6]
run_dump_test_arches "attr-gnu-4-0" "-mfpxx -32" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_dump_test_arches "attr-gnu-4-0" "-mfp64 -32" \
[mips_arch_list_matching mips32r2]
run_dump_test_arches "attr-gnu-4-0" "-mfp64 -mno-odd-spreg -32" \
@@ -1888,7 +1892,8 @@ if { [istarget mips*-*-vxworks*] } {
[mips_arch_list_matching mips3]
}
run_dump_test_arches "attr-none-o32-fpxx" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_dump_test_arches "attr-none-o32-fp64" \
[mips_arch_list_matching mips32r2]
run_dump_test_arches "attr-none-o32-fp64-nooddspreg" \
@@ -1920,7 +1925,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "attr-gnu-4-1-msoft-float" "-32 -msoft-float" \
[mips_arch_list_matching mips1]
run_dump_test_arches "attr-gnu-4-1" "-32 -mfpxx" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_dump_test_arches "attr-gnu-4-1" "-32 -mfp32" \
[mips_arch_list_matching mips1 !mips32r6]
if { $has_newabi } {
@@ -1931,7 +1937,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "attr-gnu-4-2-mdouble-float" "-32 -mfp32" \
[mips_arch_list_matching mips1 !mips32r6]
run_list_test_arches "attr-gnu-4-2-mdouble-float" "-32 -mfpxx" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_list_test_arches "attr-gnu-4-2-mdouble-float" "-32 -mfp64" \
[mips_arch_list_matching mips32r2]
run_list_test_arches "attr-gnu-4-2-mdouble-float" \
@@ -1953,7 +1960,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "attr-gnu-4-3-mhard-float" "-32 -mfp32" \
[mips_arch_list_matching mips1 !mips32r6]
run_list_test_arches "attr-gnu-4-3-mhard-float" "-32 -mfpxx" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_list_test_arches "attr-gnu-4-3-mhard-float" "-32 -mfp64" \
[mips_arch_list_matching mips32r2]
run_list_test_arches "attr-gnu-4-3-mhard-float" \
@@ -1975,7 +1983,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "attr-gnu-4-4" "-32 -mfp32" \
[mips_arch_list_matching mips1 !mips32r6]
run_list_test_arches "attr-gnu-4-4" "-32 -mfpxx" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_list_test_arches "attr-gnu-4-4" "-32 -mfp64" \
[mips_arch_list_matching mips32r2]
run_list_test_arches "attr-gnu-4-4" "-32 -mfp64 -mno-odd-spreg" \
@@ -2004,7 +2013,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "attr-gnu-4-5-msoft-float" "-32 -msoft-float" \
[mips_arch_list_matching mips1]
run_dump_test_arches "attr-gnu-4-5" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_list_test_arches "attr-gnu-4-6" "-32 -mfp32" \
[mips_arch_list_matching mips1 !mips32r6]
@@ -2019,7 +2029,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "attr-gnu-4-6-msoft-float" "-32 -msoft-float" \
[mips_arch_list_matching mips1]
run_list_test_arches "attr-gnu-4-6" "-32 -mfpxx" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_dump_test_arches "attr-gnu-4-6" "-32 -mfp64" \
[mips_arch_list_matching mips32r2]
@@ -2036,7 +2047,8 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "attr-gnu-4-7-msoft-float" "-32 -msoft-float" \
[mips_arch_list_matching mips1]
run_list_test_arches "attr-gnu-4-7" "-32 -mfpxx" \
- [mips_arch_list_matching mips2 !r5900]
+ [mips_arch_list_matching mips2 \
+ !r5900 !allegrex]
run_dump_test_arches "attr-gnu-4-7" "-32 -mfp64 -mno-odd-spreg" \
[mips_arch_list_matching mips32r2]
@@ -2062,13 +2074,15 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test_arches "fpxx-oddfpreg" "-32 -mfpxx -mno-odd-spreg" \
[mips_arch_list_matching mips2 !singlefloat]
run_dump_test_arches "fpxx-oddfpreg" \
- [mips_arch_list_matching oddspreg]
+ [mips_arch_list_matching oddspreg !allegrex]
run_dump_test_arches "odd-spreg" "-mfp32" [mips_arch_list_matching oddspreg]
- run_dump_test_arches "odd-spreg" "-mfpxx" [mips_arch_list_matching oddspreg]
+ run_dump_test_arches "odd-spreg" "-mfpxx" \
+ [mips_arch_list_matching oddspreg !allegrex]
run_dump_test_arches "odd-spreg" "-mfp64" [mips_arch_list_matching mips32r2]
run_dump_test_arches "no-odd-spreg" "-mfp32" [mips_arch_list_matching mips1 \
!mips32r6]
- run_dump_test_arches "no-odd-spreg" "-mfpxx" [mips_arch_list_matching mips2 !r5900]
+ run_dump_test_arches "no-odd-spreg" "-mfpxx" \
+ [mips_arch_list_matching mips2 !r5900 !allegrex]
run_dump_test_arches "no-odd-spreg" "-mfp64" [mips_arch_list_matching mips32r2]
run_dump_test "module-check"
run_list_test "module-check-warn" "-32"
generated by cgit v1.1 at 2024-11-18 20:34:23 +0000