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-rw-r--r--gas/config/loongarch-parse.y3
-rw-r--r--gas/config/obj-coff.c4
-rw-r--r--gas/config/tc-i386.c20
-rw-r--r--gas/config/tc-s390.c2
-rw-r--r--gas/doc/as.texi3
-rw-r--r--gas/doc/c-i386.texi3
-rw-r--r--gas/doc/c-s390.texi5
-rw-r--r--gas/testsuite/gas/aarch64/pac_ab_key.d2
-rw-r--r--gas/testsuite/gas/aarch64/pac_compat_cfi_window_save.d2
-rw-r--r--gas/testsuite/gas/aarch64/pac_negate_ra_state.d2
-rw-r--r--gas/testsuite/gas/i386/pseudos.d25
-rw-r--r--gas/testsuite/gas/i386/pseudos.s28
-rw-r--r--gas/testsuite/gas/i386/x86-64-pseudos.d32
-rw-r--r--gas/testsuite/gas/i386/x86-64-pseudos.s34
-rw-r--r--gas/testsuite/gas/loongarch/loongarch.exp1
-rw-r--r--gas/testsuite/gas/loongarch/negative_right_shift.d40
-rw-r--r--gas/testsuite/gas/loongarch/negative_right_shift.l13
-rw-r--r--gas/testsuite/gas/loongarch/negative_right_shift.s32
18 files changed, 242 insertions, 9 deletions
diff --git a/gas/config/loongarch-parse.y b/gas/config/loongarch-parse.y
index ac35dee..97055fe 100644
--- a/gas/config/loongarch-parse.y
+++ b/gas/config/loongarch-parse.y
@@ -225,6 +225,9 @@ emit_bin (int op)
opr1 = opr1 << opr2;
break;
case RIGHT_OP:
+ if (opr1 < 0)
+ as_warn(_("Right shift of negative numbers may be changed "
+ "from arithmetic right shift to logical right shift!"));
/* Algorithm right shift. */
opr1 = (offsetT)opr1 >> (offsetT)opr2;
break;
diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c
index 19759cd..eb5784e 100644
--- a/gas/config/obj-coff.c
+++ b/gas/config/obj-coff.c
@@ -1887,8 +1887,8 @@ static const pseudo_typeS coff_pseudo_table[] =
{"loc", obj_coff_loc, 0},
{"optim", s_ignore, 0}, /* For sun386i cc (?) */
{"weak", obj_coff_weak, 0},
-#if defined TC_TIC4X
- /* The tic4x uses sdef instead of def. */
+#if defined (TC_TIC4X) || defined (TC_TIC54X)
+ /* The tic4x and tic54x use sdef instead of def. */
{"sdef", obj_coff_def, 0},
#endif
#if defined(SEH_CMDS)
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 2319840..2c61353 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -513,6 +513,9 @@ static struct pseudo_prefixes {
disp_encoding_32bit
} disp_encoding;
+ /* Exclude sign-extended 8bit immediate in encoding. */
+ bool no_imm8s;
+
/* Prefer the REX byte in encoding. */
bool rex_encoding;
@@ -2589,6 +2592,19 @@ operand_size_match (const insn_template *t)
/* Check memory and accumulator operand size. */
for (j = 0; j < i.operands; j++)
{
+ /* Instruction templates with only sign-extended 8-bit immediate
+ operand also have a second template with full-operand-size
+ immediate operand under a different opcode. Don't match the
+ first template if sign-extended 8-bit immediate operand should
+ be excluded. */
+ if (pp.no_imm8s
+ && !t->operand_types[j].bitfield.imm8
+ && t->operand_types[j].bitfield.imm8s)
+ {
+ match = 0;
+ break;
+ }
+
if (i.types[j].bitfield.class != Reg
&& i.types[j].bitfield.class != RegSIMD
&& t->opcode_modifier.operandconstraint == ANY_SIZE)
@@ -7764,6 +7780,10 @@ parse_insn (const char *line, char *mnemonic, enum parse_mode mode)
/* {nooptimize} */
pp.no_optimize = true;
break;
+ case Prefix_NoImm8s:
+ /* {noimm8s} */
+ pp.no_imm8s = true;
+ break;
default:
abort ();
}
diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
index a0cfeea..b846134 100644
--- a/gas/config/tc-s390.c
+++ b/gas/config/tc-s390.c
@@ -343,7 +343,7 @@ s390_parse_cpu (const char *arg,
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
{ STRING_COMMA_LEN ("z16"), STRING_COMMA_LEN ("arch14"),
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
- { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch15"),
+ { STRING_COMMA_LEN ("z17"), STRING_COMMA_LEN ("arch15"),
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
};
static struct
diff --git a/gas/doc/as.texi b/gas/doc/as.texi
index d68a9bc..40d45f7 100644
--- a/gas/doc/as.texi
+++ b/gas/doc/as.texi
@@ -1944,7 +1944,8 @@ Specify which s390 processor variant is the target, @samp{g5} (or
@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
@samp{z13} (or @samp{arch11}), @samp{z14} (or @samp{arch12}), @samp{z15}
-(or @samp{arch13}), @samp{z16} (or @samp{arch14}), or @samp{arch15}.
+(or @samp{arch13}), @samp{z16} (or @samp{arch14}), or @samp{z17} (or
+@samp{arch15}).
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 4d59958..b1f3b04 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -1046,6 +1046,9 @@ prefix which generates REX prefix unconditionally.
instructions (APX_F only).
@item
+@samp{@{noimm8s@}} -- exclude sign-extended 8-bit immediate.
+
+@item
@samp{@{nooptimize@}} -- disable instruction size optimization.
@end itemize
diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi
index f1a5483..5499222 100644
--- a/gas/doc/c-s390.texi
+++ b/gas/doc/c-s390.texi
@@ -18,7 +18,8 @@ and eleven chip levels. The architecture modes are the Enterprise System
Architecture (ESA) and the newer z/Architecture mode. The chip levels
are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
-(or arch11), z14 (or arch12), z15 (or arch13), z16 (or arch14), or arch15.
+(or arch11), z14 (or arch12), z15 (or arch13), z16 (or arch14), or
+z17 (arch15).
@menu
* s390 Options:: Command-line Options.
@@ -73,7 +74,7 @@ are recognized:
@code{z14} (or @code{arch12}),
@code{z15} (or @code{arch13}),
@code{z16} (or @code{arch14}), and
-@code{arch15}.
+@code{z17} (or @code{arch15}).
Assembling an instruction that is not supported on the target
processor results in an error message.
diff --git a/gas/testsuite/gas/aarch64/pac_ab_key.d b/gas/testsuite/gas/aarch64/pac_ab_key.d
index 4012d14..04d5fa4 100644
--- a/gas/testsuite/gas/aarch64/pac_ab_key.d
+++ b/gas/testsuite/gas/aarch64/pac_ab_key.d
@@ -7,7 +7,7 @@
.+: file .+
-Contents of the .eh_frame section:
+Contents of the \.eh_frame section:
0+ 0+10 0+ CIE
Version: 1
diff --git a/gas/testsuite/gas/aarch64/pac_compat_cfi_window_save.d b/gas/testsuite/gas/aarch64/pac_compat_cfi_window_save.d
index 8e59086..6ef77ae 100644
--- a/gas/testsuite/gas/aarch64/pac_compat_cfi_window_save.d
+++ b/gas/testsuite/gas/aarch64/pac_compat_cfi_window_save.d
@@ -22,7 +22,7 @@
.+: file .+
-Contents of the .eh_frame section:
+Contents of the \.eh_frame section:
0+ 0+10 0+ CIE
Version: 1
diff --git a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
index f49cebc..fa29c7f 100644
--- a/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
+++ b/gas/testsuite/gas/aarch64/pac_negate_ra_state.d
@@ -4,7 +4,7 @@
.+: file .+
-Contents of the .eh_frame section:
+Contents of the \.eh_frame section:
0+ 0+10 0+ CIE
Version: 1
diff --git a/gas/testsuite/gas/i386/pseudos.d b/gas/testsuite/gas/i386/pseudos.d
index 47dca19..5c0bc3b 100644
--- a/gas/testsuite/gas/i386/pseudos.d
+++ b/gas/testsuite/gas/i386/pseudos.d
@@ -443,4 +443,29 @@ Disassembly of section .text:
+[a-f0-9]+: 67 8a 86 00 00 mov 0x0\(%bp\),%al
+[a-f0-9]+: e9 fb ff ff ff jmp [0-9a-f]* <.*>
+[a-f0-9]+: e9 fd ff ff ff jmp [0-9a-f]* <.*>
+ +[a-f0-9]+: 81 03 00 00 00 00 addl \$0x0,\(%ebx\)
+ +[a-f0-9]+: 81 03 ff 00 00 00 addl \$0xff,\(%ebx\)
+ +[a-f0-9]+: 66 81 03 00 00 addw \$0x0,\(%ebx\)
+ +[a-f0-9]+: 66 81 03 ff 00 addw \$0xff,\(%ebx\)
+ +[a-f0-9]+: 80 03 00 addb \$0x0,\(%ebx\)
+ +[a-f0-9]+: 80 03 ff addb \$0xff,\(%ebx\)
+ +[a-f0-9]+: 81 c3 00 00 00 00 add \$0x0,%ebx
+ +[a-f0-9]+: 81 c3 ff 00 00 00 add \$0xff,%ebx
+ +[a-f0-9]+: 66 81 c3 00 00 add \$0x0,%bx
+ +[a-f0-9]+: 66 81 c3 ff 00 add \$0xff,%bx
+ +[a-f0-9]+: 80 c3 00 add \$0x0,%bl
+ +[a-f0-9]+: 80 c3 ff add \$0xff,%bl
+ +[a-f0-9]+: c7 03 00 00 00 00 movl \$0x0,\(%ebx\)
+ +[a-f0-9]+: c7 03 ff 00 00 00 movl \$0xff,\(%ebx\)
+ +[a-f0-9]+: 66 c7 03 00 00 movw \$0x0,\(%ebx\)
+ +[a-f0-9]+: 66 c7 03 ff 00 movw \$0xff,\(%ebx\)
+ +[a-f0-9]+: c6 03 00 movb \$0x0,\(%ebx\)
+ +[a-f0-9]+: c6 03 ff movb \$0xff,\(%ebx\)
+ +[a-f0-9]+: bb 00 00 00 00 mov \$0x0,%ebx
+ +[a-f0-9]+: bb ff 00 00 00 mov \$0xff,%ebx
+ +[a-f0-9]+: 66 bb 00 00 mov \$0x0,%bx
+ +[a-f0-9]+: 66 bb ff 00 mov \$0xff,%bx
+ +[a-f0-9]+: b3 00 mov \$0x0,%bl
+ +[a-f0-9]+: b3 ff mov \$0xff,%bl
+ +[a-f0-9]+: c1 c3 ff rol \$0xff,%ebx
#pass
diff --git a/gas/testsuite/gas/i386/pseudos.s b/gas/testsuite/gas/i386/pseudos.s
index 7e3600e..3806b23 100644
--- a/gas/testsuite/gas/i386/pseudos.s
+++ b/gas/testsuite/gas/i386/pseudos.s
@@ -408,3 +408,31 @@ _start:
.code16
{disp16} jmp .
.byte -1, -1
+
+ .att_syntax prefix
+ .code32
+{noimm8s} addl $0,(%ebx)
+{noimm8s} addl $255,(%ebx)
+{noimm8s} addw $0,(%ebx)
+{noimm8s} addw $255,(%ebx)
+{noimm8s} addb $0,(%ebx)
+{noimm8s} addb $255,(%ebx)
+{noimm8s} add $0,%ebx
+{noimm8s} add $255,%ebx
+{noimm8s} add $0,%bx
+{noimm8s} add $255,%bx
+{noimm8s} add $0,%bl
+{noimm8s} add $255,%bl
+{noimm8s} movl $0,(%ebx)
+{noimm8s} movl $255,(%ebx)
+{noimm8s} movw $0,(%ebx)
+{noimm8s} movw $255,(%ebx)
+{noimm8s} movb $0,(%ebx)
+{noimm8s} movb $255,(%ebx)
+{noimm8s} mov $0,%ebx
+{noimm8s} mov $255,%ebx
+{noimm8s} mov $0,%bx
+{noimm8s} mov $255,%bx
+{noimm8s} mov $0,%bl
+{noimm8s} mov $255,%bl
+{noimm8s} rol $255,%ebx
diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.d b/gas/testsuite/gas/i386/x86-64-pseudos.d
index ea5a358..5a43901 100644
--- a/gas/testsuite/gas/i386/x86-64-pseudos.d
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
@@ -534,4 +534,36 @@ Disassembly of section .text:
+[a-f0-9]+: 67 41 8a 45 00 mov 0x0\(%r13d\),%al
+[a-f0-9]+: 67 41 8a 85 00 00 00 00 mov 0x0\(%r13d\),%al
+[a-f0-9]+: 40 8a c1 rex mov %cl,%al
+ +[a-f0-9]+: 48 81 03 00 00 00 00 addq \$0x0,\(%rbx\)
+ +[a-f0-9]+: 48 81 03 ff 00 00 00 addq \$0xff,\(%rbx\)
+ +[a-f0-9]+: 81 03 00 00 00 00 addl \$0x0,\(%rbx\)
+ +[a-f0-9]+: 81 03 ff 00 00 00 addl \$0xff,\(%rbx\)
+ +[a-f0-9]+: 66 81 03 00 00 addw \$0x0,\(%rbx\)
+ +[a-f0-9]+: 66 81 03 ff 00 addw \$0xff,\(%rbx\)
+ +[a-f0-9]+: 80 03 00 addb \$0x0,\(%rbx\)
+ +[a-f0-9]+: 80 03 ff addb \$0xff,\(%rbx\)
+ +[a-f0-9]+: 48 81 c3 00 00 00 00 add \$0x0,%rbx
+ +[a-f0-9]+: 48 81 c3 ff 00 00 00 add \$0xff,%rbx
+ +[a-f0-9]+: 81 c3 00 00 00 00 add \$0x0,%ebx
+ +[a-f0-9]+: 81 c3 ff 00 00 00 add \$0xff,%ebx
+ +[a-f0-9]+: 66 81 c3 00 00 add \$0x0,%bx
+ +[a-f0-9]+: 66 81 c3 ff 00 add \$0xff,%bx
+ +[a-f0-9]+: 80 c3 00 add \$0x0,%bl
+ +[a-f0-9]+: 80 c3 ff add \$0xff,%bl
+ +[a-f0-9]+: 48 c7 03 00 00 00 00 movq \$0x0,\(%rbx\)
+ +[a-f0-9]+: 48 c7 03 ff 00 00 00 movq \$0xff,\(%rbx\)
+ +[a-f0-9]+: c7 03 00 00 00 00 movl \$0x0,\(%rbx\)
+ +[a-f0-9]+: c7 03 ff 00 00 00 movl \$0xff,\(%rbx\)
+ +[a-f0-9]+: 66 c7 03 00 00 movw \$0x0,\(%rbx\)
+ +[a-f0-9]+: 66 c7 03 ff 00 movw \$0xff,\(%rbx\)
+ +[a-f0-9]+: c6 03 00 movb \$0x0,\(%rbx\)
+ +[a-f0-9]+: c6 03 ff movb \$0xff,\(%rbx\)
+ +[a-f0-9]+: bb 00 00 00 00 mov \$0x0,%ebx
+ +[a-f0-9]+: bb ff 00 00 00 mov \$0xff,%ebx
+ +[a-f0-9]+: 66 bb 00 00 mov \$0x0,%bx
+ +[a-f0-9]+: 66 bb ff 00 mov \$0xff,%bx
+ +[a-f0-9]+: b3 00 mov \$0x0,%bl
+ +[a-f0-9]+: b3 ff mov \$0xff,%bl
+ +[a-f0-9]+: 48 c1 c3 ff rol \$0xff,%rbx
+ +[a-f0-9]+: c1 c3 ff rol \$0xff,%ebx
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.s b/gas/testsuite/gas/i386/x86-64-pseudos.s
index 041f98e..3658f34 100644
--- a/gas/testsuite/gas/i386/x86-64-pseudos.s
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.s
@@ -504,3 +504,37 @@ _start:
{disp32} mov al, BYTE PTR [r13d]
.insn {rex} 0x8a, al, cl
+
+ .att_syntax prefix
+{noimm8s} addq $0,(%rbx)
+{noimm8s} addq $255,(%rbx)
+{noimm8s} addl $0,(%rbx)
+{noimm8s} addl $255,(%rbx)
+{noimm8s} addw $0,(%rbx)
+{noimm8s} addw $255,(%rbx)
+{noimm8s} addb $0,(%rbx)
+{noimm8s} addb $255,(%rbx)
+{noimm8s} add $0,%rbx
+{noimm8s} add $255,%rbx
+{noimm8s} add $0,%ebx
+{noimm8s} add $255,%ebx
+{noimm8s} add $0,%bx
+{noimm8s} add $255,%bx
+{noimm8s} add $0,%bl
+{noimm8s} add $255,%bl
+{noimm8s} movq $0,(%rbx)
+{noimm8s} movq $255,(%rbx)
+{noimm8s} movl $0,(%rbx)
+{noimm8s} movl $255,(%rbx)
+{noimm8s} movw $0,(%rbx)
+{noimm8s} movw $255,(%rbx)
+{noimm8s} movb $0,(%rbx)
+{noimm8s} movb $255,(%rbx)
+{noimm8s} mov $0,%ebx
+{noimm8s} mov $255,%ebx
+{noimm8s} mov $0,%bx
+{noimm8s} mov $255,%bx
+{noimm8s} mov $0,%bl
+{noimm8s} mov $255,%bl
+{noimm8s} rol $255,%rbx
+{noimm8s} rol $255,%ebx
diff --git a/gas/testsuite/gas/loongarch/loongarch.exp b/gas/testsuite/gas/loongarch/loongarch.exp
index 87595b9..0e836f7 100644
--- a/gas/testsuite/gas/loongarch/loongarch.exp
+++ b/gas/testsuite/gas/loongarch/loongarch.exp
@@ -36,5 +36,6 @@ if [istarget loongarch*-*-*] {
if [istarget loongarch64-*-*] {
run_list_test "illegal-operand"
run_list_test "pseudo_op_option_fail"
+ run_list_test "negative_right_shift"
}
}
diff --git a/gas/testsuite/gas/loongarch/negative_right_shift.d b/gas/testsuite/gas/loongarch/negative_right_shift.d
new file mode 100644
index 0000000..4237710
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/negative_right_shift.d
@@ -0,0 +1,40 @@
+#as:
+#objdump: -d
+#skip: loongarch32-*-*
+#warning_output: negative_right_shift.l
+
+.*: file format .*
+
+
+Disassembly of section \.text:
+
+0+ <directives>:
+ 0: 03400000 nop
+ 4: 00000001 \.word 0x00000001
+ 8: 00000001 \.word 0x00000001
+
+0+c <insns>:
+ c: 02bff9ac addi.w \$t0, \$t1, -2
+ 10: 02fff9ac addi.d \$t0, \$t1, -2
+ 14: 13fff9ac addu16i.d \$t0, \$t1, -2
+ 18: 15ffffcc lu12i.w \$t0, -2
+ 1c: 17ffffcc lu32i.d \$t0, -2
+ 20: 033ff9ac lu52i.d \$t0, \$t1, -2
+ 24: 023ff9ac slti \$t0, \$t1, -2
+ 28: 027ff9ac sltui \$t0, \$t1, -2
+ 2c: 19ffffcc pcaddi \$t0, -2
+ 30: 1dffffcc pcaddu12i \$t0, -2
+ 34: 1fffffcc pcaddu18i \$t0, -2
+ 38: 1bffffcc pcalau12i \$t0, -2
+ 3c: 02bffdac addi.w \$t0, \$t1, -1
+ 40: 02fffdac addi.d \$t0, \$t1, -1
+ 44: 13fffdac addu16i.d \$t0, \$t1, -1
+ 48: 15ffffec lu12i.w \$t0, -1
+ 4c: 17ffffec lu32i.d \$t0, -1
+ 50: 033ffdac lu52i.d \$t0, \$t1, -1
+ 54: 023ffdac slti \$t0, \$t1, -1
+ 58: 027ffdac sltui \$t0, \$t1, -1
+ 5c: 19ffffec pcaddi \$t0, -1
+ 60: 1dffffec pcaddu12i \$t0, -1
+ 64: 1fffffec pcaddu18i \$t0, -1
+ 68: 1bffffec pcalau12i \$t0, -1
diff --git a/gas/testsuite/gas/loongarch/negative_right_shift.l b/gas/testsuite/gas/loongarch/negative_right_shift.l
new file mode 100644
index 0000000..6edb2a5
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/negative_right_shift.l
@@ -0,0 +1,13 @@
+.*: Assembler messages:
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
+.*: Warning: Right shift of negative numbers may be changed from arithmetic right shift to logical right shift!
diff --git a/gas/testsuite/gas/loongarch/negative_right_shift.s b/gas/testsuite/gas/loongarch/negative_right_shift.s
new file mode 100644
index 0000000..c6a8a1e
--- /dev/null
+++ b/gas/testsuite/gas/loongarch/negative_right_shift.s
@@ -0,0 +1,32 @@
+directives:
+.align -1>>62
+.word -1>>63
+.4byte -1>>63
+
+insns:
+addi.w $t0, $t1, -1<<1
+addi.d $t0, $t1, -1<<1
+addu16i.d $t0, $t1, -1<<1
+lu12i.w $t0, -1<<1
+lu32i.d $t0, -1<<1
+lu52i.d $t0, $t1, -1<<1
+slti $t0, $t1, -1<<1
+sltui $t0, $t1, -1<<1
+pcaddi $t0, -1<<1
+pcaddu12i $t0, -1<<1
+pcaddu18i $t0, -1<<1
+pcalau12i $t0, -1<<1
+
+# warn
+addi.w $t0, $t1, -1>>63
+addi.d $t0, $t1, -1>>63
+addu16i.d $t0, $t1, -1>>63
+lu12i.w $t0, -1>>63
+lu32i.d $t0, -1>>63
+lu52i.d $t0, $t1, -1>>63
+slti $t0, $t1, -1>>63
+sltui $t0, $t1, -1>>63
+pcaddi $t0, -1>>63
+pcaddu12i $t0, -1>>63
+pcaddu18i $t0, -1>>63
+pcalau12i $t0, -1>>63
generated by cgit v1.1 at 2025-04-11 05:03:52 +0000