diff options
Diffstat (limited to 'gas')
239 files changed, 16988 insertions, 9854 deletions
@@ -1,8 +1,7 @@ -*- text -*- -* Add support for RISC-V Zimop, Zcmop extensions with version 1.0. - -* Add support for RISC-V CORE-V extension (XCvBitmanip) with version 1.0. +* Add support for RISC-V Zcmp (cm.mva01s, cm.mvsa01) and CORE-V (xcvbitmanip, + xcvsimd) extensions with version 1.0. Changes in 2.43: @@ -50,6 +49,8 @@ Changes in 2.43: * Add support for RISC-V Zcmp extension with version 1.0. +* Add support for RISC-V Zimop and Zcmop extensions with version 1.0. + * Add support for RISC-V Zfbfmin extension with version 1.0. * Add support for RISC-V Zvfbfmin extension with version 1.0. @@ -45,6 +45,8 @@ static int scrub_m68k_mri; /* The pseudo-op which switches in and out of MRI mode. See the comment in do_scrub_chars. */ static const char mri_pseudo[] = ".mri 0"; +static const char *mri_state; +static char mri_last_ch; #else #define scrub_m68k_mri 0 #endif @@ -56,6 +58,15 @@ static const char symver_pseudo[] = ".symver"; static const char * symver_state; #endif +/* The pseudo-op (without leading dot) at which we want to (perhaps just + temporarily) stop processing. See the comments in do_scrub_chars(). */ +static const char end_pseudo[] = "end "; +static const char * end_state; + +/* Whether, considering the state at start of assembly, NO_PSEUDO_DOT is + active. */ +static bool no_pseudo_dot; + static char last_char; #define LEX_IS_SYMBOL_COMPONENT 1 @@ -71,9 +82,6 @@ static char last_char; #ifdef TC_V850 #define LEX_IS_DOUBLEDASH_1ST 12 #endif -#ifdef TC_M32R -#define DOUBLEBAR_PARALLEL -#endif #ifdef DOUBLEBAR_PARALLEL #define LEX_IS_DOUBLEBAR_1ST 13 #endif @@ -93,7 +101,11 @@ static char last_char; static char lex[256] = { [' '] = LEX_IS_WHITESPACE, ['\t'] = LEX_IS_WHITESPACE, +#ifdef CR_EOL + ['\r'] = LEX_IS_LINE_SEPARATOR, +#else ['\r'] = LEX_IS_WHITESPACE, +#endif ['\n'] = LEX_IS_NEWLINE, [':'] = LEX_IS_COLON, ['$'] = LEX_IS_SYMBOL_COMPONENT, @@ -158,6 +170,12 @@ do_scrub_begin (int m68k_mri ATTRIBUTE_UNUSED) { const char *p; + /* Latch this once at start. xtensa uses a hook function, yet context isn't + meaningful for scrubbing (or else we'd need to sync scrubber behavior as + state changes). */ + if (lex['/'] == 0) + no_pseudo_dot = NO_PSEUDO_DOT; + #ifdef TC_M68K scrub_m68k_mri = m68k_mri; @@ -264,8 +282,6 @@ static int add_newlines; static char *saved_input; static size_t saved_input_len; static char input_buffer[32 * 1024]; -static const char *mri_state; -static char mri_last_ch; /* Data structure for saving the state of app across #include's. Note that app is called asynchronously to the parsing of the .include's, so our @@ -281,11 +297,12 @@ struct app_save int add_newlines; char * saved_input; size_t saved_input_len; + const char * end_state; #ifdef TC_M68K int scrub_m68k_mri; -#endif const char * mri_state; char mri_last_ch; +#endif #if defined TC_ARM && defined OBJ_ELF const char * symver_state; #endif @@ -311,11 +328,12 @@ app_push (void) memcpy (saved->saved_input, saved_input, saved_input_len); saved->saved_input_len = saved_input_len; } + saved->end_state = end_state; #ifdef TC_M68K saved->scrub_m68k_mri = scrub_m68k_mri; -#endif saved->mri_state = mri_state; saved->mri_last_ch = mri_last_ch; +#endif #if defined TC_ARM && defined OBJ_ELF saved->symver_state = symver_state; #endif @@ -351,11 +369,12 @@ app_pop (char *arg) saved_input_len = saved->saved_input_len; free (saved->saved_input); } + end_state = saved->end_state; #ifdef TC_M68K scrub_m68k_mri = saved->scrub_m68k_mri; -#endif mri_state = saved->mri_state; mri_last_ch = saved->mri_last_ch; +#endif #if defined TC_ARM && defined OBJ_ELF symver_state = saved->symver_state; #endif @@ -799,12 +818,51 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen, recycle: + /* We need to watch out for .end directives: We should in particular not + issue diagnostics for anything after an active one. */ + if (end_state == NULL) + { + if ((state == 0 || state == 1) + && (ch == '.' + || (no_pseudo_dot && ch == end_pseudo[0]))) + end_state = end_pseudo + (ch != '.'); + } + else if (ch != '\0' + && (*end_state == ch + /* Avoid triggering on directives like .endif or .endr. */ + || (*end_state == ' ' && !IS_SYMBOL_COMPONENT (ch)))) + { + if (IS_NEWLINE (ch) || IS_LINE_SEPARATOR (ch)) + goto end_end; + ++end_state; + } + else if (*end_state != '\0') + /* We did not get the expected character, or we didn't + get a valid terminating character after seeing the + entire pseudo-op, so we must go back to the beginning. */ + end_state = NULL; + else if (IS_NEWLINE (ch) || IS_LINE_SEPARATOR (ch)) + { + end_end: + /* We've read the entire pseudo-op. If this is the end of the line, + bail out now by (ab)using the output-full path. This allows the + caller to process input up to here and terminate processing if this + directive is actually active (not on the false branch of a + conditional and not in a macro definition). */ + end_state = NULL; + state = 0; + PUT (ch); + goto tofull; + } + #if defined TC_ARM && defined OBJ_ELF /* We need to watch out for .symver directives. See the comment later in this function. */ if (symver_state == NULL) { - if ((state == 0 || state == 1) && ch == symver_pseudo[0]) + if ((state == 0 || state == 1) + && strchr (tc_comment_chars, '@') != NULL + && ch == symver_pseudo[0]) symver_state = symver_pseudo + 1; } else @@ -822,7 +880,7 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen, { /* We've read the entire pseudo-op. If this is the end of the line, go back to the beginning. */ - if (IS_NEWLINE (ch)) + if (IS_NEWLINE (ch) || IS_LINE_SEPARATOR (ch)) symver_state = NULL; } } @@ -857,7 +915,9 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen, ++mri_state; } else if (*mri_state != '\0' - || (!IS_WHITESPACE (ch) && !IS_NEWLINE (ch))) + || (!IS_WHITESPACE (ch) + && !IS_LINE_SEPARATOR (ch) + && !IS_NEWLINE (ch))) { /* We did not get the expected character, or we didn't get a valid terminating character after seeing the @@ -1108,6 +1168,8 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen, } else if (state == 3) old_state = 9; + else if (state == 0) + old_state = 11; /* Now seeing label definition. */ else old_state = state; state = 5; @@ -1427,11 +1489,13 @@ do_scrub_chars (size_t (*get) (char *, size_t), char *tostart, size_t tolen, /* This is a common case. Quickly copy CH and all the following symbol component or normal characters. */ if (to + 1 < toend +#ifdef TC_M68K && mri_state == NULL +#endif #if defined TC_ARM && defined OBJ_ELF && symver_state == NULL #endif - ) + && end_state == NULL) { char *s; ptrdiff_t len; @@ -457,13 +457,8 @@ parse_args (int * pargc, char *** pargv) /* -K is not meaningful if .word is not being hacked. */ 'K', #endif - 'L', 'M', 'R', 'W', 'Z', 'a', ':', ':', 'D', 'f', 'g', ':',':', 'I', ':', 'o', ':', -#ifndef VMS - /* -v takes an argument on VMS, so we don't make it a generic - option. */ - 'v', -#endif - 'w', 'X', + 'L', 'M', 'R', 'W', 'Z', 'a', ':', ':', 'D', 'f', 'g', ':',':', 'I', ':', + 'o', ':', 'v', 'w', 'X', #ifdef HAVE_ITBL_CPU /* New option for extending instruction set (see also --itbl below). */ 't', ':', @@ -481,7 +476,6 @@ parse_args (int * pargc, char *** pargv) OPTION_STATISTICS, OPTION_VERSION, OPTION_DUMPCONFIG, - OPTION_VERBOSE, OPTION_EMULATION, OPTION_DEBUG_PREFIX_MAP, OPTION_DEFSYM, @@ -600,7 +594,7 @@ parse_args (int * pargc, char *** pargv) ,{"statistics", no_argument, NULL, OPTION_STATISTICS} ,{"strip-local-absolute", no_argument, NULL, OPTION_STRIP_LOCAL_ABSOLUTE} ,{"version", no_argument, NULL, OPTION_VERSION} - ,{"verbose", no_argument, NULL, OPTION_VERBOSE} + ,{"verbose", no_argument, NULL, 'v'} ,{"target-help", no_argument, NULL, OPTION_TARGET_HELP} ,{"traditional-format", no_argument, NULL, OPTION_TRADITIONAL_FORMAT} ,{"warn", no_argument, NULL, OPTION_WARN} @@ -650,24 +644,17 @@ parse_args (int * pargc, char *** pargv) it explicitly here before deciding we've gotten a bad argument. */ if (optc == 'v') { -#ifdef VMS - /* Telling getopt to treat -v's value as optional can result - in it picking up a following filename argument here. The - VMS code in md_parse_option can return 0 in that case, - but it has no way of pushing the filename argument back. */ - if (optarg && *optarg) - new_argv[new_argc++] = optarg, new_argv[new_argc] = NULL; - else -#else - case 'v': -#endif - case OPTION_VERBOSE: - print_version_id (); - verbose = 1; + case 'v': + print_version_id (); + verbose = 1; break; } + else if (is_a_char (optc)) + as_bad (_("unrecognized option `-%c%s'"), optc, optarg ? optarg : ""); + else if (optarg) + as_bad (_("unrecognized option `--%s=%s'"), longopts[longind].name, optarg); else - as_bad (_("unrecognized option -%c%s"), optc, optarg ? optarg : ""); + as_bad (_("unrecognized option `--%s'"), longopts[longind].name); /* Fall through. */ case '?': diff --git a/gas/config/loongarch-parse.y b/gas/config/loongarch-parse.y index 63a4fcf..0607248 100644 --- a/gas/config/loongarch-parse.y +++ b/gas/config/loongarch-parse.y @@ -368,24 +368,24 @@ multiplicative_expression | multiplicative_expression '%' unary_expression {emit_bin ('%');} ; -additive_expression +shift_expression : multiplicative_expression - | additive_expression '+' multiplicative_expression {emit_bin ('+');} - | additive_expression '-' multiplicative_expression {emit_bin ('-');} + | shift_expression LEFT_OP multiplicative_expression {emit_bin (LEFT_OP);} + | shift_expression RIGHT_OP multiplicative_expression {emit_bin (RIGHT_OP);} ; -shift_expression - : additive_expression - | shift_expression LEFT_OP additive_expression {emit_bin (LEFT_OP);} - | shift_expression RIGHT_OP additive_expression {emit_bin (RIGHT_OP);} +additive_expression + : shift_expression + | additive_expression '+' shift_expression {emit_bin ('+');} + | additive_expression '-' shift_expression {emit_bin ('-');} ; relational_expression - : shift_expression - | relational_expression '<' shift_expression {emit_bin ('<');} - | relational_expression '>' shift_expression {emit_bin ('>');} - | relational_expression LE_OP shift_expression {emit_bin (LE_OP);} - | relational_expression GE_OP shift_expression {emit_bin (GE_OP);} + : additive_expression + | relational_expression '<' additive_expression {emit_bin ('<');} + | relational_expression '>' additive_expression {emit_bin ('>');} + | relational_expression LE_OP additive_expression {emit_bin (LE_OP);} + | relational_expression GE_OP additive_expression {emit_bin (GE_OP);} ; equality_expression diff --git a/gas/config/tc-bfin.h b/gas/config/tc-bfin.h index 94b146e..5567c97 100644 --- a/gas/config/tc-bfin.h +++ b/gas/config/tc-bfin.h @@ -44,7 +44,7 @@ extern bool bfin_start_label (char *); #define md_convert_frag(b,s,f) as_fatal ("bfin convert_frag\n"); /* Allow for [, ], etc. */ -#define LEX_BR 6 +#define LEX_BR (LEX_BEGIN_NAME | LEX_END_NAME) #define TC_EOL_IN_INSN(PTR) (bfin_eol_in_insn(PTR) ? 1 : 0) extern bool bfin_eol_in_insn (char *); diff --git a/gas/config/tc-dlx.h b/gas/config/tc-dlx.h index c5e8545..4c52593 100644 --- a/gas/config/tc-dlx.h +++ b/gas/config/tc-dlx.h @@ -29,7 +29,7 @@ #define WORKING_DOT_WORD -#define LEX_DOLLAR 1 +#define LEX_DOLLAR LEX_NAME #include "bit_fix.h" diff --git a/gas/config/tc-i386-ginsn.c b/gas/config/tc-i386-ginsn.c index b9dc9c1..a4ebdf1 100644 --- a/gas/config/tc-i386-ginsn.c +++ b/gas/config/tc-i386-ginsn.c @@ -488,6 +488,8 @@ x86_ginsn_indirect_branch (const symbolS *insn_end_sym) else if (i.tm.extension_opcode == 2) /* 0xFF /2 (call r/m). */ ginsn_func = ginsn_new_call; + else + return ginsn; if (i.reg_operands) { diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 87a1d0c..4739a6d 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1186,6 +1186,7 @@ static const arch_entry cpu_arch[] = VECARCH (avx10.1, AVX10_1, ANY_AVX512F, set), SUBARCH (user_msr, USER_MSR, USER_MSR, false), SUBARCH (apx_f, APX_F, APX_F, false), + VECARCH (avx10.2, AVX10_2, ANY_AVX10_2, set), }; #undef SUBARCH @@ -1293,6 +1294,94 @@ static htab_t op_hash; /* Hash table for register lookup. */ static htab_t reg_hash; + +static const struct +{ + const char *str; + unsigned int len; + const enum bfd_reloc_code_real rel[2]; + const i386_operand_type types64; + bool need_GOT_symbol; +} +gotrel[] = +{ +#define OPERAND_TYPE_IMM32_32S_DISP32 { .bitfield = \ + { .imm32 = 1, .imm32s = 1, .disp32 = 1 } } +#define OPERAND_TYPE_IMM32_32S_64_DISP32 { .bitfield = \ + { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1 } } +#define OPERAND_TYPE_IMM32_32S_64_DISP32_64 { .bitfield = \ + { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1, .disp64 = 1 } } +#define OPERAND_TYPE_IMM64_DISP64 { .bitfield = \ + { .imm64 = 1, .disp64 = 1 } } + +#ifndef TE_PE +#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) + { STRING_COMMA_LEN ("SIZE"), { BFD_RELOC_SIZE32, + BFD_RELOC_SIZE32 }, + { .bitfield = { .imm32 = 1, .imm64 = 1 } }, false }, +#endif + { STRING_COMMA_LEN ("PLTOFF"), { _dummy_first_bfd_reloc_code_real, + BFD_RELOC_X86_64_PLTOFF64 }, + { .bitfield = { .imm64 = 1 } }, true }, + { STRING_COMMA_LEN ("PLT"), { BFD_RELOC_386_PLT32, + BFD_RELOC_X86_64_PLT32 }, + OPERAND_TYPE_IMM32_32S_DISP32, false }, + { STRING_COMMA_LEN ("GOTPLT"), { _dummy_first_bfd_reloc_code_real, + BFD_RELOC_X86_64_GOTPLT64 }, + OPERAND_TYPE_IMM64_DISP64, true }, + { STRING_COMMA_LEN ("GOTOFF"), { BFD_RELOC_386_GOTOFF, + BFD_RELOC_X86_64_GOTOFF64 }, + OPERAND_TYPE_IMM64_DISP64, true }, + { STRING_COMMA_LEN ("GOTPCREL"), { _dummy_first_bfd_reloc_code_real, + BFD_RELOC_X86_64_GOTPCREL }, + OPERAND_TYPE_IMM32_32S_DISP32, true }, + { STRING_COMMA_LEN ("TLSGD"), { BFD_RELOC_386_TLS_GD, + BFD_RELOC_X86_64_TLSGD }, + OPERAND_TYPE_IMM32_32S_DISP32, true }, + { STRING_COMMA_LEN ("TLSLDM"), { BFD_RELOC_386_TLS_LDM, + _dummy_first_bfd_reloc_code_real }, + OPERAND_TYPE_NONE, true }, + { STRING_COMMA_LEN ("TLSLD"), { _dummy_first_bfd_reloc_code_real, + BFD_RELOC_X86_64_TLSLD }, + OPERAND_TYPE_IMM32_32S_DISP32, true }, + { STRING_COMMA_LEN ("GOTTPOFF"), { BFD_RELOC_386_TLS_IE_32, + BFD_RELOC_X86_64_GOTTPOFF }, + OPERAND_TYPE_IMM32_32S_DISP32, true }, + { STRING_COMMA_LEN ("TPOFF"), { BFD_RELOC_386_TLS_LE_32, + BFD_RELOC_X86_64_TPOFF32 }, + OPERAND_TYPE_IMM32_32S_64_DISP32_64, true }, + { STRING_COMMA_LEN ("NTPOFF"), { BFD_RELOC_386_TLS_LE, + _dummy_first_bfd_reloc_code_real }, + OPERAND_TYPE_NONE, true }, + { STRING_COMMA_LEN ("DTPOFF"), { BFD_RELOC_386_TLS_LDO_32, + BFD_RELOC_X86_64_DTPOFF32 }, + OPERAND_TYPE_IMM32_32S_64_DISP32_64, true }, + { STRING_COMMA_LEN ("GOTNTPOFF"),{ BFD_RELOC_386_TLS_GOTIE, + _dummy_first_bfd_reloc_code_real }, + OPERAND_TYPE_NONE, true }, + { STRING_COMMA_LEN ("INDNTPOFF"),{ BFD_RELOC_386_TLS_IE, + _dummy_first_bfd_reloc_code_real }, + OPERAND_TYPE_NONE, true }, + { STRING_COMMA_LEN ("GOT"), { BFD_RELOC_386_GOT32, + BFD_RELOC_X86_64_GOT32 }, + OPERAND_TYPE_IMM32_32S_64_DISP32, true }, + { STRING_COMMA_LEN ("TLSDESC"), { BFD_RELOC_386_TLS_GOTDESC, + BFD_RELOC_X86_64_GOTPC32_TLSDESC }, + OPERAND_TYPE_IMM32_32S_DISP32, true }, + { STRING_COMMA_LEN ("TLSCALL"), { BFD_RELOC_386_TLS_DESC_CALL, + BFD_RELOC_X86_64_TLSDESC_CALL }, + OPERAND_TYPE_IMM32_32S_DISP32, true }, +#else /* TE_PE */ + { STRING_COMMA_LEN ("SECREL32"), { BFD_RELOC_32_SECREL, + BFD_RELOC_32_SECREL }, + OPERAND_TYPE_IMM32_32S_64_DISP32_64, false }, +#endif + +#undef OPERAND_TYPE_IMM32_32S_DISP32 +#undef OPERAND_TYPE_IMM32_32S_64_DISP32 +#undef OPERAND_TYPE_IMM32_32S_64_DISP32_64 +#undef OPERAND_TYPE_IMM64_DISP64 +}; /* Various efficient no-op patterns for aligning code labels. Note: Don't try to assemble the instructions in the comments. @@ -3080,9 +3169,16 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED) const arch_stack_entry *top = arch_stack_top; if (!top) - as_bad (_(".arch stack is empty")); - else if (top->flag_code != flag_code - || top->stackop_size != stackop_size) + { + as_bad (_(".arch stack is empty")); + restore_bad: + (void) restore_line_pointer (e); + ignore_rest_of_line (); + return; + } + + if (top->flag_code != flag_code + || top->stackop_size != stackop_size) { static const unsigned int bits[] = { [CODE_16BIT] = 16, @@ -3093,22 +3189,21 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED) as_bad (_("this `.arch pop' requires `.code%u%s' to be in effect"), bits[top->flag_code], top->stackop_size == LONG_MNEM_SUFFIX ? "gcc" : ""); + goto restore_bad; } - else - { - arch_stack_top = top->prev; - cpu_arch_name = top->name; - free (cpu_sub_arch_name); - cpu_sub_arch_name = top->sub_name; - cpu_arch_flags = top->flags; - cpu_arch_isa = top->isa; - cpu_arch_isa_flags = top->isa_flags; - vector_size = top->vector_size; - no_cond_jump_promotion = top->no_cond_jump_promotion; + arch_stack_top = top->prev; - XDELETE (top); - } + cpu_arch_name = top->name; + free (cpu_sub_arch_name); + cpu_sub_arch_name = top->sub_name; + cpu_arch_flags = top->flags; + cpu_arch_isa = top->isa; + cpu_arch_isa_flags = top->isa_flags; + vector_size = top->vector_size; + no_cond_jump_promotion = top->no_cond_jump_promotion; + + XDELETE (top); (void) restore_line_pointer (e); demand_empty_rest_of_line (); @@ -3151,18 +3246,14 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED) { as_bad (_("64bit mode not supported on `%s'."), cpu_arch[j].name); - (void) restore_line_pointer (e); - ignore_rest_of_line (); - return; + goto restore_bad; } if (flag_code == CODE_32BIT && !cpu_arch[j].enable.bitfield.cpui386) { as_bad (_("32bit mode not supported on `%s'."), cpu_arch[j].name); - (void) restore_line_pointer (e); - ignore_rest_of_line (); - return; + goto restore_bad; } cpu_arch_name = cpu_arch[j].name; @@ -3242,12 +3333,13 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED) } if (j == ARRAY_SIZE (cpu_arch)) - as_bad (_("no such architecture: `%s'"), string); - - *input_line_pointer = e; + { + as_bad (_("no such architecture: `%s'"), string); + goto restore_bad; + } no_cond_jump_promotion = 0; - if (*input_line_pointer == ',' + if (restore_line_pointer (e) == ',' && !is_end_of_line[(unsigned char) input_line_pointer[1]]) { ++input_line_pointer; @@ -3256,10 +3348,11 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED) if (strcmp (string, "nojumps") == 0) no_cond_jump_promotion = 1; - else if (strcmp (string, "jumps") == 0) - ; - else - as_bad (_("no such architecture modifier: `%s'"), string); + else if (strcmp (string, "jumps") != 0) + { + as_bad (_("no such architecture modifier: `%s'"), string); + goto restore_bad; + } (void) restore_line_pointer (e); } @@ -3949,7 +4042,7 @@ build_vex_prefix (const insn_template *t) { unsigned int register_specifier; unsigned int vector_length; - unsigned int w; + bool w; /* Check register specifier. */ if (i.vex.register_specifier) @@ -4048,11 +4141,11 @@ build_vex_prefix (const insn_template *t) /* Check the REX.W bit and VEXW. */ if (i.tm.opcode_modifier.vexw == VEXWIG) - w = (vexwig == vexw1 || (i.rex & REX_W)) ? 1 : 0; + w = vexwig == vexw1 || (i.rex & REX_W); else if (i.tm.opcode_modifier.vexw && !(i.rex & REX_W)) - w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0; + w = i.tm.opcode_modifier.vexw == VEXW1; else - w = (flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1) ? 1 : 0; + w = flag_code == CODE_64BIT ? i.rex & REX_W : vexwig == vexw1; /* Use 2-byte VEX prefix if possible. */ if (w == 0 @@ -4061,13 +4154,13 @@ build_vex_prefix (const insn_template *t) && (i.rex & (REX_W | REX_X | REX_B)) == 0) { /* 2-byte VEX prefix. */ - unsigned int r; + bool r; i.vex.length = 2; i.vex.bytes[0] = 0xc5; /* Check the REX.R bit. */ - r = (i.rex & REX_R) ? 0 : 1; + r = !(i.rex & REX_R); i.vex.bytes[1] = (r << 7 | register_specifier << 3 | vector_length << 2 @@ -4205,7 +4298,8 @@ get_broadcast_bytes (const insn_template *t, bool diag) static void build_evex_prefix (void) { - unsigned int register_specifier, w; + unsigned int register_specifier; + bool w, u; rex_byte vrex_used = 0; /* Check register specifier. */ @@ -4272,16 +4366,68 @@ build_evex_prefix (void) /* Check the REX.W bit and VEXW. */ if (i.tm.opcode_modifier.vexw == VEXWIG) - w = (evexwig == evexw1 || (i.rex & REX_W)) ? 1 : 0; + w = evexwig == evexw1 || (i.rex & REX_W); else if (i.tm.opcode_modifier.vexw && !(i.rex & REX_W)) - w = i.tm.opcode_modifier.vexw == VEXW1 ? 1 : 0; + w = i.tm.opcode_modifier.vexw == VEXW1; else - w = (flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1) ? 1 : 0; + w = flag_code == CODE_64BIT ? i.rex & REX_W : evexwig == evexw1; + + if (i.tm.opcode_modifier.evex == EVEXDYN) + { + unsigned int op; + + /* Determine vector length from the last multi-length vector operand. */ + for (op = i.operands; op--;) + if (i.tm.operand_types[op].bitfield.xmmword + + i.tm.operand_types[op].bitfield.ymmword + + i.tm.operand_types[op].bitfield.zmmword > 1) + { + if (i.types[op].bitfield.zmmword) + { + i.tm.opcode_modifier.evex = EVEX512; + break; + } + else if (i.types[op].bitfield.ymmword) + { + i.tm.opcode_modifier.evex = EVEX256; + break; + } + else if (i.types[op].bitfield.xmmword) + { + i.tm.opcode_modifier.evex = EVEX128; + break; + } + else if ((i.broadcast.type || i.broadcast.bytes) + && op == i.broadcast.operand) + { + switch (get_broadcast_bytes (&i.tm, true)) + { + case 64: + i.tm.opcode_modifier.evex = EVEX512; + break; + case 32: + i.tm.opcode_modifier.evex = EVEX256; + break; + case 16: + i.tm.opcode_modifier.evex = EVEX128; + break; + default: + abort (); + } + break; + } + } + + if (op >= MAX_OPERANDS) + abort (); + } + + u = i.rounding.type == rc_none || i.tm.opcode_modifier.evex != EVEX256; /* The third byte of the EVEX prefix. */ i.vex.bytes[2] = ((w << 7) | (register_specifier << 3) - | 4 /* Encode the U bit. */ + | (u << 2) | i.tm.opcode_modifier.opcodeprefix); /* The fourth byte of the EVEX prefix. */ @@ -4295,57 +4441,6 @@ build_evex_prefix (void) /* Encode the vector length. */ unsigned int vec_length; - if (i.tm.opcode_modifier.evex == EVEXDYN) - { - unsigned int op; - - /* Determine vector length from the last multi-length vector - operand. */ - for (op = i.operands; op--;) - if (i.tm.operand_types[op].bitfield.xmmword - + i.tm.operand_types[op].bitfield.ymmword - + i.tm.operand_types[op].bitfield.zmmword > 1) - { - if (i.types[op].bitfield.zmmword) - { - i.tm.opcode_modifier.evex = EVEX512; - break; - } - else if (i.types[op].bitfield.ymmword) - { - i.tm.opcode_modifier.evex = EVEX256; - break; - } - else if (i.types[op].bitfield.xmmword) - { - i.tm.opcode_modifier.evex = EVEX128; - break; - } - else if ((i.broadcast.type || i.broadcast.bytes) - && op == i.broadcast.operand) - { - switch (get_broadcast_bytes (&i.tm, true)) - { - case 64: - i.tm.opcode_modifier.evex = EVEX512; - break; - case 32: - i.tm.opcode_modifier.evex = EVEX256; - break; - case 16: - i.tm.opcode_modifier.evex = EVEX128; - break; - default: - abort (); - } - break; - } - } - - if (op >= MAX_OPERANDS) - abort (); - } - switch (i.tm.opcode_modifier.evex) { case EVEXLIG: /* LL' is ignored */ @@ -4487,9 +4582,9 @@ static void establish_rex (void) i.rex |= i.prefix[REX_PREFIX] & REX_OPCODE; /* For 8 bit RegRex64 registers without a prefix, we need an empty rex prefix. */ - if (((i.types[first].bitfield.class == Reg && i.types[first].bitfield.byte + if (((i.types[first].bitfield.class == Reg && (i.op[first].regs->reg_flags & RegRex64) != 0) - || (i.types[last].bitfield.class == Reg && i.types[last].bitfield.byte + || (i.types[last].bitfield.class == Reg && (i.op[last].regs->reg_flags & RegRex64) != 0)) && !is_apx_rex2_encoding () && !is_any_vex_encoding (&i.tm)) i.rex |= REX_OPCODE; @@ -4503,9 +4598,8 @@ static void establish_rex (void) { /* Look for 8 bit operand that uses old registers. */ if (i.types[x].bitfield.class == Reg && i.types[x].bitfield.byte - && (i.op[x].regs->reg_flags & RegRex64) == 0) + && !(i.op[x].regs->reg_flags & (RegRex | RegRex2 | RegRex64))) { - gas_assert (!(i.op[x].regs->reg_flags & RegRex)); /* In case it is "hi" register, give up. */ if (i.op[x].regs->reg_num > 3) as_bad (_("can't encode register '%s%s' in an " @@ -4531,10 +4625,9 @@ static void establish_rex (void) for (x = first; x <= last; x++) if (i.types[x].bitfield.class == Reg && i.types[x].bitfield.byte - && (i.op[x].regs->reg_flags & RegRex64) == 0 + && !(i.op[x].regs->reg_flags & (RegRex | RegRex2 | RegRex64)) && i.op[x].regs->reg_num > 3) { - gas_assert (!(i.op[x].regs->reg_flags & RegRex)); pp.rex_encoding = false; pp.rex2_encoding = false; break; @@ -4839,7 +4932,7 @@ optimize_encoding (void) /* Squash the suffix. */ i.suffix = 0; /* Convert to byte registers. 8-bit registers are special, - RegRex64 and non-RegRex64 each have 8 registers. */ + RegRex64 and non-RegRex* each have 8 registers. */ if (i.types[1].bitfield.word) /* 32 (or 40) 8-bit registers. */ j = 32; @@ -5054,6 +5147,41 @@ optimize_encoding (void) break; } } + else if (optimize > 1 + && (i.tm.base_opcode | 0xf) == 0x4f + && i.tm.opcode_space == SPACE_EVEXMAP4 + && i.reg_operands == 3 + && i.tm.opcode_modifier.operandconstraint == EVEX_NF + && !i.types[0].bitfield.word) + { + /* Optimize: -O2: + cfcmov<cc> %rM, %rN, %rN -> cmov<cc> %rM, %rN + cfcmov<cc> %rM, %rN, %rM -> cmov<!cc> %rN, %rM + cfcmov<cc> %rN, %rN, %rN -> nop %rN + */ + if (i.op[0].regs == i.op[2].regs) + { + i.tm.base_opcode ^= 1; + i.op[0].regs = i.op[1].regs; + i.op[1].regs = i.op[2].regs; + } + else if (i.op[1].regs != i.op[2].regs) + return; + + i.tm.opcode_space = SPACE_0F; + i.tm.opcode_modifier.evex = 0; + i.tm.opcode_modifier.vexvvvv = 0; + i.tm.opcode_modifier.operandconstraint = 0; + i.reg_operands = 2; + + /* While at it, convert to NOP if all three regs match. */ + if (i.op[0].regs == i.op[1].regs) + { + i.tm.base_opcode = 0x1f; + i.tm.extension_opcode = 0; + i.reg_operands = 1; + } + } else if (i.reg_operands == 3 && i.op[0].regs == i.op[1].regs && !i.types[2].bitfield.xmmword @@ -5392,7 +5520,7 @@ static bool is_index (const reg_entry *r) if (r->reg_type.bitfield.byte) { - if (!(r->reg_flags & RegRex64)) + if (!(r->reg_flags & (RegRex | RegRex2 | RegRex64))) { if (r->reg_num >= 4) return false; @@ -6578,16 +6706,24 @@ i386_assemble (char *line) return; } - /* Don't allow e.g. KMOV in TLS code sequences. */ + /* Don't allow e.g. KMOV in TLS code sequences which will trigger + linker error later. */ for (j = i.imm_operands; j < i.operands; ++j) switch (i.reloc[j]) { case BFD_RELOC_X86_64_GOTTPOFF: case BFD_RELOC_386_TLS_GOTIE: - case BFD_RELOC_386_TLS_LE_32: case BFD_RELOC_X86_64_TLSLD: - as_bad (_("TLS relocation cannot be used with `%s'"), insn_name (&i.tm)); - return; + for (unsigned int k = 0; k < ARRAY_SIZE (gotrel); k++) + { + if (gotrel[k].rel[object_64bit] == i.reloc[j]) + { + as_bad (_("@%s operator cannot be used with `%s'"), + gotrel[k].str, insn_name (&i.tm)); + return; + } + } + abort (); default: break; } @@ -8024,18 +8160,22 @@ check_VecOperands (const insn_template *t) return 1; } - /* Non-EVEX.LIG forms need to have a ZMM register as at least one - operand. */ - if (t->opcode_modifier.evex != EVEXLIG) - { - for (op = 0; op < t->operands; ++op) - if (i.types[op].bitfield.zmmword) - break; - if (op >= t->operands) - { - i.error = operand_size_mismatch; - return 1; - } + /* Non-EVEX.{LIG,512,256} forms need to have a ZMM or YMM register as at + least one operand. For YMM register or EVEX256, we will need AVX10.2 + enabled. There's no need to check all operands, though: Either of the + last two operands will be of the right size in all relevant templates. */ + if (t->opcode_modifier.evex != EVEXLIG + && t->opcode_modifier.evex != EVEX512 + && (t->opcode_modifier.evex != EVEX256 + || !cpu_arch_flags.bitfield.cpuavx10_2) + && !i.types[t->operands - 1].bitfield.zmmword + && !i.types[t->operands - 2].bitfield.zmmword + && ((!i.types[t->operands - 1].bitfield.ymmword + && !i.types[t->operands - 2].bitfield.ymmword) + || !cpu_arch_flags.bitfield.cpuavx10_2)) + { + i.error = operand_size_mismatch; + return 1; } } @@ -8742,7 +8882,10 @@ match_template (char mnem_suffix) found_reverse_match = Opcode_D; goto check_operands_345; } - else if (t->opcode_modifier.commutative) + else if (t->opcode_modifier.commutative + /* CFCMOVcc also wants its major opcode unaltered. */ + || (t->opcode_space == SPACE_EVEXMAP4 + && (t->base_opcode | 0xf) == 0x4f)) found_reverse_match = ~0; else if (t->opcode_space != SPACE_BASE && (t->opcode_space != SPACE_EVEXMAP4 @@ -9042,6 +9185,9 @@ match_template (char mnem_suffix) /* Fall through. */ case ~0: + if (i.tm.opcode_space == SPACE_EVEXMAP4 + && !t->opcode_modifier.commutative) + i.tm.opcode_modifier.operandconstraint = EVEX_NF; i.tm.operand_types[0] = operand_types[i.operands - 1]; i.tm.operand_types[i.operands - 1] = operand_types[0]; break; @@ -12328,95 +12474,6 @@ lex_got (enum bfd_reloc_code_real *rel, we don't yet know the operand size (this will be set by insn matching). Hence we record the word32 relocation here, and adjust the reloc according to the real size in reloc(). */ - static const struct - { - const char *str; - int len; - const enum bfd_reloc_code_real rel[2]; - const i386_operand_type types64; - bool need_GOT_symbol; - } - gotrel[] = - { - -#define OPERAND_TYPE_IMM32_32S_DISP32 { .bitfield = \ - { .imm32 = 1, .imm32s = 1, .disp32 = 1 } } -#define OPERAND_TYPE_IMM32_32S_64_DISP32 { .bitfield = \ - { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1 } } -#define OPERAND_TYPE_IMM32_32S_64_DISP32_64 { .bitfield = \ - { .imm32 = 1, .imm32s = 1, .imm64 = 1, .disp32 = 1, .disp64 = 1 } } -#define OPERAND_TYPE_IMM64_DISP64 { .bitfield = \ - { .imm64 = 1, .disp64 = 1 } } - -#ifndef TE_PE -#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) - { STRING_COMMA_LEN ("SIZE"), { BFD_RELOC_SIZE32, - BFD_RELOC_SIZE32 }, - { .bitfield = { .imm32 = 1, .imm64 = 1 } }, false }, -#endif - { STRING_COMMA_LEN ("PLTOFF"), { _dummy_first_bfd_reloc_code_real, - BFD_RELOC_X86_64_PLTOFF64 }, - { .bitfield = { .imm64 = 1 } }, true }, - { STRING_COMMA_LEN ("PLT"), { BFD_RELOC_386_PLT32, - BFD_RELOC_X86_64_PLT32 }, - OPERAND_TYPE_IMM32_32S_DISP32, false }, - { STRING_COMMA_LEN ("GOTPLT"), { _dummy_first_bfd_reloc_code_real, - BFD_RELOC_X86_64_GOTPLT64 }, - OPERAND_TYPE_IMM64_DISP64, true }, - { STRING_COMMA_LEN ("GOTOFF"), { BFD_RELOC_386_GOTOFF, - BFD_RELOC_X86_64_GOTOFF64 }, - OPERAND_TYPE_IMM64_DISP64, true }, - { STRING_COMMA_LEN ("GOTPCREL"), { _dummy_first_bfd_reloc_code_real, - BFD_RELOC_X86_64_GOTPCREL }, - OPERAND_TYPE_IMM32_32S_DISP32, true }, - { STRING_COMMA_LEN ("TLSGD"), { BFD_RELOC_386_TLS_GD, - BFD_RELOC_X86_64_TLSGD }, - OPERAND_TYPE_IMM32_32S_DISP32, true }, - { STRING_COMMA_LEN ("TLSLDM"), { BFD_RELOC_386_TLS_LDM, - _dummy_first_bfd_reloc_code_real }, - OPERAND_TYPE_NONE, true }, - { STRING_COMMA_LEN ("TLSLD"), { _dummy_first_bfd_reloc_code_real, - BFD_RELOC_X86_64_TLSLD }, - OPERAND_TYPE_IMM32_32S_DISP32, true }, - { STRING_COMMA_LEN ("GOTTPOFF"), { BFD_RELOC_386_TLS_IE_32, - BFD_RELOC_X86_64_GOTTPOFF }, - OPERAND_TYPE_IMM32_32S_DISP32, true }, - { STRING_COMMA_LEN ("TPOFF"), { BFD_RELOC_386_TLS_LE_32, - BFD_RELOC_X86_64_TPOFF32 }, - OPERAND_TYPE_IMM32_32S_64_DISP32_64, true }, - { STRING_COMMA_LEN ("NTPOFF"), { BFD_RELOC_386_TLS_LE, - _dummy_first_bfd_reloc_code_real }, - OPERAND_TYPE_NONE, true }, - { STRING_COMMA_LEN ("DTPOFF"), { BFD_RELOC_386_TLS_LDO_32, - BFD_RELOC_X86_64_DTPOFF32 }, - OPERAND_TYPE_IMM32_32S_64_DISP32_64, true }, - { STRING_COMMA_LEN ("GOTNTPOFF"),{ BFD_RELOC_386_TLS_GOTIE, - _dummy_first_bfd_reloc_code_real }, - OPERAND_TYPE_NONE, true }, - { STRING_COMMA_LEN ("INDNTPOFF"),{ BFD_RELOC_386_TLS_IE, - _dummy_first_bfd_reloc_code_real }, - OPERAND_TYPE_NONE, true }, - { STRING_COMMA_LEN ("GOT"), { BFD_RELOC_386_GOT32, - BFD_RELOC_X86_64_GOT32 }, - OPERAND_TYPE_IMM32_32S_64_DISP32, true }, - { STRING_COMMA_LEN ("TLSDESC"), { BFD_RELOC_386_TLS_GOTDESC, - BFD_RELOC_X86_64_GOTPC32_TLSDESC }, - OPERAND_TYPE_IMM32_32S_DISP32, true }, - { STRING_COMMA_LEN ("TLSCALL"), { BFD_RELOC_386_TLS_DESC_CALL, - BFD_RELOC_X86_64_TLSDESC_CALL }, - OPERAND_TYPE_IMM32_32S_DISP32, true }, -#else /* TE_PE */ - { STRING_COMMA_LEN ("SECREL32"), { BFD_RELOC_32_SECREL, - BFD_RELOC_32_SECREL }, - OPERAND_TYPE_IMM32_32S_64_DISP32_64, false }, -#endif - -#undef OPERAND_TYPE_IMM32_32S_DISP32 -#undef OPERAND_TYPE_IMM32_32S_64_DISP32 -#undef OPERAND_TYPE_IMM32_32S_64_DISP32_64 -#undef OPERAND_TYPE_IMM64_DISP64 - - }; char *cp; unsigned int j; @@ -13057,7 +13114,8 @@ s_insn (int dummy ATTRIBUTE_UNUSED) case 3: if (pp.encoding != encoding_default) { - i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC1; + i.tm.opcode_modifier.vexvvvv = i.tm.extension_opcode == None + ? VexVVVV_SRC1 : VexVVVV_DST; break; } /* Fall through. */ @@ -13141,7 +13199,7 @@ s_insn (int dummy ATTRIBUTE_UNUSED) && flag_code == CODE_64BIT && i.types[j].bitfield.class == Reg && i.types[j].bitfield.byte - && !(i.op[j].regs->reg_flags & RegRex64) + && !(i.op[j].regs->reg_flags & (RegRex | RegRex2 | RegRex64)) && i.op[j].regs->reg_num > 3) as_bad (_("can't encode register '%s%s' with VEX/XOP/EVEX"), register_prefix, i.op[j].regs->reg_name); diff --git a/gas/config/tc-loongarch.c b/gas/config/tc-loongarch.c index 5ca33c6..eee2bad 100644 --- a/gas/config/tc-loongarch.c +++ b/gas/config/tc-loongarch.c @@ -1078,34 +1078,34 @@ check_this_insn_before_appending (struct loongarch_cl_insn *ip) ip->reloc_info[ip->reloc_num].value = const_0; ip->reloc_num++; } - else if (ip->insn->mask == 0xffff8000 - /* amcas.b rd, rk, rj */ - && ((ip->insn_bin & 0xfff80000) == 0x38580000 - /* amswap.w rd, rk, rj */ - || (ip->insn_bin & 0xfff00000) == 0x38600000 - /* ammax_db.wu rd, rk, rj */ - || (ip->insn_bin & 0xffff0000) == 0x38700000 - /* ammin_db.wu rd, rk, rj */ - || (ip->insn_bin & 0xffff0000) == 0x38710000)) + /* check all atomic memory insns */ + else if (ip->insn->mask == LARCH_MK_ATOMIC_MEM + && LARCH_INSN_ATOMIC_MEM(ip->insn_bin)) { /* For AMO insn amswap.[wd], amadd.[wd], etc. */ if (ip->args[0] != 0 && (ip->args[0] == ip->args[1] || ip->args[0] == ip->args[2])) - as_bad (_("automic memory operations insns require rd != rj" + as_bad (_("atomic memory operations insns require rd != rj" " && rd != rk when rd isn't r0")); } - else if ((ip->insn->mask == 0xffe08000 - /* bstrins.w rd, rj, msbw, lsbw */ - && (ip->insn_bin & 0xffe00000) == 0x00600000) - || (ip->insn->mask == 0xffc00000 - /* bstrins.d rd, rj, msbd, lsbd */ - && (ip->insn_bin & 0xff800000) == 0x00800000)) + else if ((ip->insn->mask == LARCH_MK_BSTRINS_W + /* bstr(ins|pick).w rd, rj, msbw, lsbw */ + && (LARCH_INSN_BSTRINS_W(ip->insn_bin) + || LARCH_INSN_BSTRPICK_W(ip->insn_bin))) + || (ip->insn->mask == LARCH_MK_BSTRINS_D + /* bstr(ins|pick).d rd, rj, msbd, lsbd */ + && (LARCH_INSN_BSTRINS_D(ip->insn_bin) + || LARCH_INSN_BSTRPICK_D(ip->insn_bin)))) { /* For bstr(ins|pick).[wd]. */ if (ip->args[2] < ip->args[3]) as_bad (_("bstr(ins|pick).[wd] require msbd >= lsbd")); } - else if (ip->insn->mask != 0 && (ip->insn_bin & 0xfe0003c0) == 0x04000000 + else if (ip->insn->mask != 0 + && (LARCH_INSN_CSRXCHG(ip->insn_bin) + || LARCH_INSN_GCSRXCHG(ip->insn_bin)) + && (LARCH_GET_RJ(ip->insn_bin) == 0 + || LARCH_GET_RJ(ip->insn_bin) == 1) /* csrxchg rd, rj, csr_num */ && (strcmp ("csrxchg", ip->name) == 0 || strcmp ("gcsrxchg", ip->name) == 0)) @@ -1221,6 +1221,9 @@ append_fixp_and_insn (struct loongarch_cl_insn *ip) bfd_get_reloc_size (howto), &reloc_info[i].value, FALSE, r_type); } + /* Allow LoongArch 64 to use 64-bit addends. */ + if (LARCH_opts.ase_lp64) + ip->fixp[i]->fx_no_overflow = 1; } } @@ -2204,7 +2207,7 @@ loongarch_convert_frag_branch (fragS *fragp) case RELAX_BRANCH_26: insn = bfd_getl32 (buf); /* Invert the branch condition. */ - if (LARCH_FLOAT_BRANCH == (insn & LARCH_BRANCH_OPCODE_MASK)) + if (LARCH_INSN_FLOAT_BRANCH(insn)) insn ^= LARCH_FLOAT_BRANCH_INVERT_BIT; else insn ^= LARCH_BRANCH_INVERT_BIT; diff --git a/gas/config/tc-m32r.h b/gas/config/tc-m32r.h index 4d26940..9463865 100644 --- a/gas/config/tc-m32r.h +++ b/gas/config/tc-m32r.h @@ -42,6 +42,9 @@ extern const char *m32r_target_format (void); /* Permit temporary numeric labels. */ #define LOCAL_LABELS_FB 1 +/* '||' denotes parallel instruction */ +#define DOUBLEBAR_PARALLEL + #define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs. */ /* We don't need to handle .word strangely. */ diff --git a/gas/config/tc-msp430.h b/gas/config/tc-msp430.h index 0c2565e..f28dcb7 100644 --- a/gas/config/tc-msp430.h +++ b/gas/config/tc-msp430.h @@ -99,7 +99,7 @@ /* Support symbols like: C$$IO$$. */ #undef LEX_DOLLAR -#define LEX_DOLLAR 1 +#define LEX_DOLLAR LEX_NAME #define TC_IMPLICIT_LCOMM_ALIGNMENT(SIZE, P2VAR) (P2VAR) = 0 /* An `.lcomm' directive with no explicit alignment parameter will diff --git a/gas/config/tc-ppc.h b/gas/config/tc-ppc.h index a65d1e3..ddc018c 100644 --- a/gas/config/tc-ppc.h +++ b/gas/config/tc-ppc.h @@ -149,7 +149,7 @@ struct ppc_tc_sy #define OBJ_COFF_MAX_AUXENTRIES 4 /* Square and curly brackets are permitted in symbol names. */ -#define LEX_BR 3 +#define LEX_BR (LEX_BEGIN_NAME | LEX_NAME) /* Canonicalize the symbol name. */ #define tc_canonicalize_symbol_name(name) ppc_canonicalize_symbol_name (name) diff --git a/gas/config/tc-pru.c b/gas/config/tc-pru.c index 99a3c1e..fb158fb 100644 --- a/gas/config/tc-pru.c +++ b/gas/config/tc-pru.c @@ -1401,6 +1401,7 @@ pru_parse_args (pru_insn_infoS *insn ATTRIBUTE_UNUSED, char *argstr, char *p; char *end = NULL; int i; + size_t len; p = argstr; i = 0; bool terminate = false; @@ -1437,6 +1438,13 @@ pru_parse_args (pru_insn_infoS *insn ATTRIBUTE_UNUSED, char *argstr, as_bad (_("too many arguments")); } + /* Strip trailing whitespace. */ + len = strlen (parsed_args[i]); + for (char *temp = parsed_args[i] + len - 1; + len && ISSPACE (*temp); + temp--, len--) + *temp = '\0'; + if (*parsestr == '\0' || (p != NULL && *p == '\0')) terminate = true; ++i; diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 779e0b8..bf2020d 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -162,6 +162,7 @@ struct riscv_ip_error static const char default_arch[] = DEFAULT_ARCH; static const char *default_arch_with_ext = DEFAULT_RISCV_ARCH_WITH_EXT; +static const char *file_arch_str = NULL; static enum riscv_spec_class default_isa_spec = ISA_SPEC_CLASS_NONE; static enum riscv_spec_class default_priv_spec = PRIV_SPEC_CLASS_NONE; @@ -305,15 +306,17 @@ static riscv_parse_subset_t riscv_rps_as = true, /* check_unknown_prefixed_ext. */ }; -/* Update the architecture string in the subset_list. */ +/* Update file/function-level architecture string according to the + subset_list. */ static void -riscv_reset_subsets_list_arch_str (void) +riscv_set_arch_str (const char **arch_str_p) { riscv_subset_list_t *subsets = riscv_rps_as.subset_list; - if (subsets->arch_str != NULL) - free ((void *) subsets->arch_str); - subsets->arch_str = riscv_arch_str (xlen, subsets); + const char *arch_str = *arch_str_p; + if (arch_str != NULL) + free ((void *) arch_str); + *arch_str_p = riscv_arch_str (xlen, subsets); } /* This structure is used to hold a stack of .option values. */ @@ -347,7 +350,8 @@ riscv_set_arch (const char *s) } riscv_release_subset_list (riscv_rps_as.subset_list); riscv_parse_subset (&riscv_rps_as, s); - riscv_reset_subsets_list_arch_str (); + riscv_set_arch_str (&file_arch_str); + riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str); riscv_set_rvc (false); if (riscv_subset_supports (&riscv_rps_as, "c") @@ -1622,6 +1626,9 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) case 'c': switch (*++oparg) { + /* sreg operators in cm.mvsa01 and cm.mva01s. */ + case '1': USE_BITS (OP_MASK_SREG1, OP_SH_SREG1); break; + case '2': USE_BITS (OP_MASK_SREG2, OP_SH_SREG2); break; /* byte immediate operators, load/store byte insns. */ case 'h': used_bits |= ENCODE_ZCB_HALFWORD_UIMM (-1U); break; /* halfword immediate operators, load/store halfword insns. */ @@ -1688,12 +1695,19 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) case '3': used_bits |= ENCODE_CV_IS3_UIMM5 (-1U); break; + case '5': + used_bits |= ENCODE_CV_SIMD_IMM6(-1U); + break; case '6': used_bits |= ENCODE_CV_BITMANIP_UIMM5(-1U); break; case '7': used_bits |= ENCODE_CV_BITMANIP_UIMM2(-1U); break; + case '8': + used_bits |= ENCODE_CV_SIMD_UIMM6(-1U); + ++oparg; + break; default: goto unknown_validate_operand; } @@ -3888,6 +3902,18 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr, asarg = expr_parse_end; imm_expr->X_op = O_absent; continue; + case '1': + if (!reg_lookup (&asarg, RCLASS_GPR, ®no) + || !RISCV_SREG_0_7 (regno)) + break; + INSERT_OPERAND (SREG1, *ip, regno % 8); + continue; + case '2': + if (!reg_lookup (&asarg, RCLASS_GPR, ®no) + || !RISCV_SREG_0_7 (regno)) + break; + INSERT_OPERAND (SREG2, *ip, regno % 8); + continue; default: goto unknown_riscv_ip_operand; } @@ -4002,6 +4028,16 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr, ip->insn_opcode |= ENCODE_CV_IS2_UIMM5 (imm_expr->X_add_number); continue; + case '5': + my_getExpression (imm_expr, asarg); + check_absolute_expr (ip, imm_expr, FALSE); + asarg = expr_parse_end; + if (imm_expr->X_add_number < -32 + || imm_expr->X_add_number > 31) + break; + ip->insn_opcode + |= ENCODE_CV_SIMD_IMM6 (imm_expr->X_add_number); + continue; case '6': my_getExpression (imm_expr, asarg); check_absolute_expr (ip, imm_expr, FALSE); @@ -4022,6 +4058,29 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr, ip->insn_opcode |= ENCODE_CV_BITMANIP_UIMM2 (imm_expr->X_add_number); continue; + case '8': + my_getExpression (imm_expr, asarg); + check_absolute_expr (ip, imm_expr, FALSE); + asarg = expr_parse_end; + ++oparg; + if (imm_expr->X_add_number < 0 + || imm_expr->X_add_number > 63) + break; + else if (*oparg == '1' + && imm_expr->X_add_number > 1) + break; + else if (*oparg == '2' + && imm_expr->X_add_number > 3) + break; + else if (*oparg == '3' + && imm_expr->X_add_number > 7) + break; + else if (*oparg == '4' + && imm_expr->X_add_number > 15) + break; + ip->insn_opcode + |= ENCODE_CV_SIMD_UIMM6 (imm_expr->X_add_number); + continue; default: goto unknown_riscv_ip_operand; } @@ -4837,13 +4896,13 @@ s_riscv_option (int x ATTRIBUTE_UNUSED) if (strcmp (name, "rvc") == 0) { riscv_update_subset (&riscv_rps_as, "+c"); - riscv_reset_subsets_list_arch_str (); + riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str); riscv_set_rvc (true); } else if (strcmp (name, "norvc") == 0) { riscv_update_subset (&riscv_rps_as, "-c"); - riscv_reset_subsets_list_arch_str (); + riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str); riscv_set_rvc (false); } else if (strcmp (name, "pic") == 0) @@ -4864,7 +4923,7 @@ s_riscv_option (int x ATTRIBUTE_UNUSED) if (ISSPACE (*name) && *name != '\0') name++; riscv_update_subset (&riscv_rps_as, name); - riscv_reset_subsets_list_arch_str (); + riscv_set_arch_str (&riscv_rps_as.subset_list->arch_str); riscv_set_rvc (false); if (riscv_subset_supports (&riscv_rps_as, "c") @@ -5019,40 +5078,37 @@ riscv_handle_align (fragS *fragP) switch (fragP->fr_type) { case rs_align_code: - /* When relaxing, riscv_frag_align_code handles code alignment. */ - if (!riscv_opts.relax) - { - bfd_signed_vma bytes = (fragP->fr_next->fr_address - - fragP->fr_address - fragP->fr_fix); - /* We have 4 byte uncompressed nops. */ - bfd_signed_vma size = 4; - bfd_signed_vma excess = bytes % size; - bfd_boolean odd_padding = (excess % 2 == 1); - char *p = fragP->fr_literal + fragP->fr_fix; - - if (bytes <= 0) - break; + { + bfd_signed_vma bytes = (fragP->fr_next->fr_address + - fragP->fr_address - fragP->fr_fix); + /* We have 4 byte uncompressed nops. */ + bfd_signed_vma size = 4; + bfd_signed_vma excess = bytes % size; + char *p = fragP->fr_literal + fragP->fr_fix; + + if (bytes <= 0) + break; - /* Insert zeros or compressed nops to get 4 byte alignment. */ - if (excess) - { - if (odd_padding) - riscv_add_odd_padding_symbol (fragP); - riscv_make_nops (p, excess); - fragP->fr_fix += excess; - p += excess; - } + /* Insert zeros or compressed nops to get 4 byte alignment. */ + if (excess) + { + if (excess % 2) + riscv_add_odd_padding_symbol (fragP); + riscv_make_nops (p, excess); + fragP->fr_fix += excess; + p += excess; + } - /* The frag will be changed to `rs_fill` later. The function - `write_contents` will try to fill the remaining spaces - according to the patterns we give. In this case, we give - a 4 byte uncompressed nop as the pattern, and set the size - of the pattern into `fr_var`. The nop will be output to the - file `fr_offset` times. However, `fr_offset` could be zero - if we don't need to pad the boundary finally. */ - riscv_make_nops (p, size); - fragP->fr_var = size; - } + /* The frag will be changed to `rs_fill` later. The function + `write_contents` will try to fill the remaining spaces + according to the patterns we give. In this case, we give + a 4 byte uncompressed nop as the pattern, and set the size + of the pattern into `fr_var`. The nop will be output to the + file `fr_offset` times. However, `fr_offset` could be zero + if we don't need to pad the boundary finally. */ + riscv_make_nops (p, size); + fragP->fr_var = size; + } break; default: @@ -5389,7 +5445,7 @@ s_riscv_insn (int x ATTRIBUTE_UNUSED) static void riscv_write_out_attrs (void) { - const char *arch_str, *priv_str, *p; + const char *priv_str, *p; /* versions[0]: major version. versions[1]: minor version. versions[2]: revision version. */ @@ -5397,10 +5453,10 @@ riscv_write_out_attrs (void) unsigned int i; /* Re-write architecture elf attribute. */ - arch_str = riscv_rps_as.subset_list->arch_str; - if (!bfd_elf_add_proc_attr_string (stdoutput, Tag_RISCV_arch, arch_str)) + if (!bfd_elf_add_proc_attr_string (stdoutput, Tag_RISCV_arch, file_arch_str)) as_fatal (_("error adding attribute: %s"), bfd_errmsg (bfd_get_error ())); + free ((void *) file_arch_str); /* For the file without any instruction, we don't set the default_priv_spec according to the privileged elf attributes since the md_assemble isn't diff --git a/gas/config/tc-score.c b/gas/config/tc-score.c index 116c7aa..707bd6f 100644 --- a/gas/config/tc-score.c +++ b/gas/config/tc-score.c @@ -6168,18 +6168,6 @@ s3_s_score_lcomm (int bytes_p) record_alignment (bss_seg, align); } - else - { - /* Assume some objects may require alignment on some systems. */ -#if defined (TC_ALPHA) && ! defined (VMS) - if (temp > 1) - { - align = ffs (temp) - 1; - if (temp % (1 << align)) - abort (); - } -#endif - } *p = 0; symbolP = symbol_find_or_make (name); diff --git a/gas/config/tc-score7.c b/gas/config/tc-score7.c index 52cb871..e6d98df 100644 --- a/gas/config/tc-score7.c +++ b/gas/config/tc-score7.c @@ -6014,18 +6014,6 @@ s7_s_score_lcomm (int bytes_p) record_alignment (bss_seg, align); } - else - { - /* Assume some objects may require alignment on some systems. */ -#if defined (TC_ALPHA) && ! defined (VMS) - if (temp > 1) - { - align = ffs (temp) - 1; - if (temp % (1 << align)) - abort (); - } -#endif - } *p = 0; symbolP = symbol_find_or_make (name); diff --git a/gas/config/tc-sparc.c b/gas/config/tc-sparc.c index aca60e6..e37189e 100644 --- a/gas/config/tc-sparc.c +++ b/gas/config/tc-sparc.c @@ -2593,13 +2593,6 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn) break; } /* if not an 'f' register. */ - if (*args == '}' && mask != RS2 (opcode)) - { - error_message - = _(": Instruction requires frs2 and frsd must be the same register"); - goto error; - } - switch (*args) { case 'v': @@ -2628,10 +2621,18 @@ sparc_ip (char *str, const struct sparc_opcode **pinsn) case 'g': case 'H': case 'J': - case '}': case '^': opcode |= RD (mask); continue; + + case '}': + if (RD (mask) != (opcode & RD (0x1f))) + { + error_message = _(": Instruction requires frs2 and " + "frsd must be the same register"); + goto error; + } + continue; } /* Pack it in. */ know (0); diff --git a/gas/config/tc-vax.c b/gas/config/tc-vax.c index 08d5dfc..cab1264 100644 --- a/gas/config/tc-vax.c +++ b/gas/config/tc-vax.c @@ -1021,10 +1021,6 @@ vax_reg_parse (char c1, char c2, char c3, char c4) c2 = c3; c3 = c4; #endif -#ifdef OBJ_VMS - if (c4 != 0) /* Register prefixes are not allowed under VMS. */ - return retval; -#endif #ifdef OBJ_AOUT if (c1 == '%') /* Register prefixes are optional under a.out. */ { @@ -2193,18 +2189,15 @@ md_create_long_jump (char *ptr, md_number_to_chars (ptr, offset, 4); } -#ifdef OBJ_VMS -const char *md_shortopts = "d:STt:V+1h:Hv::"; -#elif defined(OBJ_ELF) -const char *md_shortopts = "d:STt:VkKQ:"; +#ifdef OBJ_ELF +const char *md_shortopts = "d:STt:VkQ:"; #else const char *md_shortopts = "d:STt:V"; #endif struct option md_longopts[] = { #ifdef OBJ_ELF -#define OPTION_PIC (OPTION_MD_BASE) - { "pic", no_argument, NULL, OPTION_PIC }, + { "pic", no_argument, NULL, 'k' }, #endif { NULL, no_argument, NULL, 0 } }; @@ -2235,40 +2228,7 @@ md_parse_option (int c, const char *arg) as_warn (_("I don't use an interpass file! -V ignored")); break; -#ifdef OBJ_VMS - case '+': /* For g++. Hash any name > 31 chars long. */ - flag_hash_long_names = 1; - break; - - case '1': /* For backward compatibility. */ - flag_one = 1; - break; - - case 'H': /* Show new symbol after hash truncation. */ - flag_show_after_trunc = 1; - break; - - case 'h': /* No hashing of mixed-case names. */ - { - extern char vms_name_mapping; - vms_name_mapping = atoi (arg); - flag_no_hash_mixed_case = 1; - } - break; - - case 'v': - { - extern char *compiler_version_string; - - if (!arg || !*arg || access (arg, 0) == 0) - return 0; /* Have caller show the assembler version. */ - compiler_version_string = arg; - } - break; -#endif - #ifdef OBJ_ELF - case OPTION_PIC: case 'k': flag_want_pic = 1; break; /* -pic, Position Independent Code. */ @@ -2297,15 +2257,11 @@ VAX options:\n\ -t FILE ignored\n\ -T ignored\n\ -V ignored\n")); -#ifdef OBJ_VMS +#ifdef OBJ_ELF fprintf (stream, _("\ -VMS options:\n\ --+ hash encode names longer than 31 characters\n\ --1 `const' handling compatible with gcc 1.x\n\ --H show new symbol after hash truncation\n\ --h NUM don't hash mixed-case names, and adjust case:\n\ - 0 = upper, 2 = lower, 3 = preserve case\n\ --v\"VERSION\" code being assembled was produced by compiler \"VERSION\"\n")); +ELF options:\n\ +-k -pic enable PIC mode\n\ +-Q[y|n] ignored\n")); #endif } diff --git a/gas/config/tc-vax.h b/gas/config/tc-vax.h index 1708e10..1799a1d 100644 --- a/gas/config/tc-vax.h +++ b/gas/config/tc-vax.h @@ -31,10 +31,6 @@ #endif #endif -#ifdef OBJ_VMS -#define TARGET_FORMAT "vms-vax" -#endif - #ifdef OBJ_ELF #define TARGET_FORMAT "elf32-vax" #endif diff --git a/gas/config/te-interix.h b/gas/config/te-interix.h index a1f1c53..00290d3 100644 --- a/gas/config/te-interix.h +++ b/gas/config/te-interix.h @@ -19,8 +19,8 @@ #define TE_PE_DYN /* PE with dynamic linking (UNIX shared lib) support */ #define TE_PE -#define LEX_AT 1 /* can have @'s inside labels */ -#define LEX_QM 3 /* can have ?'s in or begin labels */ +#define LEX_AT LEX_NAME /* can have @'s inside labels */ +#define LEX_QM (LEX_BEGIN_NAME | LEX_NAME) /* can have ?'s in or begin labels */ /* The PE format supports long section names. */ #define COFF_LONG_SECTION_NAMES diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi index 36ba825..a9e4356 100644 --- a/gas/doc/c-i386.texi +++ b/gas/doc/c-i386.texi @@ -219,6 +219,10 @@ accept various extension mnemonics. For example, @code{avx10.1/128}, @code{user_msr}, @code{apx_f}, +@code{avx10.2}, +@code{avx10.2/512}, +@code{avx10.2/256}, +@code{avx10.2/128}, @code{amx_int8}, @code{amx_bf16}, @code{amx_fp16}, @@ -1679,7 +1683,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are: @item @samp{.cmpccxadd} @tab @samp{.wrmsrns} @tab @samp{.msrlist} @item @samp{.avx_ne_convert} @tab @samp{.rao_int} @tab @samp{.fred} @tab @samp{.lkgs} @item @samp{.avx_vnni_int16} @tab @samp{.sha512} @tab @samp{.sm3} @tab @samp{.sm4} -@item @samp{.pbndkb} @tab @samp{.user_msr} +@item @samp{.pbndkb} @tab @samp{.user_msr} @tab @samp{.avx10.2} @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote} @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq} @item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk} diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index cec7457..5614e76 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -178,7 +178,12 @@ instead of just It's not expected that options are changed in this manner during regular use, but there are a handful of esoteric cases like the one above where users need to disable particular features of the assembler for particular code sequences. -The complete list of option arguments is shown below: +However, it's also useful to enable/disable the extensions for some specific +code regions by @samp{.option arch, +-}. This is very common in the ifunc +libraries. We can support functions which are implemented by different +extensions in the same library, but these should not affect any file-level +settings, like the elf architecture attribute. The complete list of option +arguments is shown below: @table @code @item push @@ -770,6 +775,11 @@ The XCvMem extension provides instructions for post inc load/store operations. It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html} +@item XcvSimd +The XcvSimd extension provides instructions for SIMD operations. + +It is documented in @url{https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html} + @item XTheadBa The XTheadBa extension provides instructions for address calculations. diff --git a/gas/doc/c-s390.texi b/gas/doc/c-s390.texi index f73dfde..cd0dc7b 100644 --- a/gas/doc/c-s390.texi +++ b/gas/doc/c-s390.texi @@ -300,10 +300,11 @@ field. The notation changes as follows: @display @multitable @columnfractions 0.30 0.30 @headitem full notation @tab short notation -@item Dn(0,Bn) @tab Dn(Bn) +@item Dn(Xn,0) @tab Dn(Xn,) +@item Dn(0,Bn) @tab Dn(,Bn) or Dn(Bn) @item Dn(0,0) @tab Dn @item Dn(0) @tab Dn -@item Dn(Ln,0) @tab Dn(Ln) +@item Dn(Ln,0) @tab Dn(Ln,) or Dn(Ln) @end multitable @end display diff --git a/gas/listing.c b/gas/listing.c index 4309063..ef17980 100644 --- a/gas/listing.c +++ b/gas/listing.c @@ -176,13 +176,16 @@ struct list_info_struct /* Pointers to linked list of messages associated with this line. */ struct list_message *messages, *last_message; - enum edict_enum edict; - char *edict_arg; - +#ifdef OBJ_ELF /* Nonzero if this line is to be omitted because it contains debugging information. This can become a flags field if we come up with more information to store here. */ - int debugging; + bool debugging; +#endif + + enum edict_enum edict; + char *edict_arg; + }; typedef struct list_info_struct list_info_type; @@ -226,7 +229,6 @@ static unsigned int calc_hex (list_info_type *); static void print_lines (list_info_type *, unsigned int, const char *, unsigned int); static void list_symbol_table (void); -static int debugging_pseudo (list_info_type *, const char *); static void listing_listing (char *); static void @@ -311,7 +313,8 @@ listing_newline (char *ps) considered to be debugging information. This includes the statement which switches us into the debugging section, which we can only set after we are already in the debugging section. */ - if ((listing & LISTING_NODEBUG) != 0 + if (IS_ELF + && (listing & LISTING_NODEBUG) != 0 && listing_tail != NULL && ! listing_tail->debugging) { @@ -320,7 +323,7 @@ listing_newline (char *ps) segname = segment_name (now_seg); if (startswith (segname, ".debug") || startswith (segname, ".line")) - listing_tail->debugging = 1; + listing_tail->debugging = true; } #endif @@ -421,13 +424,13 @@ listing_newline (char *ps) new_i->edict = EDICT_NONE; new_i->hll_file = (file_info_type *) NULL; new_i->hll_line = 0; - new_i->debugging = 0; new_frag (); #ifdef OBJ_ELF /* In ELF, anything in a section beginning with .debug or .line is considered to be debugging information. */ + new_i->debugging = false; if ((listing & LISTING_NODEBUG) != 0) { const char *segname; @@ -435,7 +438,7 @@ listing_newline (char *ps) segname = segment_name (now_seg); if (startswith (segname, ".debug") || startswith (segname, ".line")) - new_i->debugging = 1; + new_i->debugging = true; } #endif } @@ -1120,24 +1123,20 @@ print_source (file_info_type * current_file, /* Sometimes the user doesn't want to be bothered by the debugging records inserted by the compiler, see if the line is suspicious. */ -static int -debugging_pseudo (list_info_type *list, const char *line) +static bool +debugging_pseudo (list_info_type *list ATTRIBUTE_UNUSED, const char *line) { #ifdef OBJ_ELF - static int in_debug; - int was_debug; -#endif + static bool in_debug; + bool was_debug; if (list->debugging) { -#ifdef OBJ_ELF - in_debug = 1; -#endif - return 1; + in_debug = true; + return true; } -#ifdef OBJ_ELF was_debug = in_debug; - in_debug = 0; + in_debug = false; #endif while (ISSPACE (*line)) @@ -1156,42 +1155,42 @@ debugging_pseudo (list_info_type *list, const char *line) && list->next != NULL && list->next->debugging) { - in_debug = 1; - return 1; + in_debug = true; + return true; } #endif - return 0; + return false; } line++; if (startswith (line, "def")) - return 1; + return true; if (startswith (line, "val")) - return 1; + return true; if (startswith (line, "scl")) - return 1; + return true; if (startswith (line, "line")) - return 1; + return true; if (startswith (line, "endef")) - return 1; + return true; if (startswith (line, "ln")) - return 1; + return true; if (startswith (line, "type")) - return 1; + return true; if (startswith (line, "size")) - return 1; + return true; if (startswith (line, "dim")) - return 1; + return true; if (startswith (line, "tag")) - return 1; + return true; if (startswith (line, "stabs")) - return 1; + return true; if (startswith (line, "stabn")) - return 1; + return true; - return 0; + return false; } static void diff --git a/gas/macro.c b/gas/macro.c index a35e135..8b376f7 100644 --- a/gas/macro.c +++ b/gas/macro.c @@ -220,6 +220,11 @@ buffer_and_nest (const char *from, const char *to, sb *ptr, { /* Reset the string to not include the ending rune. */ ptr->len = line_start; + + /* With the ending directive consumed here, announce the + line for macro-expanded listings. */ + if (listing & LISTING_MACEXP) + listing_newline (NULL); break; } } @@ -1389,6 +1394,7 @@ expand_irp (int irpc, size_t idx, sb *in, sb *out, size_t (*get_line) (sb *)) if (idx >= in->len) break; } + continue; } sb_reset (&f.actual); sb_add_char (&f.actual, in->ptr[idx]); @@ -285,7 +285,8 @@ read_begin (void) /* Use more. FIXME-SOMEDAY. */ if (flag_mri) - lex_type['?'] = 3; + lex_type['?'] = LEX_BEGIN_NAME | LEX_NAME; + stabs_begin (); #ifndef WORKING_DOT_WORD @@ -2849,6 +2850,7 @@ s_mri (int ignore ATTRIBUTE_UNUSED) #ifdef TC_M68K flag_m68k_mri = 1; #endif + lex_type['?'] = LEX_BEGIN_NAME | LEX_NAME; } else { @@ -2856,6 +2858,7 @@ s_mri (int ignore ATTRIBUTE_UNUSED) #ifdef TC_M68K flag_m68k_mri = 0; #endif + lex_type['?'] = LEX_QM; } /* Operator precedence changes in m68k MRI mode, so we need to diff --git a/gas/testsuite/gas/aarch64/advsimd-lut-bad.l b/gas/testsuite/gas/aarch64/advsimd-lut-bad.l index 3afe4a3..800f44c 100644 --- a/gas/testsuite/gas/aarch64/advsimd-lut-bad.l +++ b/gas/testsuite/gas/aarch64/advsimd-lut-bad.l @@ -1,25 +1,25 @@ [^ :]+: Assembler messages: -.*: Error: selected processor does not support `luti2 v0.16b,{v0.16b},v0\[0\]' -.*: Error: selected processor does not support `luti2 v31.16b,{v0.16b},v0\[0\]' -.*: Error: selected processor does not support `luti2 v0.16b,{v31.16b},v0\[0\]' -.*: Error: selected processor does not support `luti2 v0.16b,{v0.16b},v31\[0\]' -.*: Error: selected processor does not support `luti2 v0.16b,{v0.16b},v31\[3\]' -.*: Error: selected processor does not support `luti2 v17.16b,{v21.16b},v27\[2\]' -.*: Error: selected processor does not support `luti2 v0.8h,{v0.8h},v0\[0\]' -.*: Error: selected processor does not support `luti2 v31.8h,{v0.8h},v0\[0\]' -.*: Error: selected processor does not support `luti2 v0.8h,{v31.8h},v0\[0\]' -.*: Error: selected processor does not support `luti2 v0.8h,{v0.8h},v31\[0\]' -.*: Error: selected processor does not support `luti2 v0.8h,{v0.8h},v0\[7\]' -.*: Error: selected processor does not support `luti2 v17.8h,{v21.8h},v27\[4\]' -.*: Error: selected processor does not support `luti4 v0.16b,{v0.16b},v0\[0\]' -.*: Error: selected processor does not support `luti4 v31.16b,{v0.16b},v0\[0\]' -.*: Error: selected processor does not support `luti4 v0.16b,{v31.16b},v0\[0\]' -.*: Error: selected processor does not support `luti4 v0.16b,{v0.16b},v31\[0\]' -.*: Error: selected processor does not support `luti4 v0.16b,{v0.16b},v0\[1\]' -.*: Error: selected processor does not support `luti4 v17.16b,{v21.16b},v27\[1\]' -.*: Error: selected processor does not support `luti4 v0.8h,{v0.8h,v1.8h},v0\[0\]' -.*: Error: selected processor does not support `luti4 v31.8h,{v0.8h,v1.8h},v0\[0\]' -.*: Error: selected processor does not support `luti4 v0.8h,{v31.8h,v0.8h},v0\[0\]' -.*: Error: selected processor does not support `luti4 v0.8h,{v0.8h,v1.8h},v31\[0\]' -.*: Error: selected processor does not support `luti4 v0.8h,{v0.8h,v1.8h},v0\[3\]' -.*: Error: selected processor does not support `luti4 v17.8h,{v21.8h,v22.8h},v27\[2\]' +.*: Error: selected processor does not support `luti2 v0.16b,{ ?v0.16b ?},v0\[0\]' +.*: Error: selected processor does not support `luti2 v31.16b,{ ?v0.16b ?},v0\[0\]' +.*: Error: selected processor does not support `luti2 v0.16b,{ ?v31.16b ?},v0\[0\]' +.*: Error: selected processor does not support `luti2 v0.16b,{ ?v0.16b ?},v31\[0\]' +.*: Error: selected processor does not support `luti2 v0.16b,{ ?v0.16b ?},v31\[3\]' +.*: Error: selected processor does not support `luti2 v17.16b,{ ?v21.16b ?},v27\[2\]' +.*: Error: selected processor does not support `luti2 v0.8h,{ ?v0.8h ?},v0\[0\]' +.*: Error: selected processor does not support `luti2 v31.8h,{ ?v0.8h ?},v0\[0\]' +.*: Error: selected processor does not support `luti2 v0.8h,{ ?v31.8h ?},v0\[0\]' +.*: Error: selected processor does not support `luti2 v0.8h,{ ?v0.8h ?},v31\[0\]' +.*: Error: selected processor does not support `luti2 v0.8h,{ ?v0.8h ?},v0\[7\]' +.*: Error: selected processor does not support `luti2 v17.8h,{ ?v21.8h ?},v27\[4\]' +.*: Error: selected processor does not support `luti4 v0.16b,{ ?v0.16b ?},v0\[0\]' +.*: Error: selected processor does not support `luti4 v31.16b,{ ?v0.16b ?},v0\[0\]' +.*: Error: selected processor does not support `luti4 v0.16b,{ ?v31.16b ?},v0\[0\]' +.*: Error: selected processor does not support `luti4 v0.16b,{ ?v0.16b ?},v31\[0\]' +.*: Error: selected processor does not support `luti4 v0.16b,{ ?v0.16b ?},v0\[1\]' +.*: Error: selected processor does not support `luti4 v17.16b,{ ?v21.16b ?},v27\[1\]' +.*: Error: selected processor does not support `luti4 v0.8h,{ ?v0.8h,v1.8h ?},v0\[0\]' +.*: Error: selected processor does not support `luti4 v31.8h,{ ?v0.8h,v1.8h ?},v0\[0\]' +.*: Error: selected processor does not support `luti4 v0.8h,{ ?v31.8h,v0.8h ?},v0\[0\]' +.*: Error: selected processor does not support `luti4 v0.8h,{ ?v0.8h,v1.8h ?},v31\[0\]' +.*: Error: selected processor does not support `luti4 v0.8h,{ ?v0.8h,v1.8h ?},v0\[3\]' +.*: Error: selected processor does not support `luti4 v17.8h,{ ?v21.8h,v22.8h ?},v27\[2\]' diff --git a/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l b/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l index 86f6a7d..53a2915 100644 --- a/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l +++ b/gas/testsuite/gas/aarch64/advsimd-lut-illegal.l @@ -1,208 +1,208 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.16b,\{v4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.16b,\{ ?v4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 v2.16b, \{v4.16b\}, v8\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8h,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8h,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 v2.16b, \{v4.16b\}, v8\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.16b,\{v4.8h\},v8\[5\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.16b,\{ ?v4.8h ?\},v8\[5\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 v2.16b, \{v4.16b\}, v8\[5\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8h,\{v4.16b\},v8\[5\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8h,\{ ?v4.16b ?\},v8\[5\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 v2.16b, \{v4.16b\}, v8\[5\] [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti2 v2.16b,v4.16b,v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{x12\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{ ?x12 ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},x12\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},x12\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti2 v2.8h,v4.8h,v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{v4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti2 x12,\{ ?v4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{x12\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{ ?x12 ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},x12\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},x12\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti4 v2.16b,v4.16b,v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{x12\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{ ?x12 ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},x12\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},x12\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `luti4 v2.8h,v4.8h,v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{v4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 x12,\{ ?v4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.8h,\{x12\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.8h,\{ ?x12 ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h\},x12\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h ?\},x12\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{v4.8h,x12\},v8\[1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8b,\{v4.8b\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{ ?v4.8h,x12 ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.8b,\{ ?v4.8b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 v2.16b, \{v4.16b\}, v8\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.4h,\{v4.4h\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 v2.4h,\{ ?v4.4h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 v2.16b, \{v4.16b\}, v8\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8b,\{v4.8b\},v8\[5\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.8b,\{ ?v4.8b ?\},v8\[5\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 v2.16b, \{v4.16b\}, v8\[5\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.4h,\{v4.4h,v5.4h\},v8\[5\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 v2.4h,\{ ?v4.4h,v5.4h ?\},v8\[5\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 v2.16b, \{v4.16b-v5.16b\}, v8\[5\] [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 v2.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.16b,\{v4.16b\}' +[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.16b,\{ ?v4.16b ?\}' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[1\],v16.16b' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[1\],v16.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[1\],\{v16.16b\}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[1\],\{ ?v16.16b ?\}' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 v2.8h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.8h,\{v4.8h\}' +[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti2 v2.8h,\{ ?v4.8h ?\}' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[1\],v16.8h' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[1\],v16.8h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[1\],\{v16.8h\}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[1\],\{ ?v16.8h ?\}' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 v2.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.16b,\{v4.16b\}' +[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.16b,\{ ?v4.16b ?\}' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[1\],v16.16b' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[1\],v16.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[1\],\{v16.16b\}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[1\],\{ ?v16.16b ?\}' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 v2.8h' -[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.8h,\{v4.8h,v5.8h\}' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[1\],v16.8h' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[1\],\{v16.8h\}' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 v2.16b,\{v4.16t\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected element type rather than vector type at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\],v16.8h' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\],\{ ?v16.8h ?\}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 v2.16b,\{ ?v4.16t ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 v2.16t,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 v2.16t,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 2 -- `luti2 v2.8h,\{v4.8m\},v8\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 2 -- `luti2 v2.8h,\{ ?v4.8m ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 1 -- `luti2 v2.8m,\{v4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `m' in element size at operand 1 -- `luti2 v2.8m,\{ ?v4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.16b,\{v4.16t\},v8\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.16b,\{ ?v4.16t ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.16t,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.16t,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.8h,\{v4.8h,v5.8t\},v8\[1\]' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.8t,\{v4.8h,v5.8h\},v8\[1\]' -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.16b,\{v4\},v8\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v5.8t ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 v2.8t,\{ ?v4.8h,v5.8h ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.16b,\{ ?v4 ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.16b,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.16b,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.16b,\{4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.16b,\{ ?4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.8h,\{v4\},v8\[1\]' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti2 v2.8h,\{ ?v4 ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{v4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti2 v2,\{ ?v4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.8h,\{v4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 2.8h,\{ ?v4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.8h,\{4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 v2.8h,\{ ?4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{v4\},v8\[1\]' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{ ?v4 ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{ ?4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{v4,v5.16b\},v8\[1\]' -[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{v4.16b,v5.16b\},v8\[1\]' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{v4.16b,v5.16b\},v8\[1\]' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{v4.16b,5.16b\},v8\[1\]' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.16b,\{v21.16b\},v27.16b\[3\]' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.8h,\{v21.8h\},v27.8h\[4\]' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.16b,\{v21.16b\},v27.16b\[1\]' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.8h,\{v21.8h,v22.8h\},v27.8h\[2\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.16b\[1\],\{v0.16b\},v31.16b' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 2 -- `luti4 v2.16b,\{ ?v4,v5.16b ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: invalid use of vector register at operand 1 -- `luti4 v2,\{ ?v4.16b,v5.16b ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 2.16b,\{ ?v4.16b,v5.16b ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 v2.16b,\{ ?v4.16b,5.16b ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.16b,\{ ?v21.16b ?\},v27.16b\[3\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v17.8h,\{ ?v21.8h ?\},v27.8h\[4\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.16b,\{ ?v21.16b ?\},v27.16b\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v17.8h,\{ ?v21.8h,v22.8h ?\},v27.8h\[2\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.16b\[1\],\{ ?v0.16b ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{v0.16b\},v31.16b' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{ ?v0.16b ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.16b,\{v0.16b\[1\]\},v31.16b' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.16b,\{ ?v0.16b\[1\] ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.16b,\{v0\[1\]\},v31.16b' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.16b,\{ ?v0\[1\] ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.8h\[1\],\{v0.8h\},v31.8h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti2 v17.8h\[1\],\{ ?v0.8h ?\},v31.8h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{v0.8h\},v31.8h' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti2 v17\[1\],\{ ?v0.8h ?\},v31.8h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.8h,\{v0.8h\[1\]\},v31.8h' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 v17.8h,\{ ?v0.8h\[1\] ?\},v31.8h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.8h,\{v0\[1\]\},v31.8h' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti2 v17.8h,\{ ?v0\[1\] ?\},v31.8h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.16b\[1\],\{v0.16b\},v31.16b' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.16b\[1\],\{ ?v0.16b ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{v0.16b\},v31.16b' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{ ?v0.16b ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.16b,\{v0.16b\[1\]\},v31.16b' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.16b,\{ ?v0.16b\[1\] ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.16b,\{v0\[1\]\},v31.16b' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.16b,\{ ?v0\[1\] ?\},v31.16b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.8h\[1\],\{v0.8h,v1.8h\},v31.8h' -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{v0.8h,v1.8h\},v31.8h' -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.8h,\{v0.8h\[1\],v1.8h\},v31.8h' -[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.8h,\{v0\[1\],v1.8h\},v31.8h' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},v8.16b' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},v8' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},v8.8h' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},v8' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},v8.16b' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},v8' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8.8h' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.16b,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 v17.8h\[1\],\{ ?v0.8h,v1.8h ?\},v31.8h' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 1 -- `luti4 v17\[1\],\{ ?v0.8h,v1.8h ?\},v31.8h' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 v17.8h,\{ ?v0.8h\[1\],v1.8h ?\},v31.8h' +[^ :]+:[0-9]+: Error: this type of register can't be indexed at operand 2 -- `luti4 v17.8h,\{ ?v0\[1\],v1.8h ?\},v31.8h' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v8.16b' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v8' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v8.8h' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v8' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v8.16b' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v8' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8.8h' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.16b,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{v32.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.16b,\{ ?v32.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{v4.16b\},v32\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.16b,\{ ?v4.16b ?\},v32\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[4\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[4\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{v4.16b\},v8\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 v2.16b,\{ ?v4.16b ?\},v8\[-1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.8h,\{v4.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 v32.8h,\{ ?v4.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{v32.8h\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti2 v2.8h,\{ ?v32.8h ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{v4.8h\},v32\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti2 v2.8h,\{ ?v4.8h ?\},v32\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[8\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[8\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{v4.8h\},v8\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 v2.8h,\{ ?v4.8h ?\},v8\[-1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.16b,\{v4.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.16b,\{ ?v4.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{v32.16b\},v8\[1\]' +[^ :]+:[0-9]+: Error: expected an Advanced SIMD vector register at operand 2 -- `luti4 v2.16b,\{ ?v32.16b ?\},v8\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{v4.16b\},v32\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.16b,\{ ?v4.16b ?\},v32\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[2\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[2\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{v4.16b\},v8\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 v2.16b,\{ ?v4.16b ?\},v8\[-1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.8h,\{v4.8h,v5.8h\},v8\[1\]' -[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{v31.8h,v32.8h\},v8\[1\]' -[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{v4.8h,v5.8h\},v32\[1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[4\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{v4.8h,v5.8h\},v8\[-1\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 v2.8h,\{v4.8h,v6.8h\},v8\[2\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.16b,\{v21.16b,v22.16b\},v27\[2\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.8h,\{v21.8h,v22.8h\},v27\[4\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 v17.16b,\{v21.16b,v22.16b\},v27\[1\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `luti4 v17.8h,\{v21.8h\},v27\[2\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 v32.8h,\{ ?v4.8h,v5.8h ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand 2 must be a SIMD vector register list -- `luti4 v2.8h,\{ ?v31.8h,v32.8h ?\},v8\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be a SIMD vector without a type qualifier encoding a bit index -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v32\[1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[4\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 v2.8h,\{ ?v4.8h,v5.8h ?\},v8\[-1\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 v2.8h,\{ ?v4.8h,v6.8h ?\},v8\[2\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.16b,\{ ?v21.16b,v22.16b ?\},v27\[2\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 v17.8h,\{ ?v21.8h,v22.8h ?\},v27\[4\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 v17.16b,\{ ?v21.16b,v22.16b ?\},v27\[1\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `luti4 v17.8h,\{ ?v21.8h ?\},v27\[2\]' diff --git a/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l b/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l index 5da96c7..ae949cf 100644 --- a/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l +++ b/gas/testsuite/gas/aarch64/bfloat16-2-invalid.l @@ -166,7 +166,7 @@ .*: Info: did you mean this\? .*: Info: bfadd z31.h, z31.h, z31.h .*: Error: expected an SVE vector register at operand 1 -- `bfadd {z0.h},z0.h,z0.h' -.*: Error: expected an SVE vector register at operand 1 -- `bfadd {z0.h-z0.h},z0.h' +.*: Error: expected an SVE vector register at operand 1 -- `bfadd {z0.h ?- ?z0.h},z0.h' .*: Error: comma expected between operands at operand 3 -- `bfadd z0.h,z0.h' .*: Error: operand mismatch -- `bfclamp z0.b,z0.h,z0.h' .*: Info: did you mean this\? @@ -184,7 +184,7 @@ .*: Info: did you mean this\? .*: Info: bfclamp z31.h, z31.h, z31.h .*: Error: expected an SVE vector register at operand 1 -- `bfclamp {z0.h},z0.h,z0.h' -.*: Error: expected an SVE vector register at operand 1 -- `bfclamp {z0.h-z0.h},z0.h' +.*: Error: expected an SVE vector register at operand 1 -- `bfclamp {z0.h ?- ?z0.h},z0.h' .*: Error: comma expected between operands at operand 3 -- `bfclamp z0.h,z0.h' .*: Error: operand mismatch -- `bfmla z0.b,z0.h,z0.h\[0\]' .*: Info: did you mean this\? @@ -202,7 +202,7 @@ .*: Info: did you mean this\? .*: Info: bfmla z31.h, z31.h, z31.h\[8\] .*: Error: expected an SVE vector register at operand 1 -- `bfmla {z0.h},z0.h,z0.h\[1\]' -.*: Error: expected an SVE vector register at operand 1 -- `bfmla {z0.h-z0.h},z0.h\[2\]' +.*: Error: expected an SVE vector register at operand 1 -- `bfmla {z0.h ?- ?z0.h},z0.h\[2\]' .*: Error: expected an SVE predicate register at operand 2 -- `bfmla z0.h,z0.h\[3\]' .*: Error: operand mismatch -- `bfmls z0.b,z0.h,z0.h\[0\]' .*: Info: did you mean this\? @@ -220,7 +220,7 @@ .*: Info: did you mean this\? .*: Info: bfmls z31.h, z31.h, z31.h\[8\] .*: Error: expected an SVE vector register at operand 1 -- `bfmls {z0.h},z0.h,z0.h\[1\]' -.*: Error: expected an SVE vector register at operand 1 -- `bfmls {z0.h-z0.h},z0.h\[2\]' +.*: Error: expected an SVE vector register at operand 1 -- `bfmls {z0.h ?- ?z0.h},z0.h\[2\]' .*: Error: expected an SVE predicate register at operand 2 -- `bfmls z0.h,z0.h\[3\]' .*: Error: operand mismatch -- `bfmul z0.b,z0.h,z0.h\[0\]' .*: Info: did you mean this\? @@ -238,7 +238,7 @@ .*: Info: did you mean this\? .*: Info: bfmul z31.h, z31.h, z31.h\[8\] .*: Error: expected an SVE vector register at operand 1 -- `bfmul {z0.h},z0.h,z0.h\[1\]' -.*: Error: expected an SVE vector register at operand 1 -- `bfmul {z0.h-z0.h},z0.h\[2\]' +.*: Error: expected an SVE vector register at operand 1 -- `bfmul {z0.h ?- ?z0.h},z0.h\[2\]' .*: Error: expected an SVE predicate register at operand 2 -- `bfmul z0.h,z0.h\[3\]' .*: Error: operand mismatch -- `bfsub z0.b,z0.h,z0.h' .*: Info: did you mean this\? @@ -256,7 +256,7 @@ .*: Info: did you mean this\? .*: Info: bfsub z31.h, z31.h, z31.h .*: Error: expected an SVE vector register at operand 1 -- `bfsub {z0.h},z0.h,z0.h' -.*: Error: expected an SVE vector register at operand 1 -- `bfsub {z0.h-z0.h},z0.h' +.*: Error: expected an SVE vector register at operand 1 -- `bfsub {z0.h ?- ?z0.h},z0.h' .*: Error: comma expected between operands at operand 3 -- `bfsub z0.h,z0.h' .*: Warning: output register of preceding `movprfx' expected as output at operand 1 -- `bfclamp z1.h,z3.h,z16.h' .*: Warning: output register of preceding `movprfx' not used in current instruction at operand 1 -- `bfmla z10.h,z16.h,z3.h\[7\]' diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-bad.l b/gas/testsuite/gas/aarch64/cpa-addsub-bad.l index c0c671b..bbce0a7 100644 --- a/gas/testsuite/gas/aarch64/cpa-addsub-bad.l +++ b/gas/testsuite/gas/aarch64/cpa-addsub-bad.l @@ -2,18 +2,18 @@ .*: Error: operand mismatch -- `addpt w5,w8,w0' .*: Info:\s+did you mean this\? .*: Info:\s+addpt x5, x8, x0 -.*: Error: only 'LSL' shift is permitted at operand 3 -- `addpt x5,x8,x0,asr#6' -.*: Error: shift amount out of range 0 to 7 at operand 3 -- `addpt x5,x8,x0,lsl#9' -.*: Error: expected an integer or zero register at operand 3 -- `addpt x5,x8,sp,lsl#5' -.*: Error: unexpected register type at operand 1 -- `addpt xzr,x8,x0,lsl#3' +.*: Error: only 'LSL' shift is permitted at operand 3 -- `addpt x5,x8,x0,asr ?#6' +.*: Error: shift amount out of range 0 to 7 at operand 3 -- `addpt x5,x8,x0,lsl ?#9' +.*: Error: expected an integer or zero register at operand 3 -- `addpt x5,x8,sp,lsl ?#5' +.*: Error: unexpected register type at operand 1 -- `addpt xzr,x8,x0,lsl ?#3' .*: Error: operand mismatch -- `subpt w5,w8,w0' .*: Info:\s+did you mean this\? .*: Info:\s+subpt x5, x8, x0 -.*: Error: only 'LSL' shift is permitted at operand 3 -- `subpt x5,x8,x0,asr#6' -.*: Error: shift amount out of range 0 to 7 at operand 3 -- `subpt x5,x8,x0,lsl#9' -.*: Error: expected an integer or zero register at operand 3 -- `subpt x5,x8,sp,lsl#5' -.*: Error: unexpected register type at operand 1 -- `subpt xzr,x8,x0,lsl#3' +.*: Error: only 'LSL' shift is permitted at operand 3 -- `subpt x5,x8,x0,asr ?#6' +.*: Error: shift amount out of range 0 to 7 at operand 3 -- `subpt x5,x8,x0,lsl ?#9' +.*: Error: expected an integer or zero register at operand 3 -- `subpt x5,x8,sp,lsl ?#5' +.*: Error: unexpected register type at operand 1 -- `subpt xzr,x8,x0,lsl ?#3' .*: Error: operand mismatch -- `maddpt w1,x2,x3,x4' .*: Info:\s+did you mean this\? diff --git a/gas/testsuite/gas/aarch64/cpa-addsub-neg.l b/gas/testsuite/gas/aarch64/cpa-addsub-neg.l index 44a7236..79ce81d 100644 --- a/gas/testsuite/gas/aarch64/cpa-addsub-neg.l +++ b/gas/testsuite/gas/aarch64/cpa-addsub-neg.l @@ -3,16 +3,16 @@ .*: Error: selected processor does not support `addpt sp,x0,x0' .*: Error: selected processor does not support `addpt x0,sp,x0' .*: Error: selected processor does not support `addpt x0,x0,xzr' -.*: Error: selected processor does not support `addpt x0,x0,x0,lsl#0' -.*: Error: selected processor does not support `addpt x0,x0,x0,lsl#7' -.*: Error: selected processor does not support `addpt x8,x13,x29,lsl#5' +.*: Error: selected processor does not support `addpt x0,x0,x0,lsl ?#0' +.*: Error: selected processor does not support `addpt x0,x0,x0,lsl ?#7' +.*: Error: selected processor does not support `addpt x8,x13,x29,lsl ?#5' .*: Error: selected processor does not support `subpt x0,x0,x0' .*: Error: selected processor does not support `subpt sp,x0,x0' .*: Error: selected processor does not support `subpt x0,sp,x0' .*: Error: selected processor does not support `subpt x0,x0,xzr' -.*: Error: selected processor does not support `subpt x0,x0,x0,lsl#0' -.*: Error: selected processor does not support `subpt x0,x0,x0,lsl#7' -.*: Error: selected processor does not support `subpt x1,x10,x22,lsl#2' +.*: Error: selected processor does not support `subpt x0,x0,x0,lsl ?#0' +.*: Error: selected processor does not support `subpt x0,x0,x0,lsl ?#7' +.*: Error: selected processor does not support `subpt x1,x10,x22,lsl ?#2' .*: Error: selected processor does not support `maddpt x0,x0,x0,x0' .*: Error: selected processor does not support `maddpt xzr,x0,x0,x0' .*: Error: selected processor does not support `maddpt x0,xzr,x0,x0' diff --git a/gas/testsuite/gas/aarch64/diagnostic.l b/gas/testsuite/gas/aarch64/diagnostic.l index 85ec9fe..1c83662 100644 --- a/gas/testsuite/gas/aarch64/diagnostic.l +++ b/gas/testsuite/gas/aarch64/diagnostic.l @@ -21,17 +21,17 @@ [^:]*:23: Error: immediate value out of range 1 to 32 at operand 3 -- `scvtf s0,w0,0' [^:]*:24: Error: register number out of range 0 to 15 at operand 3 -- `smlal v0.4s,v31.4h,v16.h\[1\]' [^:]*:25: Error: register element index out of range 0 to 7 at operand 3 -- `smlal v0.4s,v31.4h,v15.h\[8\]' -[^:]*:26: Error: extend operator expected at operand 3 -- `add sp,x0,x7,lsr#2' -[^:]*:27: Error: shift amount out of range 0 to 4 at operand 3 -- `add x0,x0,x7,uxtx#5' -[^:]*:28: Error: 'ROR' operator not allowed at operand 3 -- `add x0,xzr,x7,ror#5' -[^:]*:29: Error: shift amount out of range 0 to 31 at operand 3 -- `add w0,wzr,w7,asr#32' +[^:]*:26: Error: extend operator expected at operand 3 -- `add sp,x0,x7,lsr ?#2' +[^:]*:27: Error: shift amount out of range 0 to 4 at operand 3 -- `add x0,x0,x7,uxtx ?#5' +[^:]*:28: Error: 'ROR' operator not allowed at operand 3 -- `add x0,xzr,x7,ror ?#5' +[^:]*:29: Error: shift amount out of range 0 to 31 at operand 3 -- `add w0,wzr,w7,asr ?#32' [^:]*:30: Error: invalid post-increment amount at operand 2 -- `st2 \{v0.4s,v1.4s\},\[sp\],#24' -[^:]*:31: Error: invalid shift amount at operand 2 -- `ldr q0,\[x0,w0,uxtw#5\]' +[^:]*:31: Error: invalid shift amount at operand 2 -- `ldr q0,\[x0,w0,uxtw ?#5\]' [^:]*:32: Error: expected a list of 2 registers at operand 1 -- `st2 \{v0.4s,v1.4s,v2.4s,v3.4s\},\[sp\],#64' -[^:]*:33: Error: shift amount must be 0 or 12 at operand 3 -- `adds x1,sp,2134,lsl#4' -[^:]*:34: Error: shift amount must be a multiple of 16 at operand 2 -- `movz w0,2134,lsl#8' -[^:]*:35: Error: shift amount out of range 0 to 16 at operand 2 -- `movz w0,2134,lsl#32' -[^:]*:36: Error: shift amount must be a multiple of 16 at operand 2 -- `movz x0,2134,lsl#47' +[^:]*:33: Error: shift amount must be 0 or 12 at operand 3 -- `adds x1,sp,2134,lsl ?#4' +[^:]*:34: Error: shift amount must be a multiple of 16 at operand 2 -- `movz w0,2134,lsl ?#8' +[^:]*:35: Error: shift amount out of range 0 to 16 at operand 2 -- `movz w0,2134,lsl ?#32' +[^:]*:36: Error: shift amount must be a multiple of 16 at operand 2 -- `movz x0,2134,lsl ?#47' [^:]*:37: Error: immediate value out of range 1 to 17 at operand 4 -- `sbfiz w0,w7,15,18' [^:]*:38: Error: immediate value out of range 1 to 32 at operand 4 -- `sbfiz w0,w7,15,0' [^:]*:39: Error: invalid shift amount at operand 3 -- `shll v1.4s,v2.4h,#15' @@ -40,12 +40,12 @@ [^:]*:42: Error: immediate value out of range 1 to 8 at operand 3 -- `sqshrn2 v2.16b,v3.8h,#17' [^:]*:43: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,256' [^:]*:44: Error: immediate value out of range -128 to 255 at operand 2 -- `movi v1.4h,-129' -[^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl#8' +[^:]*:45: Error: invalid shift operator at operand 2 -- `movi v1.4h,255,msl ?#8' [^:]*:46: Error: invalid value for immediate at operand 2 -- `movi d0,256' -[^:]*:47: Error: immediate value must be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl#7' -[^:]*:48: Error: shift amount out of range 0 to 8 at operand 2 -- `movi v1.4h,255,lsl#16' -[^:]*:49: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#0' -[^:]*:50: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl#15' +[^:]*:47: Error: immediate value must be a multiple of 8 at operand 2 -- `movi v1.4h,255,lsl ?#7' +[^:]*:48: Error: shift amount out of range 0 to 8 at operand 2 -- `movi v1.4h,255,lsl ?#16' +[^:]*:49: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl ?#0' +[^:]*:50: Error: shift amount must be 0 or 16 at operand 2 -- `movi v2.2s,255,msl ?#15' [^:]*:51: Error: invalid floating-point constant at operand 2 -- `fmov v1.2s,1.01' [^:]*:52: Error: invalid floating-point constant at operand 2 -- `fmov v1.2d,1.01' [^:]*:53: Error: invalid floating-point constant at operand 2 -- `fmov s3,1.01' @@ -53,27 +53,27 @@ [^:]*:55: Error: immediate zero expected at operand 2 -- `fcmp d0,#1.0' [^:]*:56: Error: expected a scalar SIMD or floating-point register at operand 2 -- `fcmp d0,x0' [^:]*:57: Error: immediate zero expected at operand 3 -- `cmgt v0.4s,v2.4s,#1' -[^:]*:58: Error: unexpected characters following instruction at operand 2 -- `fmov d3,1.00,lsl#3' +[^:]*:58: Error: unexpected characters following instruction at operand 2 -- `fmov d3,1.00,lsl ?#3' [^:]*:59: Error: invalid offset register at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],sp' [^:]*:60: Error: writeback value must be an immediate constant at operand 2 -- `st2 {v0.4s,v1.4s},\[sp\],zr' -[^:]*:61: Error: invalid shift for the register offset addressing mode at operand 2 -- `ldr q0,\[x0,w0,lsr#4\]' -[^:]*:62: Error: only 'LSL' shift is permitted at operand 3 -- `adds x1,sp,2134,uxtw#12' -[^:]*:63: Error: shift amount out of range 0 to 63 at operand 2 -- `movz x0,2134,lsl#64' -[^:]*:64: Error: expected an integer or zero register at operand 1 -- `adds sp,sp,2134,lsl#12' +[^:]*:61: Error: invalid shift for the register offset addressing mode at operand 2 -- `ldr q0,\[x0,w0,lsr ?#4\]' +[^:]*:62: Error: only 'LSL' shift is permitted at operand 3 -- `adds x1,sp,2134,uxtw ?#12' +[^:]*:63: Error: shift amount out of range 0 to 63 at operand 2 -- `movz x0,2134,lsl ?#64' +[^:]*:64: Error: expected an integer or zero register at operand 1 -- `adds sp,sp,2134,lsl ?#12' [^:]*:65: Error: the optional immediate offset can only be 0 at operand 2 -- `ldxrb w2,\[x0,#1\]' [^:]*:66: Error: invalid addressing mode at operand 2 -- `ldrb w0,x1,x2,sxtx' -[^:]*:67: Error: invalid shift amount at operand 2 -- `prfm PLDL3KEEP,\[x9,x15,sxtx#2\]' +[^:]*:67: Error: invalid shift amount at operand 2 -- `prfm PLDL3KEEP,\[x9,x15,sxtx ?#2\]' [^:]*:68: Error: C0 - C15 expected at operand 3 -- `sysl x7,#1,C16,C30,#1' [^:]*:69: Error: C0 - C15 expected at operand 4 -- `sysl x7,#1,C15,C77,#1' [^:]*:70: Error: operand 3 must be a 4-bit opcode field named for historical reasons C0 - C15 -- `sysl x7,#1,x15,C1,#1' -[^:]*:71: Error: extending shift is not permitted at operand 3 -- `add x0,xzr,x7,uxtx#5' +[^:]*:71: Error: extending shift is not permitted at operand 3 -- `add x0,xzr,x7,uxtx ?#5' [^:]*:72: Error: bad expression at operand 2 -- `mov x0,##5' [^:]*:73: Error: unknown mnemonic `bad' -- `bad expression' [^:]*:74: Error: unknown mnemonic `mockup' -- `mockup-op' -[^:]*:75: Error: comma expected between operands at operand 2 -- `orr x0. x0,#0xff,lsl#1' +[^:]*:75: Error: comma expected between operands at operand 2 -- `orr x0. x0,#0xff,lsl ?#1' [^:]*:76: Error: the specified relocation type is not allowed for MOVK at operand 2 -- `movk x1,#:abs_g1_s:s12' -[^:]*:77: Error: can't mix relocation modifier with explicit shift at operand 2 -- `movz x1,#:abs_g1_s:s12,lsl#16' -[^:]*:78: Error: register offset not allowed in pre-indexed addressing mode at operand 2 -- `prfm pldl3strm,\[sp,w0,sxtw#3\]!' +[^:]*:77: Error: can't mix relocation modifier with explicit shift at operand 2 -- `movz x1,#:abs_g1_s:s12,lsl ?#16' +[^:]*:78: Error: register offset not allowed in pre-indexed addressing mode at operand 2 -- `prfm pldl3strm,\[sp,w0,sxtw ?#3\]!' [^:]*:79: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm 0x2f,LABEL1' [^:]*:80: Error: immediate value out of range 0 to 15 at operand 1 -- `dmb #16' [^:]*:81: Error: immediate value out of range 0 to 31 at operand 2 -- `tbz w0,#40,0x17c' @@ -84,8 +84,8 @@ [^:]*:86: Error: immediate value must be a multiple of 4 at operand 3 -- `ldnp w7,w15,\[x3,#3\]' [^:]*:87: Error: unexpected address writeback at operand 3 -- `stnp x7,x15,\[x3,#32\]!' [^:]*:88: Error: immediate offset out of range -256 to 252 at operand 3 -- `ldnp w7,w15,\[x3,#256\]' -[^:]*:89: Error: shift is not permitted at operand 2 -- `movi v1.2d,4294967295,lsl#0' -[^:]*:90: Error: shift amount must be 0 at operand 2 -- `movi v1.8b,97,lsl#8' +[^:]*:89: Error: shift is not permitted at operand 2 -- `movi v1.2d,4294967295,lsl ?#0' +[^:]*:90: Error: shift amount must be 0 at operand 2 -- `movi v1.8b,97,lsl ?#8' [^:]*:91: Error: unknown or missing system register name at operand 1 -- `msr dummy,x1' [^:]*:92: Error: invalid floating-point constant at operand 2 -- `fmov s0,0x42000000' [^:]*:93: Error: immediate value must be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2,#4\]' @@ -156,18 +156,18 @@ [^:]*:280: Error: invalid addressing mode at operand 2 -- `prfum pldl1keep,\[x3\],x4' [^:]*:282: Error: '\]' expected at operand 2 -- `ldr x0,\[x1,#1,mul vl\]' [^:]*:283: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul vl\]' -[^:]*:284: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul#1\]' -[^:]*:285: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul#4\]' +[^:]*:284: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul ?#1\]' +[^:]*:285: Error: invalid use of 'MUL' at operand 2 -- `ldr x0,\[x1,x2,mul ?#4\]' [^:]*:287: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul\]' -[^:]*:288: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul#1\]' +[^:]*:288: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,x0,mul ?#1\]' [^:]*:289: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul\]' -[^:]*:290: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul#2\]' -[^:]*:292: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,1,mul#1' -[^:]*:293: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,2,mul#255' -[^:]*:294: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,3,mul#256' -[^:]*:295: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xff,mul#1' -[^:]*:296: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfe,mul#255' -[^:]*:297: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfc,mul#256' +[^:]*:290: Error: invalid use of 'MUL' at operand 2 -- `strb w7,\[x30,w0,mul ?#2\]' +[^:]*:292: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,1,mul ?#1' +[^:]*:293: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,2,mul ?#255' +[^:]*:294: Error: invalid use of 'MUL' at operand 3 -- `adds x1,sp,3,mul ?#256' +[^:]*:295: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xff,mul ?#1' +[^:]*:296: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfe,mul ?#255' +[^:]*:297: Error: invalid use of 'MUL' at operand 4 -- `orr x0,x0,#0xfc,mul ?#256' [^:]*:299: Warning: ignoring redefinition of register alias 'ip0' [^:]*:300: Warning: ignoring redefinition of register alias 'ip1' [^:]*:301: Warning: ignoring redefinition of register alias 'lr' diff --git a/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l b/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l index 3444d73..bd25bb3 100644 --- a/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l +++ b/gas/testsuite/gas/aarch64/fp8-sme-dot-illegal.l @@ -1,72 +1,72 @@ [^:]*: Assembler messages: -[^:]*:1: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},z16\.b\[0\]' -[^:]*:2: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z1\.b-z2\.b},z0\.b\[0\]' -[^:]*:3: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:4: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[4\]' -[^:]*:5: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:6: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:7: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:9: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]' -[^:]*:10: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]' -[^:]*:11: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:12: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]' -[^:]*:13: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:14: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:15: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:17: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},z16\.b' -[^:]*:18: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z1\.b},z0\.b' -[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z1\.b},z0\.b' -[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z1\.b},z0\.b' -[^:]*:21: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b' -[^:]*:23: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b' -[^:]*:24: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b' -[^:]*:25: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b' -[^:]*:26: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b' -[^:]*:27: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b' -[^:]*:29: Error: expected a list of 2 registers at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z3\.b}' -[^:]*:30: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z1\.b},{z1\.b-z2\.b}' -[^:]*:31: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z1\.b-z2\.b},{z0\.b-z1\.b}' -[^:]*:32: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:33: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:35: Error: expected a list of 4 registers at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z1\.b}' -[^:]*:36: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{z0\.b-z3\.b},{z2\.b-z5\.b}' -[^:]*:37: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{z2\.b-z5\.b},{z0\.b-z3\.b}' -[^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:39: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:41: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},z16\.b\[0\]' -[^:]*:42: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z1\.b-z2\.b},z0\.b\[0\]' -[^:]*:43: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:44: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},z0\.b\[8\]' -[^:]*:45: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:46: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:49: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]' -[^:]*:50: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]' -[^:]*:51: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:52: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},z0\.b\[8\]' -[^:]*:53: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:54: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:55: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:57: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},z16\.b' -[^:]*:58: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z1\.b},z0\.b' -[^:]*:59: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z1\.b},z0\.b' -[^:]*:60: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z1\.b},z0\.b' -[^:]*:61: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{z0\.b-z1\.b},z0\.b' -[^:]*:63: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},z16\.b' -[^:]*:64: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z3\.b},z0\.b' -[^:]*:65: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z3\.b},z0\.b' -[^:]*:66: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{z0\.b-z3\.b},z0\.b' -[^:]*:67: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{z0\.b-z3\.b},z0\.b' -[^:]*:69: Error: expected a list of 2 registers at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},{z0\.b-z3\.b}' -[^:]*:70: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z1\.b},{z1\.b-z2\.b}' -[^:]*:71: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z1\.b-z2\.b},{z0\.b-z1\.b}' -[^:]*:72: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:73: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:75: Error: expected a list of 4 registers at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},{z0\.b-z1\.b}' -[^:]*:76: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{z0\.b-z3\.b},{z2\.b-z5\.b}' -[^:]*:77: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{z2\.b-z5\.b},{z0\.b-z3\.b}' -[^:]*:78: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:79: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^:]*:1: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]' +[^:]*:2: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]' +[^:]*:3: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:4: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[4\]' +[^:]*:5: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:6: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:7: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:9: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]' +[^:]*:10: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]' +[^:]*:11: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:12: Error: register element index out of range 0 to 3 at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[4\]' +[^:]*:13: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:14: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:15: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:17: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b' +[^:]*:18: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:21: Error: expected a list of 4 registers at operand 2 -- `fdot za\.s\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:23: Error: z0-z15 expected at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b' +[^:]*:24: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:25: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:26: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:27: Error: expected a list of 2 registers at operand 2 -- `fdot za\.s\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:29: Error: expected a list of 2 registers at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b}' +[^:]*:30: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b}' +[^:]*:31: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:32: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:33: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:35: Error: expected a list of 4 registers at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:36: Error: start register out of range at operand 3 -- `fdot za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b}' +[^:]*:37: Error: start register out of range at operand 2 -- `fdot za\.s\[w8,0\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b}' +[^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}' +[^:]*:39: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.s\[w8,8\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}' +[^:]*:41: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]' +[^:]*:42: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]' +[^:]*:43: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:44: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[8\]' +[^:]*:45: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:46: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:49: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]' +[^:]*:50: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]' +[^:]*:51: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:52: Error: register element index out of range 0 to 7 at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[8\]' +[^:]*:53: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:54: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:55: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:57: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z16\.b' +[^:]*:58: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:59: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:60: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:61: Error: expected a list of 4 registers at operand 2 -- `fdot za\.h\[w8,0,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:63: Error: z0-z15 expected at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z16\.b' +[^:]*:64: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:65: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:66: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:67: Error: expected a list of 2 registers at operand 2 -- `fdot za\.h\[w8,0,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:69: Error: expected a list of 2 registers at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b}' +[^:]*:70: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b}' +[^:]*:71: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:72: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:73: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:75: Error: expected a list of 4 registers at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b}' +[^:]*:76: Error: start register out of range at operand 3 -- `fdot za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b}' +[^:]*:77: Error: start register out of range at operand 2 -- `fdot za\.h\[w8,0\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b}' +[^:]*:78: Error: expected a selection register in the range w8-w11 at operand 1 -- `fdot za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}' +[^:]*:79: Error: immediate offset out of range 0 to 7 at operand 1 -- `fdot za\.h\[w8,8\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b}' [^:]*:81: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.h\[w7,0\],{z0\.b-z1\.b},z0\.b\[0\]' [^:]*:82: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.h\[w12,0\],{z0\.b-z1\.b},z0\.b\[0\]' [^:]*:83: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.h\[w8,8\],{z0\.b-z1\.b},z0\.b\[0\]' diff --git a/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l b/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l index 31551f9..6749b24 100644 --- a/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l +++ b/gas/testsuite/gas/aarch64/fp8-sme-fmlal-illegal.l @@ -8,26 +8,26 @@ [^:]*:7: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],z0\.b,z0\.b\[0\]' [^:]*:8: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],z0\.b,z0\.b\[0\]' [^:]*:9: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],z0\.b,z0\.b\[0\]' -[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},z16\.b\[0\]' -[^:]*:12: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z1\.b-z2\.b},z0\.b\[0\]' -[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[16\]' -[^:]*:15: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:16: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:17: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:18: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},z16\.b\[0\]' -[^:]*:23: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z2\.b-z5\.b},z0\.b\[0\]' -[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[16\]' -[^:]*:26: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:27: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:28: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:29: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]' +[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]' +[^:]*:12: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]' +[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[16\]' +[^:]*:15: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:16: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:17: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:18: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]' +[^:]*:23: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]' +[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},z0\.b\[16\]' +[^:]*:26: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:27: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:28: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:29: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' [^:]*:33: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],z0\.b,z16\.b' [^:]*:34: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],z0\.b,z0\.b' [^:]*:35: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],z0\.b,z0\.b' @@ -36,37 +36,37 @@ [^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0\],z0\.b,z0\.b' [^:]*:39: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0\],z0\.b,z0\.b' [^:]*:40: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0,VGx4\],z0\.b,z0\.b' -[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},z16\.b' -[^:]*:43: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z1\.b},z0\.b' -[^:]*:44: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z1\.b},z0\.b' -[^:]*:45: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z1\.b},z0\.b' -[^:]*:46: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z1\.b},z0\.b' -[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z1\.b},z0\.b' -[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z1\.b},z0\.b' -[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{z0\.b-z1\.b},z0\.b' -[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},z16\.b' -[^:]*:52: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z3\.b},z0\.b' -[^:]*:53: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z3\.b},z0\.b' -[^:]*:54: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z3\.b},z0\.b' -[^:]*:55: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z3\.b},z0\.b' -[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z3\.b},z0\.b' -[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z3\.b},z0\.b' -[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{z0\.b-z3\.b},z0\.b' -[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},{z0\.b-z3\.b}' -[^:]*:61: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z1\.b},{z1\.b-z2\.b}' -[^:]*:62: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z1\.b-z2\.b},{z0\.b-z1\.b}' -[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:65: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:66: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:67: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:68: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},{z0\.b-z1\.b}' -[^:]*:71: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{z0\.b-z3\.b},{z2\.b-z5\.b}' -[^:]*:72: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{z2\.b-z5\.b},{z0\.b-z3\.b}' -[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:75: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:76: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:77: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:78: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},z16\.b' +[^:]*:43: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:44: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:45: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:46: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},z16\.b' +[^:]*:52: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:53: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:54: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:55: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlal za\.h\[w8,0:1,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:61: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b ?}' +[^:]*:62: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:65: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:66: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:67: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:68: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:71: Error: start register out of range at operand 3 -- `fmlal za\.h\[w8,0:1\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b ?}' +[^:]*:72: Error: start register out of range at operand 2 -- `fmlal za\.h\[w8,0:1\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w7,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlal za\.h\[w12,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:75: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:76: Error: starting offset is not a multiple of 2 at operand 1 -- `fmlal za\.h\[w8,1:2\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:77: Error: immediate offset out of range 0 to 6 at operand 1 -- `fmlal za\.h\[w8,8:9\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:78: Error: expected a range of two offsets at operand 1 -- `fmlal za\.h\[w8,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' diff --git a/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l b/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l index 12ffda0..cb419b9 100644 --- a/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l +++ b/gas/testsuite/gas/aarch64/fp8-sme-fmlall-illegal.l @@ -8,26 +8,26 @@ [^:]*:7: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],z0\.b,z0\.b\[0\]' [^:]*:8: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],z0\.b,z0\.b\[0\]' [^:]*:9: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],z0\.b,z0\.b\[0\]' -[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b\[0\]' -[^:]*:12: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z1\.b-z2\.b},z0\.b\[0\]' -[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[16\]' -[^:]*:15: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:16: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:17: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:18: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b\[0\]' -[^:]*:23: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z2\.b-z5\.b},z0\.b\[0\]' -[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{z0\.b-z1\.b},z0\.b\[0\]' -[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[16\]' -[^:]*:26: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:27: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:28: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:29: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]' +[^:]*:11: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},z16\.b\[0\]' +[^:]*:12: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z1\.b-z2\.b ?},z0\.b\[0\]' +[^:]*:13: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:14: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[16\]' +[^:]*:15: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:16: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:17: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:18: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:19: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:20: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:22: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},z16\.b\[0\]' +[^:]*:23: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z2\.b-z5\.b ?},z0\.b\[0\]' +[^:]*:24: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b\[0\]' +[^:]*:25: Error: register element index out of range 0 to 15 at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},z0\.b\[16\]' +[^:]*:26: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:27: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:28: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:29: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:30: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' +[^:]*:31: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0\],{ ?z0\.b-z3\.b ?},z0\.b\[0\]' [^:]*:33: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],z0\.b,z16\.b' [^:]*:34: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],z0\.b,z0\.b' [^:]*:35: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],z0\.b,z0\.b' @@ -36,37 +36,37 @@ [^:]*:38: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0\],z0\.b,z0\.b' [^:]*:39: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0\],z0\.b,z0\.b' [^:]*:40: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0,VGx4\],z0\.b,z0\.b' -[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b' -[^:]*:43: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b' -[^:]*:44: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b' -[^:]*:45: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b' -[^:]*:46: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b' -[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b' -[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b' -[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{z0\.b-z1\.b},z0\.b' -[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b' -[^:]*:52: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b' -[^:]*:53: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b' -[^:]*:54: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b' -[^:]*:55: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b' -[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z3\.b},z0\.b' -[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z3\.b},z0\.b' -[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{z0\.b-z3\.b},z0\.b' -[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z3\.b}' -[^:]*:61: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z1\.b-z2\.b}' -[^:]*:62: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z1\.b-z2\.b},{z0\.b-z1\.b}' -[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:65: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:66: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:67: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:68: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z1\.b}' -[^:]*:71: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z2\.b-z5\.b}' -[^:]*:72: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{z2\.b-z5\.b},{z0\.b-z3\.b}' -[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:75: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:76: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:77: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^:]*:78: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^:]*:42: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},z16\.b' +[^:]*:43: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:44: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:45: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:46: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:47: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:48: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:49: Error: expected a list of 4 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx4\],{ ?z0\.b-z1\.b ?},z0\.b' +[^:]*:51: Error: z0-z15 expected at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},z16\.b' +[^:]*:52: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:53: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:54: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:55: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:56: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:57: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:58: Error: expected a list of 2 registers at operand 2 -- `fmlall za\.s\[w8,0:3,VGx2\],{ ?z0\.b-z3\.b ?},z0\.b' +[^:]*:60: Error: expected a list of 2 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:61: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z1\.b ?},{ ?z1\.b-z2\.b ?}' +[^:]*:62: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z1\.b-z2\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:63: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:64: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:65: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:66: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:67: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:68: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z1\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:70: Error: expected a list of 4 registers at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z1\.b ?}' +[^:]*:71: Error: start register out of range at operand 3 -- `fmlall za\.s\[w8,0:3\],{ ?z0\.b-z3\.b ?},{ ?z2\.b-z5\.b ?}' +[^:]*:72: Error: start register out of range at operand 2 -- `fmlall za\.s\[w8,0:3\],{ ?z2\.b-z5\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:73: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w7,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:74: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmlall za\.s\[w12,0:3\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:75: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:76: Error: starting offset is not a multiple of 4 at operand 1 -- `fmlall za\.s\[w8,2:5\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:77: Error: immediate offset out of range 0 to 4 at operand 1 -- `fmlall za\.s\[w8,8:11\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' +[^:]*:78: Error: expected a range of four offsets at operand 1 -- `fmlall za\.s\[w8,0:1\],{ ?z0\.b-z3\.b ?},{ ?z0\.b-z3\.b ?}' diff --git a/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l b/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l index 856ca7f..30ab7bb 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l +++ b/gas/testsuite/gas/aarch64/illegal-sve2-sve1ext.l @@ -1,35 +1,35 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `ext z17\.b,{z21\.b,z22\.b},#221' -[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{z0\.b,z1\.b},#0' -[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{z31\.b,z0\.b},#0' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.d},p5/z,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.d},p0/z,\[z0\.d,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.s},p5/z,\[z21\.s,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.s},p0/z,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.s},p0/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.s},p0/z,\[z0\.s,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d},p5/z,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d},p0/z,\[z0\.d,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.d},p5/z,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.d},p0/z,\[z0\.d,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.s},p5/z,\[z21\.s,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.s},p0/z,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.s},p0/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.s},p0/z,\[z0\.s,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s},p5/z,\[z21\.s,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s},p0/z,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s},p0/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s},p0/z,\[z0\.s,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.d},p5/z,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.d},p0/z,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ext z17\.b,{ ?z21\.b,z22\.b ?},#221' +[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{ ?z0\.b,z1\.b ?},#0' +[^ :]+:[0-9]+: Error: selected processor does not support `ext z0\.b,{ ?z31\.b,z0\.b ?},#0' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.d ?},p5/z,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.s ?},p5/z,\[z21\.s,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d ?},p5/z,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.d ?},p5/z,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.s ?},p5/z,\[z21\.s,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s ?},p5/z,\[z21\.s,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.d ?},p5/z,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,xzr\]' [^ :]+:[0-9]+: Error: selected processor does not support `mla z17\.h,z21\.h,z3\.h\[3\]' [^ :]+:[0-9]+: Error: selected processor does not support `mla z0\.h,z0\.h,z0\.h\[4\]' [^ :]+:[0-9]+: Error: selected processor does not support `mla z0\.h,z0\.h,z0\.h\[0\]' @@ -61,12 +61,12 @@ [^ :]+:[0-9]+: Error: selected processor does not support `smulh z0\.h,z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smulh z0\.s,z0\.s,z0\.s' [^ :]+:[0-9]+: Error: selected processor does not support `smulh z0\.d,z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `splice z17\.b,p5,{z21\.b,z22\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{z0\.b,z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.h,p0,{z0\.h,z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.s,p0,{z0\.s,z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.d,p0,{z0\.d,z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{z31\.b,z0\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `splice z17\.b,p5,{ ?z21\.b,z22\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{ ?z0\.b,z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.h,p0,{ ?z0\.h,z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.s,p0,{ ?z0\.s,z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.d,p0,{ ?z0\.d,z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `splice z0\.b,p0,{ ?z31\.b,z0\.b ?}' [^ :]+:[0-9]+: Error: selected processor does not support `sqadd z17\.b,p5/m,z17\.b,z21\.b' [^ :]+:[0-9]+: Error: selected processor does not support `sqadd z0\.b,p0/m,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `sqadd z0\.h,p0/m,z0\.h,z0\.h' @@ -77,40 +77,40 @@ [^ :]+:[0-9]+: Error: selected processor does not support `sqsub z0\.h,p0/m,z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `sqsub z0\.s,p0/m,z0\.s,z0\.s' [^ :]+:[0-9]+: Error: selected processor does not support `sqsub z0\.d,p0/m,z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.s},p5,\[z21\.s,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.s},p0,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.s},p0,\[z0\.s\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.s},p0,\[z0\.s,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.d},p5,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.d},p0,\[z0\.d,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d},p5,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d},p0,\[z0\.d,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.s},p5,\[z21\.s,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.s},p0,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.s},p0,\[z0\.s\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.s},p0,\[z0\.s,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.d},p5,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.d},p0,\[z0\.d,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s},p5,\[z21\.s,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s},p0,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s},p0,\[z0\.s\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s},p0,\[z0\.s,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.d},p5,\[z21\.d,x27\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.d},p0,\[z0\.d,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `tbl z17\.b,{z21\.b,z22\.b},z27\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.h,{z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.s,{z0\.s,z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.d,{z0\.d,z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{z31\.b,z0\.b},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.s ?},p5,\[z21\.s,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.s ?},p0,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.s ?},p0,\[z0\.s\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.s ?},p0,\[z0\.s,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.d ?},p5,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.d ?},p0,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d ?},p5,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?},p0,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.s ?},p5,\[z21\.s,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.s ?},p0,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.s ?},p0,\[z0\.s\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.s ?},p0,\[z0\.s,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.d ?},p5,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.d ?},p0,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s ?},p5,\[z21\.s,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?},p0,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?},p0,\[z0\.s\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?},p0,\[z0\.s,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.d ?},p5,\[z21\.d,x27\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.d ?},p0,\[z0\.d,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `tbl z17\.b,{ ?z21\.b,z22\.b ?},z27\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{ ?z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.h,{ ?z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.s,{ ?z0\.s,z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.d,{ ?z0\.d,z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `tbl z0\.b,{ ?z31\.b,z0\.b ?},z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umulh z17\.b,z21\.b,z27\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umulh z0\.b,z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umulh z0\.h,z0\.h,z0\.h' diff --git a/gas/testsuite/gas/aarch64/illegal-sve2.l b/gas/testsuite/gas/aarch64/illegal-sve2.l index dfa05af..b5e1662 100644 --- a/gas/testsuite/gas/aarch64/illegal-sve2.l +++ b/gas/testsuite/gas/aarch64/illegal-sve2.l @@ -239,24 +239,24 @@ [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `eortb z0\.s,z32\.s,z0\.s' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `eortb z0\.s,z0\.s,z32\.s' [^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `ext z0\.b,{,},#0' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{z0\.b,z2\.b},#0' -[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.h,{z0\.b,z1\.b},#0' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{ ?z0\.b,z2\.b ?},#0' +[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.h,{ ?z0\.b,z1\.b ?},#0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ext z0\.b, {z0\.b-z1\.b}, #0 -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{z0\.h,z1\.b},#0' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{z0\.b,z1\.h},#0' -[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.b,{z0\.h,z1\.h},#0' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{ ?z0\.h,z1\.b ?},#0' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `ext z0\.b,{ ?z0\.b,z1\.h ?},#0' +[^ :]+:[0-9]+: Error: operand mismatch -- `ext z0\.b,{ ?z0\.h,z1\.h ?},#0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ext z0\.b, {z0\.b-z1\.b}, #0 -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{z0\.b,z1\.b,z2\.b},#0' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{z0\.b},#0' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{ ?z0\.b,z1\.b,z2\.b ?},#0' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `ext z0\.b,{ ?z0\.b ?},#0' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `ext z0\.b,z0\.b,#0' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{z31\.b,z1\.b},#0' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{z0\.b,z31\.b},#0' -[^ :]+:[0-9]+: Error: immediate value out of range 0 to 255 at operand 3 -- `ext z0\.b,{z0\.b,z1\.b},#256' -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `ext z32\.b,{z0\.b,z1\.b},#0' -[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `ext z0\.b,{z31\.b,z32\.b},#0' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `ext z0\.b,{z32\.b,z33\.b},#0' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{ ?z31\.b,z1\.b ?},#0' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `ext z0\.b,{ ?z0\.b,z31\.b ?},#0' +[^ :]+:[0-9]+: Error: immediate value out of range 0 to 255 at operand 3 -- `ext z0\.b,{ ?z0\.b,z1\.b ?},#256' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `ext z32\.b,{ ?z0\.b,z1\.b ?},#0' +[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `ext z0\.b,{ ?z31\.b,z32\.b ?},#0' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `ext z0\.b,{ ?z32\.b,z33\.b ?},#0' [^ :]+:[0-9]+: Error: expected a register at operand 1 -- `faddp z32\.h,p0/m,z32\.h,z0\.h' [^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `faddp z0\.h,p8/m,z0\.h,z0\.h' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 4 -- `faddp z0\.h,p0/m,z0\.h,z32\.h' @@ -488,134 +488,134 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `histseg z0\.b,z0\.b,z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: histseg z0\.b, z0\.b, z0\.b -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1b {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1b { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1b {z0\.d}, p0/z, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b {z32\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b {z0\.d},p8/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.d},p0/z,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.s},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b { ?z32\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b { ?z0\.d ?},p8/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1b {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.d},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.d ?},p0/z,\[z0\.s\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1b {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1b {z0\.s,z1\.d},p0/z,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b {z0\.s},p0/m,\[z0\.s\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1b { ?z0\.s,z1\.d ?},p0/z,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1b { ?z0\.s ?},p0/m,\[z0\.s\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1b {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b {z32\.s},p0/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b {z0\.s},p8/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z32\.s\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z0\.s,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z0\.s,x32\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b {z0\.s},p0/z,\[z0\.s,z0\.s\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1d {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1b { ?z32\.s ?},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1b { ?z0\.s ?},p8/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z32\.s\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,x32\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1b { ?z0\.s ?},p0/z,\[z0\.s,z0\.s\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1d { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1d {z0\.d}, p0/z, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1d {z32\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1d {z0\.d},p8/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d {z0\.d},p0/z,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.s},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1d { ?z32\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1d { ?z0\.d ?},p8/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.s ?},p0/z,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1d {z0\.d}, p0/z, \[z0\.d\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.d},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.d ?},p0/z,\[z0\.s\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1d {z0\.d}, p0/z, \[z0\.d\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1d { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1d {z0\.d}, p0/z, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1h {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1h { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1h {z0\.d}, p0/z, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h {z32\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h {z0\.d},p8/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.d},p0/z,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h {z0\.s},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h { ?z32\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h { ?z0\.d ?},p8/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1h {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1h {z0\.s,z1\.d},p0/z,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h {z32\.s},p0/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h {z0\.s},p8/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z32\.s\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z0\.s,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z0\.s,x32\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h {z0\.s},p0/z,\[z0\.s,z0\.s\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sb {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sb {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1h { ?z0\.s,z1\.d ?},p0/z,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1h { ?z32\.s ?},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1h { ?z0\.s ?},p8/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z32\.s\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,x32\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1h { ?z0\.s ?},p0/z,\[z0\.s,z0\.s\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sb { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sb { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1sb {z0\.d}, p0/z, \[z0\.d\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: ldnt1sb {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sb {z32\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sb {z0\.d},p8/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb {z0\.d},p0/z,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sb { ?z32\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sb { ?z0\.d ?},p8/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sb { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1sh {z0\.d}, p0/z, \[z0\.d\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: ldnt1sh {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh {z32\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh {z0\.d},p8/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh { ?z32\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh { ?z0\.d ?},p8/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1sh { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1sh { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1sh {z0\.d}, p0/z, \[z0\.d\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: ldnt1sh {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh {z32\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh {z0\.d},p8/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh {z0\.d},p0/z,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1w {z0\.d,z1\.d},p0/z,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1sh { ?z32\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1sh { ?z0\.d ?},p8/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1sh { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ldnt1w { ?z0\.d,z1\.d ?},p0/z,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1w {z0\.d}, p0/z, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w {z32\.d},p0/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w {z0\.d},p8/z,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.d},p0/z,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w {z0\.s},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w { ?z32\.d ?},p0/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w { ?z0\.d ?},p8/z,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.d ?},p0/z,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ldnt1w {z0\.s}, p0/z, \[z0\.s\] -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1w {z0\.s,z1\.d},p0/z,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w {z32\.s},p0/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w {z0\.s},p8/z,\[z0\.s\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z32\.s\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z0\.s,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z0\.s,x32\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w {z0\.s},p0/z,\[z0\.s,z0\.s\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ldnt1w { ?z0\.s,z1\.d ?},p0/z,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `ldnt1w { ?z32\.s ?},p0/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `ldnt1w { ?z0\.s ?},p8/z,\[z0\.s\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z32\.s\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,x32\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ldnt1w { ?z0\.s ?},p0/z,\[z0\.s,z0\.s\]' [^ :]+:[0-9]+: Error: operand mismatch -- `match p0\.h,p0/z,z0\.b,z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: match p0\.b, p0/z, z0\.b, z0\.b @@ -1277,21 +1277,21 @@ [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: smullt z0\.s, z0\.h, z0\.h [^ :]+:[0-9]+: Info: smullt z0\.d, z0\.s, z0\.s -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{z0\.b,z2\.b}' -[^ :]+:[0-9]+: Error: operand mismatch -- `splice z0\.h,p0,{z0\.b,z1\.b}' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{ ?z0\.b,z2\.b ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `splice z0\.h,p0,{ ?z0\.b,z1\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: splice z0\.b, p0, {z0\.b-z1\.b} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: splice z0\.h, p0, {z0\.h-z1\.h} [^ :]+:[0-9]+: Info: splice z0\.s, p0, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: splice z0\.d, p0, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{z0\.h,z1\.b}' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{z0\.b,z1\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `splice z32\.b,p0,{z0\.b,z1\.b}' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `splice z0\.b,p8,{z0\.b,z1\.b}' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{z31\.b,z1\.b}' -[^ :]+:[0-9]+: Error: operand 3 must be a list of SVE vector registers -- `splice z0\.b,p0,{z31\.b,z32\.b}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `splice z0\.b,p0,{z32\.b,z1\.b}' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{ ?z0\.h,z1\.b ?}' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 3 -- `splice z0\.b,p0,{ ?z0\.b,z1\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `splice z32\.b,p0,{ ?z0\.b,z1\.b ?}' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `splice z0\.b,p8,{ ?z0\.b,z1\.b ?}' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 3 -- `splice z0\.b,p0,{ ?z31\.b,z1\.b ?}' +[^ :]+:[0-9]+: Error: operand 3 must be a list of SVE vector registers -- `splice z0\.b,p0,{ ?z31\.b,z32\.b ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `splice z0\.b,p0,{ ?z32\.b,z1\.b ?}' [^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqabs z32\.b,p0/m,z0\.b' [^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `sqabs z0\.b,p8/m,z0\.b' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sqabs z0\.b,p0/m,z32\.b' @@ -2216,83 +2216,83 @@ [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: ssubwt z0\.s, z0\.s, z0\.h [^ :]+:[0-9]+: Info: ssubwt z0\.d, z0\.d, z0\.s -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1b {z0\.d,z1\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1b { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1b {z0\.d}, p0, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b {z32\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b {z0\.d},p8,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b {z0\.d},p0,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.d},p0,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b {z0\.s},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b { ?z32\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b { ?z0\.d ?},p8,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.d ?},p0,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1b { ?z0\.s ?},p0,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1b {z0\.s}, p0, \[z0\.s\] -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1b {z0\.s,z1\.d},p0,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b {z32\.s},p0,\[z0\.s\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b {z0\.s},p8,\[z0\.s\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b {z0\.s},p0,\[z32\.s\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b {z0\.s},p0,\[z0\.s,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.s},p0,\[z0\.s,x32\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b {z0\.s},p0,\[z0\.s,z0\.s\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1d {z0\.d,z1\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1b { ?z0\.s,z1\.d ?},p0,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1b { ?z32\.s ?},p0,\[z0\.s\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1b { ?z0\.s ?},p8,\[z0\.s\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z32\.s\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z0\.s,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z0\.s,x32\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1b { ?z0\.s ?},p0,\[z0\.s,z0\.s\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1d { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1d {z0\.d}, p0, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1d {z32\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1d {z0\.d},p8,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1d {z0\.d},p0,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d {z0\.d},p0,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d {z0\.s},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1d { ?z32\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1d { ?z0\.d ?},p8,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1d { ?z0\.d ?},p0,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1d { ?z0\.s ?},p0,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1d {z0\.d}, p0, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1h {z0\.d,z1\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1h { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1h {z0\.d}, p0, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h {z32\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h {z0\.d},p8,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h {z0\.d},p0,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.d},p0,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h {z0\.s},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h { ?z32\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h { ?z0\.d ?},p8,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.d ?},p0,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1h { ?z0\.s ?},p0,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1h {z0\.s}, p0, \[z0\.s\] -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1h {z0\.s,z1\.d},p0,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h {z32\.s},p0,\[z0\.s\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h {z0\.s},p8,\[z0\.s\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h {z0\.s},p0,\[z32\.s\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h {z0\.s},p0,\[z0\.s,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.s},p0,\[z0\.s,x32\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h {z0\.s},p0,\[z0\.s,z0\.s\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1w {z0\.d,z1\.d},p0,\[z0\.d,x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w {z0\.d},p0/m,\[z0\.d\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1h { ?z0\.s,z1\.d ?},p0,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1h { ?z32\.s ?},p0,\[z0\.s\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1h { ?z0\.s ?},p8,\[z0\.s\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z32\.s\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z0\.s,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z0\.s,x32\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1h { ?z0\.s ?},p0,\[z0\.s,z0\.s\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `stnt1w { ?z0\.d,z1\.d ?},p0,\[z0\.d,x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w { ?z0\.d ?},p0/m,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1w {z0\.d}, p0, \[z0\.d\] -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w {z32\.d},p0,\[z0\.d\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w {z0\.d},p8,\[z0\.d\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w {z0\.d},p0,\[z32\.d\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,x32\]' -[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,w16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.d},p0,\[z0\.d,z0\.d\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w {z0\.s},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w { ?z32\.d ?},p0,\[z0\.d\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w { ?z0\.d ?},p8,\[z0\.d\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z32\.d\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,x32\]' +[^ :]+:[0-9]+: Error: invalid use of 32-bit register offset at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,w16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.d ?},p0,\[z0\.d,z0\.d\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `stnt1w { ?z0\.s ?},p0,\[z0\.d\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: stnt1w {z0\.s}, p0, \[z0\.s\] -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1w {z0\.s,z1\.d},p0,\[z0\.s,x0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w {z32\.s},p0,\[z0\.s\]' -[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w {z0\.s},p8,\[z0\.s\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w {z0\.s},p0,\[z32\.s\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w {z0\.s},p0,\[z0\.s,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.s},p0,\[z0\.s,x32\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w {z0\.s},p0,\[z0\.s,z0\.s\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `stnt1w { ?z0\.s,z1\.d ?},p0,\[z0\.s,x0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `stnt1w { ?z32\.s ?},p0,\[z0\.s\]' +[^ :]+:[0-9]+: Error: p0-p7 expected at operand 2 -- `stnt1w { ?z0\.s ?},p8,\[z0\.s\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z32\.s\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z0\.s,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z0\.s,x32\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `stnt1w { ?z0\.s ?},p0,\[z0\.s,z0\.s\]' [^ :]+:[0-9]+: Error: operand mismatch -- `subhnb z0\.h,z0\.h,z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: subhnb z0\.b, z0\.h, z0\.h @@ -2330,21 +2330,21 @@ [^ :]+:[0-9]+: Info: suqadd z0\.h, p0/m, z0\.h, z0\.h [^ :]+:[0-9]+: Info: suqadd z0\.s, p0/m, z0\.s, z0\.s [^ :]+:[0-9]+: Info: suqadd z0\.d, p0/m, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `tbl z32\.b,{z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `tbl z0\.b,{z31\.b,z32\.b},z0\.b' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `tbl z0\.b,{z31\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `tbl z0\.b,{z0\.b,z1\.b},z32\.b' -[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.b,{z0\.b,z1\.b},z0\.h' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `tbl z32\.b,{ ?z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be a list of SVE vector registers -- `tbl z0\.b,{ ?z31\.b,z32\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `tbl z0\.b,{ ?z31\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `tbl z0\.b,{ ?z0\.b,z1\.b ?},z32\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.b,{ ?z0\.b,z1\.b ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: tbl z0\.b, {z0\.b-z1\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: tbl z0\.h, {z0\.h-z1\.h}, z0\.h [^ :]+:[0-9]+: Info: tbl z0\.s, {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: tbl z0\.d, {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{z0\.b,z1\.h},z0\.b' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{z0\.h,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `tbl z0\.h,{z0\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.h,{z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{ ?z0\.b,z1\.h ?},z0\.b' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `tbl z0\.b,{ ?z0\.h,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `tbl z0\.h,{ ?z0\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `tbl z0\.h,{ ?z0\.b,z1\.b ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: tbl z0\.b, {z0\.b-z1\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/illegal.l b/gas/testsuite/gas/aarch64/illegal.l index ae9bb93..5030210 100644 --- a/gas/testsuite/gas/aarch64/illegal.l +++ b/gas/testsuite/gas/aarch64/illegal.l @@ -35,9 +35,9 @@ [^:]*:64: Error: .*`pmull2 v7.8h,v15.8b,v31.8b' [^:]*:65: Error: .*`pmull2 v7.1q,v15.2d,v31.1q' [^:]*:67: Error: .*`ld2 {v1.4h,v0.4h},\[x1\]' -[^:]*:68: Error: .*`strb x0,\[sp,x1,lsl#0\]' +[^:]*:68: Error: .*`strb x0,\[sp,x1,lsl ?#0\]' [^:]*:69: Error: .*`strb w7,\[x30,x0,lsl\]' -[^:]*:70: Error: .*`strb w7,\[x30,x0,lsl#1\]' +[^:]*:70: Error: .*`strb w7,\[x30,x0,lsl ?#1\]' [^:]*:71: Error: .*`ldtr x7,\[x15,266\]' [^:]*:72: Error: .*`sttr x7,\[x15,#1\]!' [^:]*:73: Error: .*`stxrb x2,w1,\[sp\]' @@ -123,7 +123,7 @@ [^:]*:176: Error: .*`prfm 0x2f,LABEL1' [^:]*:177: Error: .*`prfm pldl3strm,\[sp,#8\]!' [^:]*:178: Error: .*`prfm pldl3strm,\[sp\],#8' -[^:]*:179: Error: .*`prfm pldl3strm,\[sp,w0,sxtw#3\]!' +[^:]*:179: Error: .*`prfm pldl3strm,\[sp,w0,sxtw ?#3\]!' [^:]*:180: Error: .*`prfm pldl3strm,=0x100' [^:]*:182: Error: .*`sttr x0,LABEL1' [^:]*:183: Error: .*`sttr x0,\[sp,#16\]!' @@ -142,22 +142,22 @@ [^:]*:199: Error: .*`sys #0,c0,c0,0,w0' [^:]*:200: Error: .*`msr spsel,#16' [^:]*:201: Error: .*`msr cptr_el2,#15' -[^:]*:203: Error: .*`movz x1,#:abs_g2:u48,lsl#16' -[^:]*:204: Error: .*`movz x1,0xddee,lsl#8' +[^:]*:203: Error: .*`movz x1,#:abs_g2:u48,lsl ?#16' +[^:]*:204: Error: .*`movz x1,0xddee,lsl ?#8' [^:]*:205: Error: .*`movz w1,#:abs_g2:u48' [^:]*:206: Error: .*`movz w1,#:abs_g3:u48' [^:]*:207: Error: .*`movk x1,#:abs_g1_s:s12' [^:]*:209: Error: .*`movi v0.4s,#256' [^:]*:210: Error: .*`movi v0.2d,#0xabcdef' -[^:]*:212: Error: .*`bic v0.4s,#255,msl#8' +[^:]*:212: Error: .*`bic v0.4s,#255,msl ?#8' [^:]*:213: Error: .*`bic v0.4s,#512' -[^:]*:214: Error: .*`bic v0.4s,#1,lsl#31' -[^:]*:217: Error: .*`orr v0.4s,#255,msl#8' +[^:]*:214: Error: .*`bic v0.4s,#1,lsl ?#31' +[^:]*:217: Error: .*`orr v0.4s,#255,msl ?#8' [^:]*:218: Error: .*`orr v0.4s,#512' -[^:]*:220: Error: .*`movi v0.4s,#127,lsl#4' -[^:]*:221: Error: .*`movi v0.4s,#127,msl#24' -[^:]*:224: Error: .*`mvni v0.4s,#127,lsl#4' -[^:]*:225: Error: .*`mvni v0.4s,#127,msl#24' +[^:]*:220: Error: .*`movi v0.4s,#127,lsl ?#4' +[^:]*:221: Error: .*`movi v0.4s,#127,msl ?#24' +[^:]*:224: Error: .*`mvni v0.4s,#127,lsl ?#4' +[^:]*:225: Error: .*`mvni v0.4s,#127,msl ?#24' [^:]*:228: Error: .*`fmov v0.2s,#3.1415926' [^:]*:229: Error: .*`fmov v0.4s,#3.1415926' [^:]*:230: Error: .*`fmov v0.2d,#3.1415926' @@ -802,12 +802,12 @@ [^:]*:467: Error: .*`fcvtzu x1,d0,65' [^:]*:468: Error: .*`fcvtzu x1,s0,65' [^:]*:472: Error: .* -[^:]*:475: Error: .*`ldrh w0,\[x1,x2,lsr#1\]' -[^:]*:477: Error: .*`add w0,w1,w2,ror#1' -[^:]*:478: Error: .*`sub w0,w1,w2,asr#32' -[^:]*:479: Error: .*`eor w0,w1,w2,ror#32' -[^:]*:481: Error: .*`add x0,x1,#20,LSL#16' -[^:]*:482: Error: .*`add x0,x1,#20,UXTX#12' +[^:]*:475: Error: .*`ldrh w0,\[x1,x2,lsr ?#1\]' +[^:]*:477: Error: .*`add w0,w1,w2,ror ?#1' +[^:]*:478: Error: .*`sub w0,w1,w2,asr ?#32' +[^:]*:479: Error: .*`eor w0,w1,w2,ror ?#32' +[^:]*:481: Error: .*`add x0,x1,#20,LSL ?#16' +[^:]*:482: Error: .*`add x0,x1,#20,UXTX ?#12' [^:]*:483: Error: .*`add x0,x1,#20,LSR' [^:]*:484: Error: .*`add x0,x1,#20,LSL' [^:]*:486: Error: .*`ldnp h7,h15,\[x0,#2\]' @@ -818,7 +818,7 @@ [^:]*:493: Error: .*`bfxil w7,w15,#15,#30' [^:]*:494: Error: .*`bfi x3,x7,#31,#48' [^:]*:496: Error: .*`str x1,page_table_count' -[^:]*:498: Error: .*`prfm PLDL3KEEP,\[x9,x15,sxtx#2\]' +[^:]*:498: Error: .*`prfm PLDL3KEEP,\[x9,x15,sxtx ?#2\]' [^:]*:500: Error: .*`mrs x5,S1_0_C17_C8_0' [^:]*:502: Error: .*`msr S3_1_C11_C15_-1,x7' [^:]*:503: Error: .*`msr S3_1_11_15_1,x7' @@ -836,15 +836,15 @@ [^:]*:520: Error: .*`mov x0,v0.h\[0\]' [^:]*:521: Error: .*`mov x0,v0.s\[0\]' [^:]*:523: Error: .*`uabdl2 v20\.4S,v12\.8H,v29\.8' -[^:]*:525: Error: .*`movi d1,0xffff,lsl#16' +[^:]*:525: Error: .*`movi d1,0xffff,lsl ?#16' [^:]*:527: Error: .*`st3 {v18.D-v20.D}\[0\],\[x28\],x' [^:]*:528: Error: .*`st1 {v7.B}\[2\],\[x4\],x' [^:]*:529: Error: .*`st1 {v22.1D-v25.1D},\[x10\],x' [^:]*:531: Error: .*`ldr w0,\[x0\]!' [^:]*:532: Error: .*`ldr w0,\[x0\],\{127\}' -[^:]*:534: Error: .*`orr x0,x0,#0xff,lsl#1' -[^:]*:535: Error: .*`orr x0. x0,#0xff,lsl#1' -[^:]*:536: Error: .*`orr x0,x0,#0xff lsl#1' +[^:]*:534: Error: .*`orr x0,x0,#0xff,lsl ?#1' +[^:]*:535: Error: .*`orr x0. x0,#0xff,lsl ?#1' +[^:]*:536: Error: .*`orr x0,x0,#0xff lsl ?#1' [^:]*:538: Error: .*`mov x0,##5' [^:]*:540: Error: .*`msr daifset,x0' [^:]*:541: Error: .*`msr daifclr,x0' @@ -879,8 +879,8 @@ [^:]*:593: Error: .*`st2 {v0\.16b-v1\.16b}\[1\],\[x0\]' [^:]*:594: Error: .*`st3 {v0\.16b-v2\.16b}\[2\],\[x0\]' [^:]*:595: Error: .*`st4 {v0\.8b-v3\.8b}\[4\],\[x0\]' -[^:]*:597: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x18,\[sp,x15,lsl#0\]' -[^:]*:598: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x1f,\[sp,x15,lsl#0\]' -[^:]*:599: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm #0x20,\[sp,x15,lsl#0\]' +[^:]*:597: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x18,\[sp,x15,lsl ?#0\]' +[^:]*:598: Error: the register-index form of PRFM does not accept opcodes in the range 24-31 at operand 1 -- `prfm #0x1f,\[sp,x15,lsl ?#0\]' +[^:]*:599: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm #0x20,\[sp,x15,lsl ?#0\]' [^:]*:600: Error: immediate value out of range 0 to 31 at operand 1 -- `prfm #0x20,FOO' [^:]*:602: Error: .* diff --git a/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l index 20c08f8..0d40b29 100644 --- a/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l +++ b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l @@ -1,8 +1,8 @@ [^:]+: Assembler messages: -[^:]+:3: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 {v1.d}\[-1\],\[x1\]' -[^:]+:6: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 {v1.d}\[2\],\[x1\]' -[^:]+:8: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 {v2.d}\[-1\],\[sp\]' -[^:]+:11: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 {v2.d}\[2\],\[sp\]' +[^:]+:3: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 { ?v1.d ?}\[-1\],\[x1\]' +[^:]+:6: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 { ?v1.d ?}\[2\],\[x1\]' +[^:]+:8: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 { ?v2.d ?}\[-1\],\[sp\]' +[^:]+:11: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 { ?v2.d ?}\[2\],\[sp\]' [^:]+:13: Error: immediate value out of range -256 to 255 at operand 2 -- `ldapur b1,\[x1,#-257\]' [^:]+:16: Error: immediate value out of range -256 to 255 at operand 2 -- `ldapur b1,\[x1,#256\]' [^:]+:18: Error: immediate value out of range -256 to 255 at operand 2 -- `stlur q1,\[x1,#-257\]' diff --git a/gas/testsuite/gas/aarch64/reglist-2.l b/gas/testsuite/gas/aarch64/reglist-2.l index 9d7dfbe..8bf23c7 100644 --- a/gas/testsuite/gas/aarch64/reglist-2.l +++ b/gas/testsuite/gas/aarch64/reglist-2.l @@ -1,8 +1,8 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v1\.2d-v0\.2d},\[x0\]' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v31\.2d-v3\.2d},\[x0\]' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v30\.2d-v2\.2d},\[x0\]' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v29\.2d-v1\.2d},\[x0\]' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 {v31\.2d-v30\.2d},\[x0\]' -[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 {v0\.2d-v0\.2d},\[x0\]' -[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 {v31\.2d-v31\.2d},\[x0\]' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v1\.2d ?- ?v0\.2d ?},\[x0\]' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v31\.2d ?- ?v3\.2d ?},\[x0\]' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v30\.2d ?- ?v2\.2d ?},\[x0\]' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v29\.2d ?- ?v1\.2d ?},\[x0\]' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `ld1 { ?v31\.2d ?- ?v30\.2d ?},\[x0\]' +[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 { ?v0\.2d ?- ?v0\.2d ?},\[x0\]' +[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 1 -- `ld1 { ?v31\.2d ?- ?v31\.2d ?},\[x0\]' diff --git a/gas/testsuite/gas/aarch64/sme-4-illegal.l b/gas/testsuite/gas/aarch64/sme-4-illegal.l index db52529..26cd74f 100644 --- a/gas/testsuite/gas/aarch64/sme-4-illegal.l +++ b/gas/testsuite/gas/aarch64/sme-4-illegal.l @@ -1,41 +1,41 @@ [^:]*: Assembler messages: [^:]*:[0-9]+: Error: expected '\[' at operand 1 -- `zero za' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za8\.d}' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za0\.d,za8.d}' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za2\.h}' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za4\.s}' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za1\.s,za4.s}' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za0\.d,za3.s,za2.h}' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero {za1.b}' -[^:]*:[0-9]+: Error: unexpected comma after the mnemonic name `zero' -- `zero ,' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za8\.d ?}' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za0\.d,za8.d ?}' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za2\.h ?}' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za4\.s ?}' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za1\.s,za4.s ?}' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za0\.d,za3.s,za2.h ?}' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `zero { ?za1.b ?}' +[^:]*:[0-9]+: Error: unexpected comma after the mnemonic name `zero' -- `zero ?,' [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {' [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,' [^:]*:[0-9]+: Error: expected '{' at operand 1 -- `zero }' [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,}' [^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,,}' -[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero {za0}' -[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,za0.d}' -[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {za0.d,}' -[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero {za0.d,z1.d}' -[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero {za0.d,za32.d}' -[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {za0.d,za1.d,}' -[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {za,}' -[^:]*:[0-9]+: Error: unexpected character `}' in element size at operand 1 -- `zero {za.}' -[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za-}' -[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {za_}' -[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za#}' -[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zaX}' -[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero {za0}' -[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zax}' -[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero {za{}' -[^:]*:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `zero {za}}' -[^:]*:[0-9]+: Error: ZA tile masks do not operate at .Q granularity at operand 1 -- `zero {za0\.q}' -[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.b}' -[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.h}' -[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.s}' -[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.d}' -[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero {za\.q}' -[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero {za.2d}' -[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero {za0.2d}' -[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero {za0h\.b}' -[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero {za0v\.b}' +[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero { ?za0 ?}' +[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {,za0.d ?}' +[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero { ?za0.d,}' +[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero { ?za0.d,z1.d ?}' +[^:]*:[0-9]+: Error: operand 1 must be a list of 64-bit ZA element tiles -- `zero { ?za0.d,za32.d ?}' +[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero { ?za0.d,za1.d,}' +[^:]*:[0-9]+: Error: syntax error in register list at operand 1 -- `zero { ?za,}' +[^:]*:[0-9]+: Error: unexpected character `.*' in element size at operand 1 -- `zero { ?za. ?}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero { ?za- ?}' +[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?za_ ?}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero { ?za# ?}' +[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?zaX ?}' +[^:]*:[0-9]+: Error: missing ZA tile size at operand 1 -- `zero { ?za0 ?}' +[^:]*:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?zax ?}' +[^:]*:[0-9]+: Error: expected '}' at operand 1 -- `zero { ?za{ ?}' +[^:]*:[0-9]+: Error: unexpected characters following instruction at operand 1 -- `zero { ?za} ?}' +[^:]*:[0-9]+: Error: ZA tile masks do not operate at .Q granularity at operand 1 -- `zero { ?za0\.q ?}' +[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.b ?}' +[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.h ?}' +[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.s ?}' +[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.d ?}' +[^:]*:[0-9]+: Error: ZA should not have a size suffix at operand 1 -- `zero { ?za\.q ?}' +[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero { ?za.2d ?}' +[^:]*:[0-9]+: Error: unexpected character `2' in element size at operand 1 -- `zero { ?za0.2d ?}' +[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero { ?za0h\.b ?}' +[^:]*:[0-9]+: Error: expected an unsuffixed ZA tile at operand 1 -- `zero { ?za0v\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme-5-illegal.l b/gas/testsuite/gas/aarch64/sme-5-illegal.l index b0736e0..a289c05 100644 --- a/gas/testsuite/gas/aarch64/sme-5-illegal.l +++ b/gas/testsuite/gas/aarch64/sme-5-illegal.l @@ -1,10 +1,10 @@ [^:]*: Assembler messages: [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `ld1b {za0h.b\[w11,0\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `ld1h {za0h.h\[w16,0\]},p0/z,\[x0\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0v.h\[w12,0\]},p0/z,\[x0,x0,lsl#3\]' -[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `ld1w {za3v.s\[w15,3\]},p7/z,\[sp,lsl#2\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[sp,x0,lsl#12\]' -[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x0,lsl#2\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0v.h\[w12,0\]},p0/z,\[x0,x0,lsl ?#3\]' +[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `ld1w {za3v.s\[w15,3\]},p7/z,\[sp,lsl ?#2\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[sp,x0,lsl ?#12\]' +[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x0,lsl ?#2\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1b {za1h.b\[w12,0\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1b {za1v.b\[w12,0\]},p0/z,\[sp\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1b {za1h.b\[w12,0\]},p0/z,\[sp,x0\]' @@ -13,42 +13,42 @@ [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `ld1b {za0v.b\[w15,16\]},p7/z,\[sp,x17\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2v.h\[w12,0\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2h.h\[w12,0\]},p0/z,\[sp\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2v.h\[w12,0\]},p0/z,\[x0,x0,lsl#1\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2h.h\[w12,0\]},p0/z,\[sp,x0,lsl#1\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2v.h\[w12,0\]},p0/z,\[x0,x0,lsl ?#1\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1h {za2h.h\[w12,0\]},p0/z,\[sp,x0,lsl ?#1\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1v.h\[w15,8\]},p7/z,\[x17\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1h.h\[w15,8\]},p7/z,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1v.h\[w15,8\]},p7/z,\[x0,x17,lsl#1\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1h.h\[w15,8\]},p7/z,\[sp,x17,lsl#1\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1v.h\[w15,8\]},p7/z,\[x0,x17,lsl ?#1\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `ld1h {za1h.h\[w15,8\]},p7/z,\[sp,x17,lsl ?#1\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4h.s\[w12,0\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4v.s\[w12,0\]},p0/z,\[sp\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4h.s\[w12,0\]},p0/z,\[x0,x0,lsl#2\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4v.s\[w12,0\]},p0/z,\[sp,x0,lsl#2\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4h.s\[w12,0\]},p0/z,\[x0,x0,lsl ?#2\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1w {za4v.s\[w12,0\]},p0/z,\[sp,x0,lsl ?#2\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3h.s\[w15,4\]},p7/z,\[x17\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3v.s\[w15,4\]},p7/z,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3h.s\[w15,4\]},p7/z,\[x0,x17,lsl#2\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3v.s\[w15,4\]},p7/z,\[sp,x17,lsl#2\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3h.s\[w15,4\]},p7/z,\[x0,x17,lsl ?#2\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `ld1w {za3v.s\[w15,4\]},p7/z,\[sp,x17,lsl ?#2\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8v.d\[w12,0\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8h.d\[w12,0\]},p0/z,\[sp\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8v.d\[w12,0\]},p0/z,\[x0,x0,lsl#3\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8h.d\[w12,0\]},p0/z,\[sp,x0,lsl#3\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8v.d\[w12,0\]},p0/z,\[x0,x0,lsl ?#3\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `ld1d {za8h.d\[w12,0\]},p0/z,\[sp,x0,lsl ?#3\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7v.d\[w15,2\]},p7/z,\[x17\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7h.d\[w15,2\]},p7/z,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7v.d\[w15,2\]},p7/z,\[x0,x17,lsl#3\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7h.d\[w15,2\]},p7/z,\[sp,x17,lsl#3\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7v.d\[w15,2\]},p7/z,\[x0,x17,lsl ?#3\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `ld1d {za7h.d\[w15,2\]},p7/z,\[sp,x17,lsl ?#3\]' [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16v.q\[w12\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16h.q\[w12\]},p0/z,\[sp\]' -[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16v.q\[w12\]},p0/z,\[x0,x0,lsl#4\]' -[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16h.q\[w12\]},p0/z,\[sp,x0,lsl#4\]' +[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16v.q\[w12\]},p0/z,\[x0,x0,lsl ?#4\]' +[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1q {za16h.q\[w12\]},p0/z,\[sp,x0,lsl ?#4\]' [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15v.q\[w15,1\]},p7/z,\[x17\]' [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15h.q\[w15,1\]},p7/z,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15v.q\[w15,1\]},p7/z,\[x0,x17,lsl#4\]' -[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15h.q\[w15,1\]},p7/z,\[sp,x17,lsl#4\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {za0h.b\[w12,0\]},p0/z,\[x0,x1,lsl#1\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0h.h\[w12,0\]},p0/z,\[x0,x1,lsl#2\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {za3v.s\[w12,3\]},p7/z,\[x0,x1,lsl#3\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[x0,x1,lsl#4\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1q {za0v.q\[w12,0\]},p0/z,\[x0,x1,lsl#1\]' -[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x1,lsl#1\]' +[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15v.q\[w15,1\]},p7/z,\[x0,x17,lsl ?#4\]' +[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `ld1q {za15h.q\[w15,1\]},p7/z,\[sp,x17,lsl ?#4\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {za0h.b\[w12,0\]},p0/z,\[x0,x1,lsl ?#1\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {za0h.h\[w12,0\]},p0/z,\[x0,x1,lsl ?#2\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {za3v.s\[w12,3\]},p7/z,\[x0,x1,lsl ?#3\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {za0h.d\[w12,0\]},p0/z,\[x0,x1,lsl ?#4\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1q {za0v.q\[w12,0\]},p0/z,\[x0,x1,lsl ?#1\]' +[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `ld1q {za0v.q\[w12\]},p0/z,\[x0,x1,lsl ?#1\]' [^:]*:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `ld1b {za0.b\[w12,0\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `ld1b {za.b\[w12,0\]},p0/z,\[x0\]' [^:]*:[0-9]+: Error: missing braces at operand 1 -- `ld1b za0h.b\[w12,0\],p0/z,\[x0\]' diff --git a/gas/testsuite/gas/aarch64/sme-6-illegal.l b/gas/testsuite/gas/aarch64/sme-6-illegal.l index 10c2a51..7301ddd 100644 --- a/gas/testsuite/gas/aarch64/sme-6-illegal.l +++ b/gas/testsuite/gas/aarch64/sme-6-illegal.l @@ -1,10 +1,10 @@ [^:]*: Assembler messages: [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `st1b {za0h.b\[w11,0\]},p0,\[x0\]' [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `st1h {za0h.h\[w16,0\]},p0,\[x0\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1h {za0v.h\[w12,0\]},p0,\[x0,x0,lsl#3\]' -[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `st1w {za3v.s\[w15,3\]},p7,\[sp,lsl#2\]' -[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1d {za0h.d\[w12,0\]},p0,\[sp,x0,lsl#12\]' -[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `st1q {za0v.q\[w12\]},p0,\[x0,x0,lsl#2\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1h {za0v.h\[w12,0\]},p0,\[x0,x0,lsl ?#3\]' +[^:]*:[0-9]+: Error: '\]' expected at operand 3 -- `st1w {za3v.s\[w15,3\]},p7,\[sp,lsl ?#2\]' +[^:]*:[0-9]+: Error: invalid addressing mode at operand 3 -- `st1d {za0h.d\[w12,0\]},p0,\[sp,x0,lsl ?#12\]' +[^:]*:[0-9]+: Error: missing immediate offset at operand 1 -- `st1q {za0v.q\[w12\]},p0,\[x0,x0,lsl ?#2\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1b {za1h.b\[w12,0\]},p0,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1b {za1v.b\[w12,0\]},p0,\[sp\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1b {za1h.b\[w12,0\]},p0,\[sp,x0\]' @@ -13,36 +13,36 @@ [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `st1b {za0v.b\[w15,16\]},p7,\[sp,x17\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2v.h\[w12,0\]},p0,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2h.h\[w12,0\]},p0,\[sp\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2v.h\[w12,0\]},p0,\[x0,x0,lsl#1\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2h.h\[w12,0\]},p0,\[sp,x0,lsl#1\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2v.h\[w12,0\]},p0,\[x0,x0,lsl ?#1\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1h {za2h.h\[w12,0\]},p0,\[sp,x0,lsl ?#1\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1v.h\[w15,8\]},p7,\[x17\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1h.h\[w15,8\]},p7,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1v.h\[w15,8\]},p7,\[x0,x17,lsl#1\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1h.h\[w15,8\]},p7,\[sp,x17,lsl#1\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1v.h\[w15,8\]},p7,\[x0,x17,lsl ?#1\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `st1h {za1h.h\[w15,8\]},p7,\[sp,x17,lsl ?#1\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4h.s\[w12,0\]},p0,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4v.s\[w12,0\]},p0,\[sp\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4h.s\[w12,0\]},p0,\[x0,x0,lsl#2\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4v.s\[w12,0\]},p0,\[sp,x0,lsl#2\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4h.s\[w12,0\]},p0,\[x0,x0,lsl ?#2\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1w {za4v.s\[w12,0\]},p0,\[sp,x0,lsl ?#2\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3h.s\[w15,4\]},p7,\[x17\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3v.s\[w15,4\]},p7,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3h.s\[w15,4\]},p7,\[x0,x17,lsl#2\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3v.s\[w15,4\]},p7,\[sp,x17,lsl#2\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3h.s\[w15,4\]},p7,\[x0,x17,lsl ?#2\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 3 at operand 1 -- `st1w {za3v.s\[w15,4\]},p7,\[sp,x17,lsl ?#2\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8v.d\[w12,0\]},p0,\[x0\]' [^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8h.d\[w12,0\]},p0,\[sp\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8v.d\[w12,0\]},p0,\[x0,x0,lsl#3\]' -[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8h.d\[w12,0\]},p0,\[sp,x0,lsl#3\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8v.d\[w12,0\]},p0,\[x0,x0,lsl ?#3\]' +[^:]*:[0-9]+: Error: ZA tile number out of range at operand 1 -- `st1d {za8h.d\[w12,0\]},p0,\[sp,x0,lsl ?#3\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7v.d\[w15,2\]},p7,\[x17\]' [^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7h.d\[w15,2\]},p7,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7v.d\[w15,2\]},p7,\[x0,x17,lsl#3\]' -[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7h.d\[w15,2\]},p7,\[sp,x17,lsl#3\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7v.d\[w15,2\]},p7,\[x0,x17,lsl ?#3\]' +[^:]*:[0-9]+: Error: immediate offset out of range 0 to 1 at operand 1 -- `st1d {za7h.d\[w15,2\]},p7,\[sp,x17,lsl ?#3\]' [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16v.q\[w12\]},p0,\[x0\]' [^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16h.q\[w12\]},p0,\[sp\]' -[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16v.q\[w12\]},p0,\[x0,x0,lsl#4\]' -[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16h.q\[w12\]},p0,\[sp,x0,lsl#4\]' +[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16v.q\[w12\]},p0,\[x0,x0,lsl ?#4\]' +[^:]*:[0-9]+: Error: expected an SVE vector register or ZA tile slice at operand 1 -- `st1q {za16h.q\[w12\]},p0,\[sp,x0,lsl ?#4\]' [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15v.q\[w15,1\]},p7,\[x17\]' [^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp\]' -[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15v.q\[w15,1\]},p7,\[x0,x17,lsl#4\]' -[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp,x17,lsl#4\]' +[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15v.q\[w15,1\]},p7,\[x0,x17,lsl ?#4\]' +[^:]*:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `st1q {za15h.q\[w15,1\]},p7,\[sp,x17,lsl ?#4\]' [^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `st1b {za0h.b\[w12,0,vgx2\]},p0,\[x0\]' [^:]*:[0-9]+: Error: unexpected vector group size at operand 1 -- `st1b {za0h\.b\[w12,0,vgx4\]},p0,\[x0\]' [^:]*:[0-9]+: Error: invalid vector group size at operand 1 -- `st1b {za0h\.b\[w12,0,vgx8\]},p0,\[x0\]' diff --git a/gas/testsuite/gas/aarch64/sme-7-illegal.l b/gas/testsuite/gas/aarch64/sme-7-illegal.l index 5ab025c..c27e131 100644 --- a/gas/testsuite/gas/aarch64/sme-7-illegal.l +++ b/gas/testsuite/gas/aarch64/sme-7-illegal.l @@ -6,10 +6,10 @@ [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `ldr za\[w13,21\],\[x17,#21,mul vl\]' [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `ldr za\[w15,32\],\[x17,#15,mul vl\]' [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `ldr za\[w16,15\],\[sp,#15,mul vl\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w12,0\],\[x0,#0,mul#1\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w13,0\],\[sp,#0,mul#2\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w14,9\],\[x17,#9,mul#3\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w15,15\],\[sp,#15,mul#4\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w12,0\],\[x0,#0,mul ?#1\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w13,0\],\[sp,#0,mul ?#2\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w14,9\],\[x17,#9,mul ?#3\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `ldr za\[w15,15\],\[sp,#15,mul ?#4\]' [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `str za\[w11,0\],\[x0\]' [^:]*:[0-9]+: Error: invalid addressing mode at operand 2 -- `str za\[w12,1\],\[sp,x0\]' [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `str za\[w12,0\],\[sp,#1,mul vl\]' @@ -17,10 +17,10 @@ [^:]*:[0-9]+: Error: immediate offset out of range 0 to 15 at operand 1 -- `str za\[w13,21\],\[x17,#21,mul vl\]' [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `str za\[w15,32\],\[x17,#15,mul vl\]' [^:]*:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `str za\[w16,15\],\[sp,#15,mul vl\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w12,0\],\[x0,#0,mul#1\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w13,0\],\[sp,#0,mul#2\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w14,9\],\[x17,#9,mul#3\]' -[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w15,15\],\[sp,#15,mul#4\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w12,0\],\[x0,#0,mul ?#1\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w13,0\],\[sp,#0,mul ?#2\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w14,9\],\[x17,#9,mul ?#3\]' +[^:]*:[0-9]+: Error: only 'MUL VL' is permitted at operand 2 -- `str za\[w15,15\],\[sp,#15,mul ?#4\]' [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `ldr za\[w13,13\],\[x17,#23,mul vl\]' [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `str za\[w13,13\],\[x17,#23,mul vl\]' [^:]*:[0-9]+: Error: operand 2 must have the same immediate value as operand 1 -- `ldr za\[w13,23\],\[x17,#13,mul vl\]' diff --git a/gas/testsuite/gas/aarch64/sme2-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-1-invalid.l index d8d2d77..08c30c5 100644 --- a/gas/testsuite/gas/aarch64/sme2-1-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-1-invalid.l @@ -1,327 +1,327 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `mov 0,za\.b\[w8,0\]' -[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mov {z0\.b-z1\.b},0' -[^ :]+:[0-9]+: Error: operand mismatch -- `mov {z0\.d-z1\.d},za\.q\[w8,0\]' +[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},0' +[^ :]+:[0-9]+: Error: operand mismatch -- `mov { ?z0\.d ?- ?z1\.d ?},za\.q\[w8,0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: mov {z0\.d-z1\.d}, za\.d\[w8, 0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: mov {z0\.b-z1\.b}, za\.b\[w8, 0\] [^ :]+:[0-9]+: Info: mov {z0\.h-z1\.h}, za\.h\[w8, 0\] [^ :]+:[0-9]+: Info: mov {z0\.s-z1\.s}, za\.s\[w8, 0\] -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w7,0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w12,0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w8,-1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z1\.d},za\.d\[w8,8\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `mov {z0\.d-z3\.d},za\.q\[w8,0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z2\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w7,0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w12,0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,-1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `mov { ?z0\.d ?- ?z3\.d ?},za\.q\[w8,0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: mov {z0\.d-z3\.d}, za\.d\[w8, 0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: mov {z0\.b-z3\.b}, za\.b\[w8, 0\] [^ :]+:[0-9]+: Info: mov {z0\.h-z3\.h}, za\.h\[w8, 0\] [^ :]+:[0-9]+: Info: mov {z0\.s-z3\.s}, za\.s\[w8, 0\] -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z4\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.d-z5\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.d-z6\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w7,0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w12,0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w8,-1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov {z0\.d-z3\.d},za\.d\[w8,8\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.b-z2\.b},za0h\.b\[w8,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z1\.b},za1h\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z1\.b},za1v\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w11,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w16,0:1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,-2:-1\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,1:2\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,15:16\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,16:17\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.b-z1\.b},za0\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.h-z2\.h},za0h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z1\.h},za2h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z1\.h},za2v\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w11,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w16,0:1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,-2:-1\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,1:2\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,7:8\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,8:9\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.h-z1\.h},za0\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.s-z2\.s},za0h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z1\.s},za4h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z1\.s},za4v\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w11,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w16,0:1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,-2:-1\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,1:2\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,3:4\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,4:5\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.s-z1\.s},za0\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za0h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z1\.d},za8h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z1\.d},za8v\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w11,0:1\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w16,0:1\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,-2:-1\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,1:2\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,2:3\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.d-z1\.d},za0\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.b-z4\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.b-z5\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.b-z6\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z3\.b},za1h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.b-z3\.b},za1v\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w11,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w16,0:3\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,-4:-1\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,1:4\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,2:5\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,3:6\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,13:16\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,14:17\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,15:18\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,16:19\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.b-z3\.b},za0\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.h-z2\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.h-z5\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.h-z6\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z3\.h},za2h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.h-z3\.h},za2v\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w11,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w16,0:3\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,-4:-1\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,1:2\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,5:8\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,6:9\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,7:10\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,8:11\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.h-z3\.h},za0\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.s-z2\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.s-z5\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.s-z6\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z3\.s},za4h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.s-z3\.s},za4v\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w11,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w16,0:3\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,-4:-1\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,1:4\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,2:5\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,3:6\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,4:7\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.s-z3\.s},za0\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z1\.d-z2\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z2\.d-z5\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov {z3\.d-z6\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z3\.d},za8h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov {z0\.d-z3\.d},za8v\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w11,0:3\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w16,0:3\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,-4:-1\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,1:4\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,2:5\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,3:6\]' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,4:7\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3,vgx2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3,vgx4\]' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov {z0\.d-z3\.d},za0\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z4\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.d ?- ?z5\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.d ?- ?z6\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w7,0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w12,0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,-1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,8\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.b ?- ?z2\.b ?},za0h\.b\[w8,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za1h\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za1v\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w11,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w16,0:1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,-2:-1\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,1:2\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,15:16\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,16:17\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.b ?- ?z1\.b ?},za0\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.h ?- ?z2\.h ?},za0h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za2h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za2v\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w11,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w16,0:1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,-2:-1\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,1:2\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,7:8\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,8:9\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.h ?- ?z1\.h ?},za0\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.s ?- ?z2\.s ?},za0h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za4h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za4v\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w11,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w16,0:1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,-2:-1\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,1:2\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,3:4\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,4:5\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.s ?- ?z1\.s ?},za0\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z2\.d ?},za0h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za8h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za8v\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w11,0:1\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w16,0:1\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,-2:-1\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,1:2\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,2:3\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.d ?- ?z1\.d ?},za0\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.b ?- ?z4\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.b ?- ?z5\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.b ?- ?z6\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za1h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za1v\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w11,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w16,0:3\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,-4:-1\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,1:4\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,2:5\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,3:6\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,13:16\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,14:17\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,15:18\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,16:19\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.b ?- ?z3\.b ?},za0\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.h ?- ?z2\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.h ?- ?z5\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.h ?- ?z6\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za2h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za2v\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w11,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w16,0:3\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,-4:-1\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,1:2\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,5:8\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,6:9\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,7:10\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,8:11\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.h ?- ?z3\.h ?},za0\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.s ?- ?z2\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.s ?- ?z5\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.s ?- ?z6\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za4h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za4v\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w11,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w16,0:3\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,-4:-1\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,1:4\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,2:5\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,3:6\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,4:7\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.s ?- ?z3\.s ?},za0\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z1\.d ?- ?z2\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z2\.d ?- ?z5\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `mov { ?z3\.d ?- ?z6\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za8h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za8v\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w11,0:3\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w16,0:3\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,-4:-1\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,1:4\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,2:5\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,3:6\]' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,4:7\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3,vgx2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3,vgx4\]' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 2 -- `mov { ?z0\.d ?- ?z3\.d ?},za0\.d\[w12,0:3\]' [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `mova 0,za\.b\[w8,0\]' -[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mova {z0\.b-z1\.b},0' -[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{z0\.q-z1\.q}' +[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `mova { ?z0\.b ?- ?z1\.b ?},0' +[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{ ?z0\.q ?- ?z1\.q ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: mova za\.b\[w8, 0\], {z0\.b-z1\.b} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: mova za\.h\[w8, 0\], {z0\.h-z1\.h} [^ :]+:[0-9]+: Info: mova za\.s\[w8, 0\], {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: mova za\.d\[w8, 0\], {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z1\.d-z2\.d}' -[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{z0\.q-z3\.q}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `mova za\.q\[w8,0\],{ ?z0\.q ?- ?z3\.q ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: mova za\.b\[w8, 0\], {z0\.b-z3\.b} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: mova za\.h\[w8, 0\], {z0\.h-z3\.h} [^ :]+:[0-9]+: Info: mova za\.s\[w8, 0\], {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: mova za\.d\[w8, 0\], {z0\.d-z3\.d} -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z1\.d-z4\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z2\.d-z5\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{z3\.d-z6\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w8,0:1\],{z1\.b-z2\.b}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-2:-1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:2\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:16\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:17\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx2\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx4\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:1\],{z1\.h-z2\.h}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-2:-1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:8\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:9\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx2\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx4\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:1\],{z1\.s-z2\.s}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-2:-1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:2\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:4\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:5\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx2\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx4\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:1\],{z1\.d-z2\.d}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-2:-1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:2\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:3\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx2\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx4\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z1\.b-z4\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z2\.b-z5\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{z3\.b-z6\.b}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-4:-1\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:4\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,2:5\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,3:6\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,13:16\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,14:17\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:18\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:19\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx2\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx4\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{z1\.h-z2\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{z2\.h-z5\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{z3\.h-z6\.h}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-4:-1\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,5:8\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,6:9\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:10\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:11\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx2\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx4\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{z1\.s-z2\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{z2\.s-z5\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{z3\.s-z6\.s}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-4:-1\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:4\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,2:5\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:6\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:7\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx2\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx4\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{z1\.d-z2\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{z2\.d-z5\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{z3\.d-z6\.d}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-4:-1\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:4\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:5\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,3:6\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,4:7\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx2\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx4\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:3\],{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `mova za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `mova za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w8,0:1\],{ ?z1\.b ?- ?z2\.b ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-2:-1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:2\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:16\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:17\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx2\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1,vgx4\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:1\],{ ?z1\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-2:-1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:8\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:9\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:1\],{ ?z1\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-2:-1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:2\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:4\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:5\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx2\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1,vgx4\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:1\],{ ?z1\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-2:-1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:2\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:3\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx2\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1,vgx4\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{ ?z1\.b ?- ?z4\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{ ?z2\.b ?- ?z5\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.b\[w12,0:3\],{ ?z3\.b ?- ?z6\.b ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1h\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za1v\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.b\[w16,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,-4:-1\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,1:4\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,2:5\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,3:6\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.b\[w12,13:16\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,14:17\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,15:18\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `mova za0h\.b\[w12,16:19\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.b\[w12,0:1\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:2\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.b\[w12,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3\],{ ?z1\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{ ?z2\.h ?- ?z5\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.h\[w12,0:3\],{ ?z3\.h ?- ?z6\.h ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za2v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.h\[w16,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,-4:-1\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,1:2\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.h\[w12,5:8\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,6:9\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,7:10\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `mova za0h\.h\[w12,8:11\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.h\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:2\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.h\[w12,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3\],{ ?z1\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{ ?z2\.s ?- ?z5\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.s\[w12,0:3\],{ ?z3\.s ?- ?z6\.s ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za4v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w11,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.s\[w16,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,-4:-1\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `mova za0h\.s\[w12,1:4\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,2:5\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,3:6\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 2 at operand 1 -- `mova za0h\.s\[w12,4:7\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.s\[w12,0:1\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:2\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx2\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.s\[w12,0:3,vgx4\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3\],{ ?z1\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{ ?z2\.d ?- ?z5\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `mova za0h\.d\[w12,0:3\],{ ?z3\.d ?- ?z6\.d ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: ZA tile number out of range at operand 1 -- `mova za8v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w11,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w12-w15 at operand 1 -- `mova za0h\.d\[w16,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,-4:-1\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,1:4\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,2:5\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,3:6\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset must be 0 at operand 1 -- `mova za0h\.d\[w12,4:7\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `mova za0h\.d\[w12,0:1\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:2\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx2\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `mova za0h\.d\[w12,0:3,vgx4\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: missing horizontal or vertical suffix at operand 1 -- `mova za0\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-1-noarch.l index 9d9fd08..09f5a3c 100644 --- a/gas/testsuite/gas/aarch64/sme2-1-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-1-noarch.l @@ -1,289 +1,289 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za\.b\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za\.h\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za\.s\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.d-z31\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w11,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za\.d\[w8,7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za\.b\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za\.h\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za\.s\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.d-z31\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w11,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za\.d\[w8,7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.b-z31\.b},za0h\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0v\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z1\.b},za0h\.b\[w12,14:15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z8\.b-z9\.b},za0h\.b\[w14,6:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.h-z31\.h},za0h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0v\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za1h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za1v\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z1\.h},za0h\.h\[w12,6:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z10\.h-z11\.h},za0h\.h\[w13,2:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.s-z31\.s},za0h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0v\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za3h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za3v\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z1\.s},za0h\.s\[w12,2:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z18\.s-z19\.s},za2h\.s\[w14,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z30\.d-z31\.d},za0h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0v\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za7h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za7v\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z1\.d},za0h\.d\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z22\.d-z23\.d},za6h\.d\[w13,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.b-z31\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0v\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.b-z3\.b},za0h\.b\[w12,12:15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z12\.b-z15\.b},za0h\.b\[w14,8:11\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.h-z31\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0v\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za1h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za1v\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.h-z3\.h},za0h\.h\[w12,4:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z16\.h-z19\.h},za0h\.h\[w13,4:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.s-z31\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0v\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za3h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za3v\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.s-z3\.s},za0h\.s\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z20\.s-z23\.s},za2h\.s\[w13,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z28\.d-z31\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0v\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za7h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za7v\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z0\.d-z3\.d},za0h\.d\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov {z24\.d-z27\.d},za5h\.d\[w13,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w9,5\],{z2\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w10,1\],{z20\.d-z23\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,14:15\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,6:7\],{z8\.b-z9\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,6:7\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,2:3\],{z10\.h-z11\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,2:3\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w14,0:1\],{z18\.s-z19\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za6h\.d\[w13,0:1\],{z22\.d-z23\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,12:15\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,8:11\],{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,4:7\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,4:7\],{z16\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w13,0:3\],{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mov za5h\.d\[w13,0:3\],{z24\.d-z27\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za\.b\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za\.h\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za\.s\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.d-z31\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w11,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za\.d\[w8,7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za\.b\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za\.h\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za\.s\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.d-z31\.d},za\.d\[w8,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w11,0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za\.d\[w8,7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.b-z31\.b},za0h\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0v\.b\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z1\.b},za0h\.b\[w12,14:15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z8\.b-z9\.b},za0h\.b\[w14,6:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.h-z31\.h},za0h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0v\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za1h\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za1v\.h\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z1\.h},za0h\.h\[w12,6:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z10\.h-z11\.h},za0h\.h\[w13,2:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.s-z31\.s},za0h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0v\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za3h\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za3v\.s\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z1\.s},za0h\.s\[w12,2:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z18\.s-z19\.s},za2h\.s\[w14,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z30\.d-z31\.d},za0h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0v\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za7h\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za7v\.d\[w12,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z1\.d},za0h\.d\[w15,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z22\.d-z23\.d},za6h\.d\[w13,0:1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.b-z31\.b},za0h\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0v\.b\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.b-z3\.b},za0h\.b\[w12,12:15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z12\.b-z15\.b},za0h\.b\[w14,8:11\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.h-z31\.h},za0h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0v\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za1h\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za1v\.h\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.h-z3\.h},za0h\.h\[w12,4:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z16\.h-z19\.h},za0h\.h\[w13,4:7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.s-z31\.s},za0h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0v\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za3h\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za3v\.s\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.s-z3\.s},za0h\.s\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z20\.s-z23\.s},za2h\.s\[w13,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z28\.d-z31\.d},za0h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0v\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za7h\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za7v\.d\[w12,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z0\.d-z3\.d},za0h\.d\[w15,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova {z24\.d-z27\.d},za5h\.d\[w13,0:3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w9,5\],{z2\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w10,1\],{z20\.d-z23\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:1\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,14:15\],{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,6:7\],{z8\.b-z9\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:1\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,6:7\],{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,2:3\],{z10\.h-z11\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,2:3\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w14,0:1\],{z18\.s-z19\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za6h\.d\[w13,0:1\],{z22\.d-z23\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:3\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,12:15\],{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,8:11\],{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:3\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,4:7\],{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,4:7\],{z16\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:3\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w13,0:3\],{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:3\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `mova za5h\.d\[w13,0:3\],{z24\.d-z27\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za\.b\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za\.h\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za\.s\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.d ?- ?z31\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w11,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za\.b\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za\.h\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za\.s\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.d ?- ?z31\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w11,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.b ?- ?z31\.b ?},za0h\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0v\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,14:15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z8\.b ?- ?z9\.b ?},za0h\.b\[w14,6:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.h ?- ?z31\.h ?},za0h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0v\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za1h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za1v\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,6:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z10\.h ?- ?z11\.h ?},za0h\.h\[w13,2:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.s ?- ?z31\.s ?},za0h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0v\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za3h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za3v\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,2:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z18\.s ?- ?z19\.s ?},za2h\.s\[w14,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z30\.d ?- ?z31\.d ?},za0h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za0v\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za7h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za7v\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z22\.d ?- ?z23\.d ?},za6h\.d\[w13,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.b ?- ?z31\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0v\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,12:15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z12\.b ?- ?z15\.b ?},za0h\.b\[w14,8:11\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.h ?- ?z31\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0v\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za1h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za1v\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,4:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z16\.h ?- ?z19\.h ?},za0h\.h\[w13,4:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.s ?- ?z31\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za0v\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za3h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za3v\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z20\.s ?- ?z23\.s ?},za2h\.s\[w13,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z28\.d ?- ?z31\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za0v\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za7h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za7v\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov { ?z24\.d ?- ?z27\.d ?},za5h\.d\[w13,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w9,5\],{ ?z2\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.b\[w8,0\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.h\[w8,0\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za\.d\[w10,1\],{ ?z20\.d ?- ?z23\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,14:15\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:1\],{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,6:7\],{ ?z8\.b ?- ?z9\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,6:7\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:1\],{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,2:3\],{ ?z10\.h ?- ?z11\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,2:3\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:1\],{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w14,0:1\],{ ?z18\.s ?- ?z19\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:1\],{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za6h\.d\[w13,0:1\],{ ?z22\.d ?- ?z23\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w15,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,12:15\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w12,0:3\],{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.b\[w14,8:11\],{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za1h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za1v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w15,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,4:7\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w12,0:3\],{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.h\[w13,4:7\],{ ?z16\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za3h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za3v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w15,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.s\[w12,0:3\],{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za2h\.s\[w13,0:3\],{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za7h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za7v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w15,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za0h\.d\[w12,0:3\],{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mov za5h\.d\[w13,0:3\],{ ?z24\.d ?- ?z27\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za\.b\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za\.h\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za\.s\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.d ?- ?z31\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za\.d\[w11,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za\.d\[w8,7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za\.b\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za\.h\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za\.s\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.d ?- ?z31\.d ?},za\.d\[w8,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za\.d\[w11,0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za\.d\[w8,7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.b ?- ?z31\.b ?},za0h\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0v\.b\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z1\.b ?},za0h\.b\[w12,14:15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z8\.b ?- ?z9\.b ?},za0h\.b\[w14,6:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.h ?- ?z31\.h ?},za0h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0v\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za1h\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za1v\.h\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z1\.h ?},za0h\.h\[w12,6:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z10\.h ?- ?z11\.h ?},za0h\.h\[w13,2:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.s ?- ?z31\.s ?},za0h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0v\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za3h\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za3v\.s\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z1\.s ?},za0h\.s\[w12,2:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z18\.s ?- ?z19\.s ?},za2h\.s\[w14,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z30\.d ?- ?z31\.d ?},za0h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za0v\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za7h\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za7v\.d\[w12,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z1\.d ?},za0h\.d\[w15,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z22\.d ?- ?z23\.d ?},za6h\.d\[w13,0:1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.b ?- ?z31\.b ?},za0h\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0v\.b\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.b ?- ?z3\.b ?},za0h\.b\[w12,12:15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z12\.b ?- ?z15\.b ?},za0h\.b\[w14,8:11\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.h ?- ?z31\.h ?},za0h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0v\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za1h\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za1v\.h\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.h ?- ?z3\.h ?},za0h\.h\[w12,4:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z16\.h ?- ?z19\.h ?},za0h\.h\[w13,4:7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.s ?- ?z31\.s ?},za0h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za0v\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za3h\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za3v\.s\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.s ?- ?z3\.s ?},za0h\.s\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z20\.s ?- ?z23\.s ?},za2h\.s\[w13,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z28\.d ?- ?z31\.d ?},za0h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za0v\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za7h\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za7v\.d\[w12,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z0\.d ?- ?z3\.d ?},za0h\.d\[w15,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova { ?z24\.d ?- ?z27\.d ?},za5h\.d\[w13,0:3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w9,5\],{ ?z2\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.b\[w8,0\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.h\[w8,0\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za\.d\[w10,1\],{ ?z20\.d ?- ?z23\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:1\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,14:15\],{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:1\],{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,6:7\],{ ?z8\.b ?- ?z9\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:1\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,6:7\],{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:1\],{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,2:3\],{ ?z10\.h ?- ?z11\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,2:3\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:1\],{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w14,0:1\],{ ?z18\.s ?- ?z19\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:1\],{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za6h\.d\[w13,0:1\],{ ?z22\.d ?- ?z23\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.b\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w15,0:3\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,12:15\],{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w12,0:3\],{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.b\[w14,8:11\],{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za1h\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za1v\.h\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w15,0:3\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,4:7\],{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w12,0:3\],{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.h\[w13,4:7\],{ ?z16\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za3h\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za3v\.s\[w12,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w15,0:3\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.s\[w12,0:3\],{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za2h\.s\[w13,0:3\],{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za7h\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za7v\.d\[w12,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w15,0:3\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za0h\.d\[w12,0:3\],{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `mova za5h\.d\[w13,0:3\],{ ?z24\.d ?- ?z27\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-10-invalid.l b/gas/testsuite/gas/aarch64/sme2-10-invalid.l index d0309ba..1e7784f 100644 --- a/gas/testsuite/gas/aarch64/sme2-10-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-10-invalid.l @@ -1,67 +1,67 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fmax 0,{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmax {z0\.h-z1\.h},0,z0\.h' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},0' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fmax 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmax { ?z0\.h ?- ?z1\.h ?},0,z0\.h' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h,z8\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z16\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z31\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h,z8\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax { ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z2\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z2\.h ?},{ ?z1\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z31\.h,z0\.h ?},{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z16\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z31\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s [^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z2\.h-z5\.h},z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h,z1\.h,z2\.h},{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z16\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z31\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z2\.h ?- ?z5\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z4\.h ?},{ ?z1\.h ?- ?z4\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z2\.h ?- ?z5\.h ?},{ ?z2\.h ?- ?z5\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z3\.h ?- ?z6\.h ?},{ ?z3\.h ?- ?z6\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z31\.h,z0\.h,z1\.h,z2\.h ?},{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z16\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z31\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmax {z0\.h-z1\.h}, {z0\.h-z1\.h}, {z0\.h-z1\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmax {z0\.s-z1\.s}, {z0\.s-z1\.s}, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: fmax {z0\.d-z1\.d}, {z0\.d-z1\.d}, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z2\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax {z0\.h-z2\.h},{z0\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z1\.h},{z2\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z2\.h},{z1\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z1\.h-z2\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z31\.h,z0\.h},{z31\.h,z0\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z31\.h,z0\.h}' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fmax { ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z2\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z2\.h ?},{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z1\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z31\.h,z0\.h ?},{ ?z31\.h,z0\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmax {z0\.h-z3\.h}, {z0\.h-z3\.h}, {z0\.h-z3\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmax {z0\.s-z3\.s}, {z0\.s-z3\.s}, {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: fmax {z0\.d-z3\.d}, {z0\.d-z3\.d}, {z0\.d-z3\.d} -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z0\.h-z2\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z2\.h}' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax {z0\.h-z3\.h},{z4\.h-z7\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z1\.h-z4\.h},{z1\.h-z4\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z2\.h-z5\.h},{z2\.h-z5\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax {z3\.h-z6\.h},{z3\.h-z6\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z1\.h-z4\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z2\.h-z5\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z3\.h-z6\.h}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z4\.h ?- ?z7\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z1\.h ?- ?z4\.h ?},{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z2\.h ?- ?z5\.h ?},{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fmax { ?z3\.h ?- ?z6\.h ?},{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z1\.h ?- ?z4\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z2\.h ?- ?z5\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z3\.h ?- ?z6\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-10-noarch.l b/gas/testsuite/gas/aarch64/sme2-10-noarch.l index 9320767..58a40f0 100644 --- a/gas/testsuite/gas/aarch64/sme2-10-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-10-noarch.l @@ -1,641 +1,641 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fminnm {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `smin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `srshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umax {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `umin {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z2\.b-z3\.b},{z2\.b-z3\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z6\.h-z7\.h},{z6\.h-z7\.h},z6\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.s-z19\.s},{z18\.s-z19\.s},z5\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z22\.d-z23\.d},{z22\.d-z23\.d},z8\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.b-z7\.b},{z4\.b-z7\.b},z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.h-z15\.h},{z12\.h-z15\.h},z12\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.s-z11\.s},{z8\.s-z11\.s},z7\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.d-z27\.d},{z24\.d-z27\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.b-z31\.b},{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z1\.b},{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z14\.b-z15\.b},{z14\.b-z15\.b},{z20\.b-z21\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.h-z31\.h},{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z1\.h},{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z18\.h-z19\.h},{z18\.h-z19\.h},{z26\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.s-z31\.s},{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z1\.s},{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z4\.s-z5\.s},{z4\.s-z5\.s},{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z30\.d-z31\.d},{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z1\.d},{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z29\.d},{z28\.d-z29\.d},{z8\.d-z9\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.b-z31\.b},{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.b-z3\.b},{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z8\.b-z11\.b},{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.h-z31\.h},{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.h-z3\.h},{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z16\.h-z19\.h},{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.s-z31\.s},{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.s-z3\.s},{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z24\.s-z27\.s},{z24\.s-z27\.s},{z4\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z28\.d-z31\.d},{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z0\.d-z3\.d},{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `urshl {z12\.d-z15\.d},{z12\.d-z15\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmax { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmaxnm { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmin { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fminnm { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smax { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smin { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqdmulh { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `srshl { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umax { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umin { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z2\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z3\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z6\.h ?- ?z7\.h ?},{ ?z6\.h ?- ?z7\.h ?},z6\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z18\.s ?- ?z19\.s ?},{ ?z18\.s ?- ?z19\.s ?},z5\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z22\.d ?- ?z23\.d ?},{ ?z22\.d ?- ?z23\.d ?},z8\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z4\.b ?- ?z7\.b ?},{ ?z4\.b ?- ?z7\.b ?},z7\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z12\.h ?- ?z15\.h ?},{ ?z12\.h ?- ?z15\.h ?},z12\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z8\.s ?- ?z11\.s ?},{ ?z8\.s ?- ?z11\.s ?},z7\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z24\.d ?- ?z27\.d ?},{ ?z24\.d ?- ?z27\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},{ ?z20\.b ?- ?z21\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z26\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z4\.s ?- ?z5\.s ?},{ ?z4\.s ?- ?z5\.s ?},{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},{ ?z8\.d ?- ?z9\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z8\.b ?- ?z11\.b ?},{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z16\.h ?- ?z19\.h ?},{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z4\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `urshl { ?z12\.d ?- ?z15\.d ?},{ ?z12\.d ?- ?z15\.d ?},{ ?z8\.d ?- ?z11\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-11-invalid.l b/gas/testsuite/gas/aarch64/sme2-11-invalid.l index 8044d26..63c3e6d 100644 --- a/gas/testsuite/gas/aarch64/sme2-11-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-11-invalid.l @@ -1,100 +1,100 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fmla 0,{z0\.s-z1\.s},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `fmla 0,{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fmla za\.s\[w8,0\],0,z0\.s\[0\]' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},0' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z2\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[4\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z4\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z2\.s-z5\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z3\.s-z6\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[4\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w0,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.s\[w31,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,1<<63\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z31\.s' -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.s\[w8,0:0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.s\[w8,0:-1\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:100\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s,z1\.s,z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s,z1\.s,z5\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},0' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z16\.s\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[4\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z4\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z16\.s\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[4\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w0,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.s\[w31,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,1<<63\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z31\.s' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.s\[w8,0:0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.s\[w8,0:-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.s\[w8,0:100\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z16\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z16\.s' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z4\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s,z1\.s,z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s,z1\.s,z5\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.s\[w8,0\],{z0-z1},z0\.s' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.s' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},z0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z2\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z15\.s-z16\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z31\.s,z0\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z1\.s-z4\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z2\.s-z5\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{z3\.s-z6\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z15\.s-z18\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z29\.s,z30\.s,z31\.s,z0\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{z0\.s-z2\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z4\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z15\.s ?- ?z16\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z31\.s,z0\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z15\.s ?- ?z18\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z29\.s,z30\.s,z31\.s,z0\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z4\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-11-noarch.l b/gas/testsuite/gas/aarch64/sme2-11-noarch.l index 05c3139..27ebf2a 100644 --- a/gas/testsuite/gas/aarch64/sme2-11-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-11-noarch.l @@ -1,117 +1,117 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGx2\],{Z0\.S-Z1\.S},Z0\.S\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,6\],{z12\.s-z13\.s},z1\.s\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,4\],{z4\.s-z7\.s},z9\.s\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGx2\],{Z0\.S-Z1\.S},Z0\.S\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,6\],{z12\.s-z13\.s},z1\.s\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,4\],{z4\.s-z7\.s},z9\.s\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGx2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,6\],{ ?z12\.s ?- ?z13\.s ?},z1\.s\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,4\],{ ?z4\.s ?- ?z7\.s ?},z9\.s\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGx2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,6\],{ ?z12\.s ?- ?z13\.s ?},z1\.s\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,4\],{ ?z4\.s ?- ?z7\.s ?},z9\.s\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-12-invalid.l b/gas/testsuite/gas/aarch64/sme2-12-invalid.l index a387bb7..1554498 100644 --- a/gas/testsuite/gas/aarch64/sme2-12-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-12-invalid.l @@ -12,7 +12,7 @@ [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[-1\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[8\]' [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s\[0\]' @@ -21,48 +21,48 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h\[0\] -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[8\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[8\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h,z5\.h,z7\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h\[0\] [^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],z0\.h,z0\.h' @@ -75,81 +75,81 @@ [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 14 at operand 1 -- `bfmlal za\.s\[w8,16:17\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `bfmlal za\.s\[w8,0:1,vgx2\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],z0\.h,z16\.h' [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],z0\.s,z0\.s' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h [^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], z0\.h, z0\.h -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z16\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z16\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h,z3\.h,z5\.h,z7\.h},z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z16\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{z0\.s-z3\.s},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfmlal za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a range of two offsets at operand 1 -- `bfmlal za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfmlal za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,16:17\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h,z3\.h,z5\.h,z7\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z16\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\.h\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, z0\.h -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z15\.h-z16\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z31\.h,z0\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z1\.h-z4\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z2\.h-z5\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z3\.h-z6\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z15\.h-z18\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z2\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z4\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z15\.h ?- ?z16\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w7,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfmlal za\.s\[w12,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,-2:-1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 2 at operand 1 -- `bfmlal za\.s\[w8,1:2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 6 at operand 1 -- `bfmlal za\.s\[w8,8:9\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z15\.h ?- ?z18\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z29\.h,z30\.h,z31\.h,z0\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z4\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z1\.h}, {z0\.h-z1\.h} -[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfmlal za\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfmlal za\.s\[w8, 0:1\], {z0\.h-z3\.h}, {z0\.h-z3\.h} diff --git a/gas/testsuite/gas/aarch64/sme2-12-noarch.l b/gas/testsuite/gas/aarch64/sme2-12-noarch.l index 7544d1e..29a7bc6 100644 --- a/gas/testsuite/gas/aarch64/sme2-12-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-12-noarch.l @@ -8,26 +8,26 @@ [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' @@ -36,52 +36,52 @@ [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z1\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z1\.h-z4\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h,z30\.h,z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z1\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z1\.h ?- ?z4\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z29\.h,z30\.h,z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]' @@ -91,26 +91,26 @@ [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' @@ -119,42 +119,42 @@ [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfmlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]' @@ -164,26 +164,26 @@ [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' @@ -192,48 +192,48 @@ [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H\[0\]' @@ -243,26 +243,26 @@ [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1\],Z0\.h,Z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1\],Z0\.H,Z0\.H' @@ -271,48 +271,48 @@ [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.s\[W8,0:1,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl ZA\.S\[W8,0:1,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' @@ -320,63 +320,63 @@ [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,14:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' @@ -384,63 +384,63 @@ [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,14:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' @@ -448,63 +448,63 @@ [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,14:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlal za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h\[0\]' @@ -512,60 +512,60 @@ [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,10:11\],z21\.h,z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z18\.h-z19\.h},z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z24\.h-z27\.h},z14\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[5\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,14:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w9,4:5\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w10,2:3\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,6:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsl za\.s\[w11,4:5\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-13-invalid.l b/gas/testsuite/gas/aarch64/sme2-13-invalid.l index 88a74ac..023de98 100644 --- a/gas/testsuite/gas/aarch64/sme2-13-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-13-invalid.l @@ -16,7 +16,7 @@ [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[-1\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[16\]' [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.h,z0\.h\[0\]' @@ -25,56 +25,56 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.s\[w8,0:3\],z0\.s,z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: smlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[16\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[16\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z2\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z16\.b\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[16\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w7,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.s\[w12,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:1\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.s\[w8,0:2\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,1:4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,2:5\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.s\[w8,3:6\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z4\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z2\.b ?- ?z5\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z3\.b ?- ?z6\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z16\.b\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 15 at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[16\]' [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx2\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.s\[w8,0:3,vgx4\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.s\[w8,16:19\],z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.s\[w8,0:3\],{z0\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z16\.b' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z16\.b' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z2\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z1\.b-z2\.b}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z1\.b-z4\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z2\.b-z5\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{z3\.b-z6\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z1\.b-z4\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z2\.b-z5\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z3\.b-z6\.b}' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],z0\.b,z16\.b' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z16\.b' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z16\.b' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z1\.b ?- ?z2\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.s\[w8,8:11\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z1\.b ?- ?z4\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z2\.b ?- ?z5\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.s\[w8,0:3\],{ ?z3\.b ?- ?z6\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z1\.b ?- ?z4\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z5\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z3\.b ?- ?z6\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-13-noarch.l b/gas/testsuite/gas/aarch64/sme2-13-noarch.l index 3d55aaa..8363d3b 100644 --- a/gas/testsuite/gas/aarch64/sme2-13-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-13-noarch.l @@ -6,62 +6,62 @@ [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,12:15\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z31\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],z0\.b,z15\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],z25\.b,z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' @@ -69,62 +69,62 @@ [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,12:15\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z31\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],z0\.b,z15\.b' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],z25\.b,z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' @@ -132,62 +132,62 @@ [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,12:15\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z31\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],z0\.b,z15\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],z25\.b,z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' @@ -195,59 +195,59 @@ [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,12:15\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z31\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],z0\.b,z15\.b' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],z25\.b,z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-14-invalid.l b/gas/testsuite/gas/aarch64/sme2-14-invalid.l index c398f6b..82f18be 100644 --- a/gas/testsuite/gas/aarch64/sme2-14-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-14-invalid.l @@ -3,5 +3,5 @@ [^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sumlall za\.s\[w8,0:3\],0,z0\.b\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],z0\.b,0' [^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-14-noarch.l b/gas/testsuite/gas/aarch64/sme2-14-noarch.l index 76f5e43..a8570ca 100644 --- a/gas/testsuite/gas/aarch64/sme2-14-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-14-noarch.l @@ -6,42 +6,42 @@ [^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' [^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sumlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b\[0\]' @@ -49,59 +49,59 @@ [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b\[15\]' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,8:11\],z21\.b,z9\.b\[9\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z18\.b-z19\.b},z9\.b\[12\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,0:3\],{z24\.b-z27\.b},z14\.b\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{ ?z18\.b ?- ?z19\.b ?},z9\.b\[12\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[15\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,0:3\],{ ?z24\.b ?- ?z27\.b ?},z14\.b\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,12:15\],z0\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z31\.b,z0\.b' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],z0\.b,z15\.b' [^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],z25\.b,z7\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{z19\.b-z20\.b},z13\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z29\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,0:3\],{z25\.b-z28\.b},z14\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,4:7\],{ ?z19\.b ?- ?z20\.b ?},z13\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z29\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w9,0:3\],{ ?z25\.b ?- ?z28\.b ?},z14\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w10,4:7\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,4:7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w8,0:3\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usmlall za\.s\[w11,0:3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-15-invalid.l b/gas/testsuite/gas/aarch64/sme2-15-invalid.l index 54fd066..330afaa 100644 --- a/gas/testsuite/gas/aarch64/sme2-15-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-15-invalid.l @@ -1,97 +1,97 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfdot 0,{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfdot za\.s\[w8,0\],0,z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},0' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0' [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `bfdot za\.h\[w8,0\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.h\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z4\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z5\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{z0-z1},z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},z0' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z15\.h ?- ?z16\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `bfdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `bfdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z15\.h ?- ?z18\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z29\.h,z30\.h,z31\.h,z0\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z4\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h} -[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfdot za\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h} -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `bfdot za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `bfdot za\.s\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `bfdot za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,1:foo\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `bfdot za\.s\[w8,foo:bar\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-15-noarch.l b/gas/testsuite/gas/aarch64/sme2-15-noarch.l index 70bfb96..0895748 100644 --- a/gas/testsuite/gas/aarch64/sme2-15-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-15-noarch.l @@ -1,187 +1,187 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfdot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fdot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},{ ?Z0\.b ?- ?Z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},{ ?Z0\.B ?- ?Z1\.B ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w10,1\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},{ ?Z0\.b ?- ?Z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},{ ?Z0\.B ?- ?Z3\.B ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `usdot za\.s\[w11,3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-16-invalid.l b/gas/testsuite/gas/aarch64/sme2-16-invalid.l index 44e0f1a..1f33a83 100644 --- a/gas/testsuite/gas/aarch64/sme2-16-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-16-invalid.l @@ -1,97 +1,97 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sdot 0,{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sdot za\.s\[w8,0\],0,z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},0' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0' [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `sdot za\.h\[w8,0\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\[0\]' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{z0\.s-z1\.s},z0\.s\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.h\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h\[0\] -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z4\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h,z1\.h,z5\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z4\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h,z1\.h,z5\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{z0-z1},z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},z0' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, z0\.h -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z15\.h-z16\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z31\.h,z0\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z1\.h-z4\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z2\.h-z5\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{z3\.h-z6\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z15\.h-z18\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z29\.h,z30\.h,z31\.h,z0\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{z0\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z2\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z4\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{z0\.h-z3\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z15\.h ?- ?z16\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z31\.h,z0\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w7,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `sdot za\.s\[w12,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `sdot za\.s\[w8,8\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sdot za\.s\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z15\.h ?- ?z18\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z29\.h,z30\.h,z31\.h,z0\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z4\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z1\.h}, {z0\.h-z1\.h} -[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sdot za\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sdot za\.s\[w8, 0\], {z0\.h-z3\.h}, {z0\.h-z3\.h} -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `sdot za\.s\[w8,0:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:2\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `sdot za\.s\[w8,1:0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:1\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,1:foo\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:bar\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `sdot za\.s\[w8,0:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `sdot za\.s\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `sdot za\.s\[w8,1:0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:1\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,1:foo\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected a constant immediate offset at operand 1 -- `sdot za\.s\[w8,foo:bar\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-16-noarch.l b/gas/testsuite/gas/aarch64/sme2-16-noarch.l index bebc1cc..639b490 100644 --- a/gas/testsuite/gas/aarch64/sme2-16-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-16-noarch.l @@ -1,249 +1,249 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.h-z7\.h},z10\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.h-z22\.h},z9\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.h-z20\.h},z3\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},{Z0\.b-Z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},{Z0\.B-Z1\.B}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{z22\.b-z23\.b},{z18\.b-z19\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},{Z0\.b-Z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},{Z0\.B-Z3\.B}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{z16\.b-z19\.b},{z24\.b-z27\.b}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},{ ?Z0\.b ?- ?Z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},{ ?Z0\.B ?- ?Z1\.B ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w10,1\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},{ ?Z0\.b ?- ?Z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},{ ?Z0\.B ?- ?Z3\.B ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.s\[w11,3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},{ ?Z0\.b ?- ?Z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},{ ?Z0\.B ?- ?Z1\.B ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w10,1\],{ ?z22\.b ?- ?z23\.b ?},{ ?z18\.b ?- ?z19\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},{ ?Z0\.b ?- ?Z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},{ ?Z0\.B ?- ?Z3\.B ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.s\[w11,3\],{ ?z16\.b ?- ?z19\.b ?},{ ?z24\.b ?- ?z27\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-17-invalid.l b/gas/testsuite/gas/aarch64/sme2-17-invalid.l index b1f5923..e247fb5 100644 --- a/gas/testsuite/gas/aarch64/sme2-17-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-17-invalid.l @@ -1,20 +1,20 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sudot 0,{z0\.b-z1\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sudot 0,{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sudot za\.s\[w8,0\],0,z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},0' -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},0' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{z0\.b-z3\.b},{z0\.b-z3\.b}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-17-noarch.l b/gas/testsuite/gas/aarch64/sme2-17-noarch.l index f3f2f53..14c51ae 100644 --- a/gas/testsuite/gas/aarch64/sme2-17-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-17-noarch.l @@ -1,45 +1,45 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,2\],{z14\.b-z15\.b},z13\.b\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{Z0\.b-Z1\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{Z0\.B-Z1\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,3\],{z21\.b-z22\.b},z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b,z31\.b,z0\.b,z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z30\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z31\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,5\],{z17\.b-z20\.b},z3\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,2\],{ ?z14\.b ?- ?z15\.b ?},z13\.b\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx2\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx2\],{ ?Z0\.b ?- ?Z1\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX2\],{ ?Z0\.B ?- ?Z1\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b ?- ?z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w9,3\],{ ?z21\.b ?- ?z22\.b ?},z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b,z31\.b,z0\.b,z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z30\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z31\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sudot za\.s\[w10,5\],{ ?z17\.b ?- ?z20\.b ?},z3\.b' diff --git a/gas/testsuite/gas/aarch64/sme2-18-invalid.l b/gas/testsuite/gas/aarch64/sme2-18-invalid.l index ea824cb..a4a9487 100644 --- a/gas/testsuite/gas/aarch64/sme2-18-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-18-invalid.l @@ -1,21 +1,21 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfvdot 0,{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `bfvdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `bfvdot za\.s\[w8,0\],0,z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},0' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0' [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `fvdot za\.h\[w8,0\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `fvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `fvdot za\.s\[w8,0\],{z0\.b-z1\.h},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `fvdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `fvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.h ?},z0\.b\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fvdot za\.h\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fvdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `fvdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fvdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fvdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `fvdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fvdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fvdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fvdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]' diff --git a/gas/testsuite/gas/aarch64/sme2-18-noarch.l b/gas/testsuite/gas/aarch64/sme2-18-noarch.l index 525e395..e9ebbec 100644 --- a/gas/testsuite/gas/aarch64/sme2-18-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-18-noarch.l @@ -1,21 +1,21 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `bfvdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fvdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' diff --git a/gas/testsuite/gas/aarch64/sme2-19-invalid.l b/gas/testsuite/gas/aarch64/sme2-19-invalid.l index 936e6f5..0f62e4c 100644 --- a/gas/testsuite/gas/aarch64/sme2-19-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-19-invalid.l @@ -1,36 +1,36 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `svdot 0,{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `svdot 0,{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `svdot za\.s\[w8,0\],0,z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},0' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},0' [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `svdot za\.h\[w8,0\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `svdot za\.s\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `svdot za\.s\[w8,0,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `svdot za\.s\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand 1 must have a vector group size of 2 -- `svdot za\.s\[w8,0,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0:1\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: svdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `svdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: svdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w7,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `svdot za\.s\[w12,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,-1\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `svdot za\.s\[w8,8\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z2\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z1\.b ?- ?z4\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z2\.b ?- ?z5\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.s\[w8,0\],{ ?z3\.b ?- ?z6\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z16\.b\[0\]' diff --git a/gas/testsuite/gas/aarch64/sme2-19-noarch.l b/gas/testsuite/gas/aarch64/sme2-19-noarch.l index c4d760e..7a57070 100644 --- a/gas/testsuite/gas/aarch64/sme2-19-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-19-noarch.l @@ -1,41 +1,41 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' diff --git a/gas/testsuite/gas/aarch64/sme2-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-2-invalid.l index 8f2801f..1f761ca 100644 --- a/gas/testsuite/gas/aarch64/sme2-2-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-2-invalid.l @@ -1,229 +1,229 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1b 0,pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1b {z0\.b-z1\.b},0,\[x0\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,0' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},0,\[x0\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,0' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b { ?z0\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b { ?z0\.b ?- ?z2\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z2\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z1\.b ?},p8/z,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/m,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8\.b,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-18,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-15,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-1,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#1,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#13,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#15,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#16,mul vl\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn7/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[w0\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[xzr\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-18,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-15,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-1,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#1,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#13,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#15,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#16,mul vl\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z4\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z2\.b ?- ?z5\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z3\.b ?- ?z6\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z3\.b ?},p8/z,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/m,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8\.b,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#4\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-36,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-31,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-30,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-29,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-14,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-3,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-2,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-1,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#1,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#2,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#3,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#25,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#26,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#27,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#29,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#30,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#31,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#32,mul vl\]' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z5\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z6\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z7\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z9\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z15\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z16\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z23\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z24\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z31\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z17\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z18\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z19\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z20\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z21\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z22\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z23\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z25\.b,z1\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z26\.b,z2\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z27\.b,z3\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z28\.b,z4\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z29\.b,z5\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z30\.b,z6\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z31\.b,z7\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z8\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z8\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn0/z,\[x0\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn7/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[w0\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[xzr\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#4\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-36,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-31,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-30,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-29,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-14,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-3,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-2,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-1,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#1,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#2,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#3,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#25,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#26,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#27,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#29,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#30,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#31,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#32,mul vl\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z8\.b,z16\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z2\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z3\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z4\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z5\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z6\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z7\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z9\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z15\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z16\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z23\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z24\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z31\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z8\.b,z16\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z9\.b,z17\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z10\.b,z18\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z11\.b,z19\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z12\.b,z20\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z13\.b,z21\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z14\.b,z22\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z15\.b,z23\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z24\.b,z0\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z25\.b,z1\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z26\.b,z2\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z27\.b,z3\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z28\.b,z4\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z29\.b,z5\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z30\.b,z6\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z31\.b,z7\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z8\.b,z0\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.h,z8\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z8\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z8\.h ?},pn8/z,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b, z8\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `ld1b {z0,z8},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-17,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-15,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-1,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#13,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#15,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#16,mul vl\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z5\.b,z9\.b,z13\.b,z17\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z6\.b,z10\.b,z14\.b,z18\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z7\.b,z11\.b,z15\.b,z19\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z12\.b,z16\.b,z20\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z9\.b,z13\.b,z17\.b,z21\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z10\.b,z14\.b,z18\.b,z22\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z11\.b,z15\.b,z19\.b,z23\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z12\.b,z16\.b,z20\.b,z24\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z13\.b,z17\.b,z21\.b,z25\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z14\.b,z18\.b,z22\.b,z26\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z15\.b,z19\.b,z23\.b,z27\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z2\.b,z4\.b,z6\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z3\.b,z6\.b,z9\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b {z0\.b,z8\.b,z16\.b,z24\.b},pn8/z,\[x0\]` -[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z5\.b,z6\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z9\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b {z0\.b,z1\.b,z3\.b,z7\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.h,z4\.h,z8\.b,z12\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.h,z12\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `ld1b { ?z0,z8 ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z8\.b ?},p8/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[w0\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[xzr\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-16\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-17,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-15,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-1,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 2 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#13,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#15,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -16 to 14 at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#16,mul vl\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z4\.b,z8\.b,z12\.b,z16\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z5\.b,z9\.b,z13\.b,z17\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z6\.b,z10\.b,z14\.b,z18\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z7\.b,z11\.b,z15\.b,z19\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z8\.b,z12\.b,z16\.b,z20\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z9\.b,z13\.b,z17\.b,z21\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z10\.b,z14\.b,z18\.b,z22\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z11\.b,z15\.b,z19\.b,z23\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z12\.b,z16\.b,z20\.b,z24\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z13\.b,z17\.b,z21\.b,z25\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z14\.b,z18\.b,z22\.b,z26\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z15\.b,z19\.b,z23\.b,z27\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z20\.b,z24\.b,z28\.b,z0\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b { ?z0\.b,z2\.b,z4\.b,z6\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b { ?z0\.b,z3\.b,z6\.b,z9\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 4 at operand 1 -- `ld1b { ?z0\.b,z8\.b,z16\.b,z24\.b ?},pn8/z,\[x0\]` +[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z5\.b,z6\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z9\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `ld1b { ?z0\.b,z1\.b,z3\.b,z7\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.h,z4\.h,z8\.b,z12\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.h,z12\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-64,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-36,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-31,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-3,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-2,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-1,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#1,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#2,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#3,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#25,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#26,mul vl\]' -[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#27,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#29,mul vl\]' -[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#32,mul vl\]' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b {z0\.b-z2\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z2\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z1\.b},p8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},p8/z,\[x0\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[w0\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[xzr\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-32\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-1\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-64,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-36,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-31,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-3,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-2,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-1,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#1,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#2,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#3,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#25,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#26,mul vl\]' +[^ :]+:[0-9]+: Error: immediate value must be a multiple of 4 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#27,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#29,mul vl\]' +[^ :]+:[0-9]+: Error: immediate offset out of range -32 to 28 at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#32,mul vl\]' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1b { ?z0\.b ?- ?z2\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z2\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z1\.b ?},p8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8/m,\[x0,x1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/m,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z1\.b},pn8\.b,\[x0,x1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8\.b,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z1\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn0/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z1\.b},pn7/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[w0,w1\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[xzr,x1\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[sp,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,sxtw\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z1\.b},pn8/z,\[x0,w1,uxtw\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z1\.b-z4\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z2\.b-z5\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z3\.b-z6\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b-z3\.b},p8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn0/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn7/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[w0,w1\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[xzr,x1\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,w1,sxtw\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,w1,uxtw\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z1\.b ?- ?z4\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z2\.b ?- ?z5\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z3\.b ?- ?z6\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b ?- ?z3\.b ?},p8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8/m,\[x0,x1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/m,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.b-z3\.b},pn8\.b,\[x0,x1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8\.b,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b-z3\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn0/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b {z0\.b-z3\.b},pn7/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[w0,w1\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[xzr,x1\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[sp,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,sxtw\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b-z3\.b},pn8/z,\[x0,w1,uxtw\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z2\.b},pn8/z,\[x0,x1\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z3\.b},pn8/z,\[x0,x1\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z0\.b,z4\.b},pn8/z,\[x0,x1\]` -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z8\.b,z16\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z24\.b,z0\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b {z8\.b,z0\.b},pn8/z,\[x0,x1\]` -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z8\.h},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn0/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn7/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[w0,w1\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[xzr,x1\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,w1,sxtw\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,w1,uxtw\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z2\.b ?},pn8/z,\[x0,x1\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z3\.b ?},pn8/z,\[x0,x1\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z0\.b,z4\.b ?},pn8/z,\[x0,x1\]` +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z8\.b,z16\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z24\.b,z0\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1b { ?z8\.b,z0\.b ?},pn8/z,\[x0,x1\]` +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b, z8\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z8\.b},p8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[w0,w30\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[xzr,xzr\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z4\.b,z8\.b,z12\.b,z16\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b {z20\.b,z24\.b,z28\.b,z0\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z8\.b ?},p8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[w0,w30\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[xzr,xzr\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z4\.b,z8\.b,z12\.b,z16\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1b { ?z20\.b,z24\.b,z28\.b,z0\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1b { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1b {z0\.b, z4\.b, z8\.b, z12\.b}, pn8/z, \[x0, x1\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},p8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[w0,w30\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[xzr,xzr\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,sp\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},p8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[w0,w30\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[xzr,xzr\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,sp\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1,lsl ?#1\]' diff --git a/gas/testsuite/gas/aarch64/sme2-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-2-noarch.l index 48b6049..39467e0 100644 --- a/gas/testsuite/gas/aarch64/sme2-2-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-2-noarch.l @@ -1,481 +1,481 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z12\.b-z13\.b},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z1\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z30\.b-z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z1\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z14\.b-z15\.b},pn9/z,\[x26,x3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B-Z3\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z28\.b-z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b-z3\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z8\.b-z11\.b},pn11/z,\[x27,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z8\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z9\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z10\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z11\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z4\.b,z12\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z6\.b,z14\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z7\.b,z15\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z24\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z25\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z26\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z27\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z20\.b,z28\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z21\.b,z29\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z22\.b,z30\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z23\.b,z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z8\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z5\.b,z13\.b},pn14/z,\[x15,x24\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8/Z,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8/z,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11/z,\[x4,x6\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z30\.b-z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z1\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z14\.b-z15\.b},pn9,\[x26,x3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z28\.b-z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b-z3\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z8\.b-z11\.b},pn11,\[x27,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z9\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z10\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z11\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z4\.b,z12\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z6\.b,z14\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z7\.b,z15\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z24\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z25\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z26\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z27\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z20\.b,z28\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z21\.b,z29\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z22\.b,z30\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z23\.b,z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z8\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z5\.b,z13\.b},pn14,\[x15,x24\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z12\.b-z13\.b},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z1\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z30\.b-z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z1\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z14\.b-z15\.b},pn9,\[x26,x3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B-Z3\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z28\.b-z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b-z3\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z8\.b-z11\.b},pn11,\[x27,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z8\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z9\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z10\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z11\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z4\.b,z12\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z6\.b,z14\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z7\.b,z15\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z24\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z25\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z26\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z27\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z20\.b,z28\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z21\.b,z29\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z22\.b,z30\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z23\.b,z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z8\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z5\.b,z13\.b},pn14,\[x15,x24\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x1,lsl#0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {Z0\.B,Z4\.B,Z8\.B,Z12\.B},PN8,\[X0,X1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z1\.b,z5\.b,z9\.b,z13\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z2\.b,z6\.b,z10\.b,z14\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z3\.b,z7\.b,z11\.b,z15\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z16\.b,z20\.b,z24\.b,z28\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z18\.b,z22\.b,z26\.b,z30\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z19\.b,z23\.b,z27\.b,z31\.b},pn8,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn15,\[x0,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x30,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[sp,x1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z0\.b,z4\.b,z8\.b,z12\.b},pn8,\[x0,xzr\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b {z17\.b,z21\.b,z25\.b,z29\.b},pn11,\[x4,x6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z12\.b ?- ?z13\.b ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z9\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z10\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z11\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z4\.b,z12\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z5\.b,z13\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z6\.b,z14\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z7\.b,z15\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z24\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z25\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z26\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z27\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z20\.b,z28\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z21\.b,z29\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z22\.b,z30\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z23\.b,z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z11\.b ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z14\.b ?- ?z15\.b ?},pn9/z,\[x26,x3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x27,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z9\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z10\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z11\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z4\.b,z12\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z5\.b,z13\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z6\.b,z14\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z7\.b,z15\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z24\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z25\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z26\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z27\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z20\.b,z28\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z21\.b,z29\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z22\.b,z30\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z23\.b,z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z5\.b,z13\.b ?},pn14/z,\[x15,x24\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11/z,\[x4,x6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z12\.b ?- ?z13\.b ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z9\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z10\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z11\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z4\.b,z12\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z5\.b,z13\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z6\.b,z14\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z7\.b,z15\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z24\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z25\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z26\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z27\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z20\.b,z28\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z21\.b,z29\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z22\.b,z30\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z23\.b,z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z11\.b ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z30\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z1\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z14\.b ?- ?z15\.b ?},pn9/z,\[x26,x3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z28\.b ?- ?z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b ?- ?z3\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z8\.b ?- ?z11\.b ?},pn11/z,\[x27,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z8\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z9\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z10\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z11\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z4\.b,z12\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z5\.b,z13\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z6\.b,z14\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z7\.b,z15\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z24\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z25\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z26\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z27\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z20\.b,z28\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z21\.b,z29\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z22\.b,z30\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z23\.b,z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z8\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z5\.b,z13\.b ?},pn14/z,\[x15,x24\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8/Z,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8/z,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11/z,\[x4,x6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z12\.b ?- ?z13\.b ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z8\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z9\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z10\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z11\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z4\.b,z12\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z5\.b,z13\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z6\.b,z14\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z7\.b,z15\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z24\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z25\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z26\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z27\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z20\.b,z28\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z21\.b,z29\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z22\.b,z30\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z23\.b,z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z11\.b ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z14\.b ?- ?z15\.b ?},pn9,\[x26,x3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x27,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z8\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z9\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z10\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z11\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z4\.b,z12\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z5\.b,z13\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z6\.b,z14\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z7\.b,z15\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z24\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z25\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z26\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z27\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z20\.b,z28\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z21\.b,z29\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z22\.b,z30\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z23\.b,z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z8\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z5\.b,z13\.b ?},pn14,\[x15,x24\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11,\[x4,x6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z12\.b ?- ?z13\.b ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z8\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z9\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z10\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z11\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z4\.b,z12\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z5\.b,z13\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z6\.b,z14\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z7\.b,z15\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z24\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z25\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z26\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z27\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z20\.b,z28\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z21\.b,z29\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z22\.b,z30\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z23\.b,z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z11\.b ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z1\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z30\.b ?- ?z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z1\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z14\.b ?- ?z15\.b ?},pn9,\[x26,x3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B ?- ?Z3\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z28\.b ?- ?z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b ?- ?z3\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z8\.b ?- ?z11\.b ?},pn11,\[x27,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z8\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z9\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z10\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z11\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z4\.b,z12\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z5\.b,z13\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z6\.b,z14\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z7\.b,z15\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z24\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z25\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z26\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z27\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z20\.b,z28\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z21\.b,z29\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z22\.b,z30\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z23\.b,z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z8\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z5\.b,z13\.b ?},pn14,\[x15,x24\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x1,lsl ?#0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?Z0\.B,Z4\.B,Z8\.B,Z12\.B ?},PN8,\[X0,X1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z1\.b,z5\.b,z9\.b,z13\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z2\.b,z6\.b,z10\.b,z14\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z3\.b,z7\.b,z11\.b,z15\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z16\.b,z20\.b,z24\.b,z28\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z18\.b,z22\.b,z26\.b,z30\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z19\.b,z23\.b,z27\.b,z31\.b ?},pn8,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn15,\[x0,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x30,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[sp,x1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z0\.b,z4\.b,z8\.b,z12\.b ?},pn8,\[x0,xzr\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1b { ?z17\.b,z21\.b,z25\.b,z29\.b ?},pn11,\[x4,x6\]' diff --git a/gas/testsuite/gas/aarch64/sme2-20-invalid.l b/gas/testsuite/gas/aarch64/sme2-20-invalid.l index cea4476..1e33ee6 100644 --- a/gas/testsuite/gas/aarch64/sme2-20-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-20-invalid.l @@ -1,27 +1,27 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `suvdot 0,{z0\.b-z3\.b},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a ZA array vector at operand 1 -- `suvdot 0,{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `suvdot za\.s\[w8,0\],0,z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},0' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},0' [^ :]+:[0-9]+: Error: missing braces at operand 2 -- `suvdot za\.h\[w8,0\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `suvdot za\.h\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `suvdot za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: suvdot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0:1\],{z0\.b-z3\.b},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0:1\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: suvdot za\.s\[w8, 0:1\], {z0\.b-z3\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `suvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: suvdot za\.s\[w8, 0, vgx4\], {z0\.b-z3\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w7,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w12,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,-1\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,8\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z1\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{z0\.b-z2\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z1\.b-z4\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z2\.b-z5\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{z3\.b-z6\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[4\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z16\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w7,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `suvdot za\.s\[w12,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,-1\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `suvdot za\.s\[w8,8\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z1\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z2\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z1\.b ?- ?z4\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z2\.b ?- ?z5\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `suvdot za\.s\[w8,0\],{ ?z3\.b ?- ?z6\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[4\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z16\.b\[0\]' diff --git a/gas/testsuite/gas/aarch64/sme2-20-noarch.l b/gas/testsuite/gas/aarch64/sme2-20-noarch.l index 8b268d3..5bc80d5 100644 --- a/gas/testsuite/gas/aarch64/sme2-20-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-20-noarch.l @@ -1,21 +1,21 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0,vgx4\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.s\[W8,0,VGx4\],{Z0\.b-Z3\.b},Z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.S\[W8,0,VGX4\],{Z0\.B-Z3\.B},Z0\.B\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w11,0\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,7\],{z0\.b-z3\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z28\.b-z31\.b},z0\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z15\.b\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{z0\.b-z3\.b},z0\.b\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w9,1\],{z4\.b-z7\.b},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `suvdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0,vgx4\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.s\[W8,0,VGx4\],{ ?Z0\.b ?- ?Z3\.b ?},Z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot ZA\.S\[W8,0,VGX4\],{ ?Z0\.B ?- ?Z3\.B ?},Z0\.B\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w11,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,7\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z28\.b ?- ?z31\.b ?},z0\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z15\.b\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w8,0\],{ ?z0\.b ?- ?z3\.b ?},z0\.b\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `usvdot za\.s\[w9,1\],{ ?z4\.b ?- ?z7\.b ?},z10\.b\[2\]' diff --git a/gas/testsuite/gas/aarch64/sme2-22-invalid.l b/gas/testsuite/gas/aarch64/sme2-22-invalid.l index 6f799c1..0dbbf6c 100644 --- a/gas/testsuite/gas/aarch64/sme2-22-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-22-invalid.l @@ -1,27 +1,27 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fclamp 0,z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp {z0\.h-z1\.h},0,z0\.h' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp {z0\.h-z1\.h},z0\.h,0' -[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z1\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp { ?z0\.h ?- ?z1\.h ?},0,z0\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `fclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s [^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.b-z3\.b},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fclamp {z0\.h-z3\.h}, z0\.h, z0\.h [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fclamp {z0\.s-z3\.s}, z0\.s, z0\.s [^ :]+:[0-9]+: Info: fclamp {z0\.d-z3\.d}, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp {z0\.q-z1\.q},z0\.q,z0\.q' +[^ :]+:[0-9]+: Error: operand mismatch -- `fclamp { ?z0\.q ?- ?z1\.q ?},z0\.q,z0\.q' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fclamp {z0\.h-z1\.h}, z0\.h, z0\.h [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fclamp {z0\.s-z1\.s}, z0\.s, z0\.s [^ :]+:[0-9]+: Info: fclamp {z0\.d-z1\.d}, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fclamp {z0\.h-z2\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z2\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z1\.h-z4\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z2\.h-z5\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp {z3\.h-z6\.h},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `fclamp { ?z0\.h ?- ?z2\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z1\.h ?- ?z2\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z1\.h ?- ?z4\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z2\.h ?- ?z5\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fclamp { ?z3\.h ?- ?z6\.h ?},z0\.h,z0\.h' diff --git a/gas/testsuite/gas/aarch64/sme2-22-noarch.l b/gas/testsuite/gas/aarch64/sme2-22-noarch.l index f313ad0..4d6e445 100644 --- a/gas/testsuite/gas/aarch64/sme2-22-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-22-noarch.l @@ -1,111 +1,111 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z1\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.h-z9\.h},z26\.h,z4\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z1\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z18\.s-z19\.s},z9\.s,z14\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z30\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z1\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z10\.d-z11\.d},z11\.d,z22\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.h-z3\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z20\.h-z23\.h},z15\.h,z17\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.s-z3\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z24\.s-z27\.s},z29\.s,z6\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z28\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z0\.d-z3\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fclamp {z8\.d-z11\.d},z7\.d,z30\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.b-z31\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z31\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z1\.b},z0\.b,z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z2\.b-z3\.b},z21\.b,z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z1\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.h-z9\.h},z26\.h,z4\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z1\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z18\.s-z19\.s},z9\.s,z14\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z30\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z1\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z10\.d-z11\.d},z11\.d,z22\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.b-z31\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z31\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.b-z3\.b},z0\.b,z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z4\.b-z7\.b},z19\.b,z26\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.h-z3\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z20\.h-z23\.h},z15\.h,z17\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.s-z3\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z24\.s-z27\.s},z29\.s,z6\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z28\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z0\.d-z3\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sclamp {z8\.d-z11\.d},z7\.d,z30\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.b-z31\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z31\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z1\.b},z0\.b,z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z2\.b-z3\.b},z21\.b,z9\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z1\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.h-z9\.h},z26\.h,z4\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z1\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z18\.s-z19\.s},z9\.s,z14\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z30\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z1\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z10\.d-z11\.d},z11\.d,z22\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.b-z31\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z31\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.b-z3\.b},z0\.b,z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z4\.b-z7\.b},z19\.b,z26\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.h-z3\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z20\.h-z23\.h},z15\.h,z17\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.s-z3\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z24\.s-z27\.s},z29\.s,z6\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z28\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z0\.d-z3\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uclamp {z8\.d-z11\.d},z7\.d,z30\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z8\.h ?- ?z9\.h ?},z26\.h,z4\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z18\.s ?- ?z19\.s ?},z9\.s,z14\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z10\.d ?- ?z11\.d ?},z11\.d,z22\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z28\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z3\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z20\.h ?- ?z23\.h ?},z15\.h,z17\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z28\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z3\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z24\.s ?- ?z27\.s ?},z29\.s,z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z28\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z3\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fclamp { ?z8\.d ?- ?z11\.d ?},z7\.d,z30\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z2\.b ?- ?z3\.b ?},z21\.b,z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z8\.h ?- ?z9\.h ?},z26\.h,z4\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z18\.s ?- ?z19\.s ?},z9\.s,z14\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z10\.d ?- ?z11\.d ?},z11\.d,z22\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.b ?- ?z31\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z3\.b ?},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z4\.b ?- ?z7\.b ?},z19\.b,z26\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z3\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z20\.h ?- ?z23\.h ?},z15\.h,z17\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z3\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z24\.s ?- ?z27\.s ?},z29\.s,z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z28\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z3\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sclamp { ?z8\.d ?- ?z11\.d ?},z7\.d,z30\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z2\.b ?- ?z3\.b ?},z21\.b,z9\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z8\.h ?- ?z9\.h ?},z26\.h,z4\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z18\.s ?- ?z19\.s ?},z9\.s,z14\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z10\.d ?- ?z11\.d ?},z11\.d,z22\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.b ?- ?z31\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z3\.b ?},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.b ?- ?z3\.b ?},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z4\.b ?- ?z7\.b ?},z19\.b,z26\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z3\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.h ?- ?z3\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z20\.h ?- ?z23\.h ?},z15\.h,z17\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z3\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.s ?- ?z3\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z24\.s ?- ?z27\.s ?},z29\.s,z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z28\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z3\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z0\.d ?- ?z3\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uclamp { ?z8\.d ?- ?z11\.d ?},z7\.d,z30\.d' diff --git a/gas/testsuite/gas/aarch64/sme2-23-invalid.l b/gas/testsuite/gas/aarch64/sme2-23-invalid.l index b3e9312..9508247 100644 --- a/gas/testsuite/gas/aarch64/sme2-23-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-23-invalid.l @@ -1,14 +1,14 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fcvtzs 0,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fcvtzs {z0\.s,z1\.s},0' -[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z0\.s,z1\.s},{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `fcvtzs 0,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `fcvtzs { ?z0\.s,z1\.s ?},0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs { ?z0\.s,z1\.s ?},{ ?z0\.h ?- ?z1\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fcvtzs {z0\.s-z1\.s}, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z30\.h,z31\.h},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs { ?z30\.h,z31\.h ?},{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fcvtzs {z30\.s-z31\.s}, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs {z0\.d,z1\.d},{z30\.d-z31\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fcvtzs { ?z0\.d,z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fcvtzs {z0\.s-z1\.s}, {z30\.s-z31\.s} -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fcvtzs {z1\.s,z2\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvtzs {z0\.s,z1\.s},{z29\.s-z30\.s}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `fcvtzs { ?z1\.s,z2\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvtzs { ?z0\.s,z1\.s ?},{ ?z29\.s ?- ?z30\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-23-noarch.l b/gas/testsuite/gas/aarch64/sme2-23-noarch.l index 033e87a..0d7c05f 100644 --- a/gas/testsuite/gas/aarch64/sme2-23-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-23-noarch.l @@ -1,65 +1,65 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z10\.s,z11\.s},{z26\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs {z24\.s-z27\.s},{z8\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z12\.s,z13\.s},{z14\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu {z16\.s-z19\.s},{z12\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z10\.s,z11\.s},{z26\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frinta {z24\.s-z27\.s},{z8\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z10\.s,z11\.s},{z26\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintm {z24\.s-z27\.s},{z8\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z10\.s,z11\.s},{z26\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintn {z24\.s-z27\.s},{z8\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z10\.s,z11\.s},{z26\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `frintp {z24\.s-z27\.s},{z8\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z10\.s,z11\.s},{z26\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `scvtf {z24\.s-z27\.s},{z8\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s,z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z30\.s,z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s,z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z10\.s,z11\.s},{z26\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf {z24\.s-z27\.s},{z8\.s-z11\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzs { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z12\.s,z13\.s ?},{ ?z14\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtzu { ?z16\.s ?- ?z19\.s ?},{ ?z12\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frinta { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintm { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintn { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `frintp { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `scvtf { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s,z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z30\.s,z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s,z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z10\.s,z11\.s ?},{ ?z26\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `ucvtf { ?z24\.s ?- ?z27\.s ?},{ ?z8\.s ?- ?z11\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-24-invalid.l b/gas/testsuite/gas/aarch64/sme2-24-invalid.l index 82dd0fb..b1ba1d3 100644 --- a/gas/testsuite/gas/aarch64/sme2-24-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-24-invalid.l @@ -1,22 +1,22 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfcvt 0,{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `bfcvt 0,{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `bfcvt z0\.h,0' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfcvt z0\.h,{z1\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvtn z0\.h,{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvt z0\.h,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvtn z0\.s,{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `bfcvt z0\.h,{ ?z1\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvtn z0\.h,{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `bfcvt z0\.h,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvtn z0\.s,{ ?z0\.s ?- ?z3\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfcvtn z0\.h, {z0\.s-z3\.s} -[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvt z0\.s,{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `bfcvt z0\.s,{ ?z0\.h ?- ?z3\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: bfcvt z0\.b, {z0\.h-z3\.h} -[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{ ?z0\.h ?- ?z1\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fcvt z0\.b, {z0\.h-z1\.h} -[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.s,{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fcvt z0\.h, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.d,{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fcvt z0\.d,{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fcvt z0\.h, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvt z0\.h,{z1\.s-z2\.s}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fcvt z0\.h,{ ?z1\.s ?- ?z2\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-24-noarch.l b/gas/testsuite/gas/aarch64/sme2-24-noarch.l index ef23b8b..bf5cc90 100644 --- a/gas/testsuite/gas/aarch64/sme2-24-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-24-noarch.l @@ -1,17 +1,17 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z14\.h,{z20\.s-z21\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z26\.h,{z14\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z29\.h,{z6\.s-z7\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z29\.h,{z6\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvt z14\.h,{ ?z20\.s ?- ?z21\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `bfcvtn z26\.h,{ ?z14\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvt z29\.h,{ ?z6\.s ?- ?z7\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fcvtn z29\.h,{ ?z6\.s ?- ?z7\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-25-invalid.l b/gas/testsuite/gas/aarch64/sme2-25-invalid.l index 5b18a2a..f2b2bf2 100644 --- a/gas/testsuite/gas/aarch64/sme2-25-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-25-invalid.l @@ -1,48 +1,48 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvt 0,{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvt 0,{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvt z0\.h,0' -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{ ?z0\.d ?- ?z1\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.d ?- ?z1\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z1\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.s ?- ?z3\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z3\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.b,{ ?z0\.d ?- ?z3\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z3\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvt z0\.s,{ ?z0\.d ?- ?z3\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvt z0\.h, {z0\.d-z3\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvt z0\.b, {z0\.s-z3\.s} -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `sqcvt z0\.h,{z0\.s,z8\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z1\.s-z2\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z31\.s,z0\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z1\.s-z4\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z2\.s-z5\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{z3\.s-z6\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{z0\.d-z2\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z1\.d-z4\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z2\.d-z5\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{z3\.d-z6\.d}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `sqcvt z0\.h,{ ?z0\.s,z8\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z1\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z31\.s,z0\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.b,{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{ ?z1\.s ?- ?z4\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{ ?z2\.s ?- ?z5\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.b,{ ?z3\.s ?- ?z6\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvt z0\.h,{ ?z0\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z1\.d ?- ?z4\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z2\.d ?- ?z5\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvt z0\.h,{ ?z3\.d ?- ?z6\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-25-noarch.l b/gas/testsuite/gas/aarch64/sme2-25-noarch.l index 66998ff..5ec313c 100644 --- a/gas/testsuite/gas/aarch64/sme2-25-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-25-noarch.l @@ -1,37 +1,37 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z19\.h,{z14\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z11\.b,{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z22\.h,{z4\.d-z7\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z19\.h,{z14\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z11\.b,{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z22\.h,{z4\.d-z7\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z19\.h,{z14\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z11\.b,{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z22\.h,{z4\.d-z7\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z19\.h,{ ?z14\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.b,{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z11\.b,{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z31\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z0\.h,{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvt z22\.h,{ ?z4\.d ?- ?z7\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z19\.h,{ ?z14\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.b,{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z11\.b,{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z31\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z0\.h,{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtu z22\.h,{ ?z4\.d ?- ?z7\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z19\.h,{ ?z14\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.b,{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z11\.b,{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z31\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z0\.h,{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvt z22\.h,{ ?z4\.d ?- ?z7\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-26-invalid.l b/gas/testsuite/gas/aarch64/sme2-26-invalid.l index 08c2f7f..f2fc429 100644 --- a/gas/testsuite/gas/aarch64/sme2-26-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-26-invalid.l @@ -1,13 +1,13 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{ ?z0\.s ?- ?z3\.s ?}' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvtn z0\.b,0' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z1\.s-z4\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z2\.s-z5\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{z3\.s-z6\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{z0\.d-z2\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z1\.d-z4\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z2\.d-z5\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z3\.d-z6\.d}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.b,{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{ ?z1\.s ?- ?z4\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{ ?z2\.s ?- ?z5\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.b,{ ?z3\.s ?- ?z6\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `sqcvtn z0\.h,{ ?z0\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z1\.d ?- ?z4\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z2\.d ?- ?z5\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z3\.d ?- ?z6\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-26-noarch.l b/gas/testsuite/gas/aarch64/sme2-26-noarch.l index b1bd489..8039403 100644 --- a/gas/testsuite/gas/aarch64/sme2-26-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-26-noarch.l @@ -1,25 +1,25 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z11\.b,{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z22\.h,{z4\.d-z7\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z11\.b,{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z22\.h,{z4\.d-z7\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.b,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z11\.b,{z20\.s-z23\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z22\.h,{z4\.d-z7\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.b,{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z11\.b,{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z22\.h,{ ?z4\.d ?- ?z7\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.b,{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z11\.b,{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z22\.h,{ ?z4\.d ?- ?z7\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.b,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.b,{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z11\.b,{ ?z20\.s ?- ?z23\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z22\.h,{ ?z4\.d ?- ?z7\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-27-invalid.l b/gas/testsuite/gas/aarch64/sme2-27-invalid.l index 9efaa04..465cbe2 100644 --- a/gas/testsuite/gas/aarch64/sme2-27-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-27-invalid.l @@ -1,30 +1,30 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqrshr 0,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqrshr 0,{ ?z0\.s ?- ?z1\.s ?},#1' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshr z0\.h,0,#1' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.h,{z1\.s-z2\.s},#1' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},#0' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},#17' -[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.s,{z0\.d-z1\.d},#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.h,{ ?z1\.s ?- ?z2\.s ?},#1' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#0' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#17' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.s,{ ?z0\.d ?- ?z1\.d ?},#1' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqrshr z0\.h, {z0\.d-z1\.d}, #1 [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqrshr z0\.b, {z0\.s-z1\.s}, #1 -[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},x0' -[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},p0' -[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{z0\.s-z1\.s},pn0' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z1\.s-z4\.s},#1' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z2\.s-z5\.s},#1' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{z3\.s-z6\.s},#1' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#-1' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#0' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{z0\.s-z3\.s},#33' -[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{z0\.d-z3\.d},#1' +[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},x0' +[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},p0' +[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},pn0' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{ ?z1\.s ?- ?z4\.s ?},#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{ ?z2\.s ?- ?z5\.s ?},#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshr z0\.b,{ ?z3\.s ?- ?z6\.s ?},#1' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#-1' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#0' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#33' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{ ?z0\.d ?- ?z3\.d ?},#1' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqrshr z0\.b, {z0\.s-z3\.s}, #1 [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqrshr z0\.h, {z0\.d-z3\.d}, #1 -[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{z0\.d-z3\.d},#65' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshr z0\.b,{ ?z0\.d ?- ?z3\.d ?},#65' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqrshr z0\.b, {z0\.s-z3\.s}, #65 [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-27-noarch.l b/gas/testsuite/gas/aarch64/sme2-27-noarch.l index 72213e0..957d85b 100644 --- a/gas/testsuite/gas/aarch64/sme2-27-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-27-noarch.l @@ -1,50 +1,50 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z30\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#16' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z14\.h,{z22\.s-z23\.s},#7' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#x0' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#p0' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.s-z1\.s},#pn0' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z28\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{z0\.s-z3\.s},#32' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z6\.b,{z12\.s-z15\.s},#25' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z28\.d-z31\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{z0\.d-z3\.d},#64' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z25\.h,{z20\.d-z23\.d},#50' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z30\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.s-z1\.s},#16' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z14\.h,{z22\.s-z23\.s},#7' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z28\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{z0\.s-z3\.s},#32' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z6\.b,{z12\.s-z15\.s},#25' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z28\.d-z31\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{z0\.d-z3\.d},#64' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z25\.h,{z20\.d-z23\.d},#50' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z30\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.s-z1\.s},#16' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z14\.h,{z22\.s-z23\.s},#7' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z28\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{z0\.s-z3\.s},#32' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z6\.b,{z12\.s-z15\.s},#25' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z28\.d-z31\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{z0\.d-z3\.d},#64' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z25\.h,{z20\.d-z23\.d},#50' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z14\.h,{ ?z22\.s ?- ?z23\.s ?},#7' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#x0' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#p0' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#pn0' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshr z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z14\.h,{ ?z22\.s ?- ?z23\.s ?},#7' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshru z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z14\.h,{ ?z22\.s ?- ?z23\.s ?},#7' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshr z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50' diff --git a/gas/testsuite/gas/aarch64/sme2-28-invalid.l b/gas/testsuite/gas/aarch64/sme2-28-invalid.l index 615f8c35..7cf236f 100644 --- a/gas/testsuite/gas/aarch64/sme2-28-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-28-invalid.l @@ -1,18 +1,18 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{z0\.s-z3\.s},#1' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{ ?z0\.s ?- ?z3\.s ?},#1' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshrn z0\.b,0,#1' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z1\.s-z4\.s},#1' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z2\.s-z5\.s},#1' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{z3\.s-z6\.s},#1' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#-1' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#0' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{z0\.s-z3\.s},#33' -[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.d-z3\.d},#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{ ?z1\.s ?- ?z4\.s ?},#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{ ?z2\.s ?- ?z5\.s ?},#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.b,{ ?z3\.s ?- ?z6\.s ?},#1' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#-1' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#0' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 32 at operand 3 -- `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#33' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{ ?z0\.d ?- ?z3\.d ?},#1' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z3\.s}, #1 [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z3\.d}, #1 -[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.d-z3\.d},#65' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{ ?z0\.d ?- ?z3\.d ?},#65' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z3\.s}, #65 [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-28-noarch.l b/gas/testsuite/gas/aarch64/sme2-28-noarch.l index a3762f1..30d4574 100644 --- a/gas/testsuite/gas/aarch64/sme2-28-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-28-noarch.l @@ -1,26 +1,26 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z28\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{z0\.s-z3\.s},#32' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z6\.b,{z12\.s-z15\.s},#25' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z28\.d-z31\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.d-z3\.d},#64' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z25\.h,{z20\.d-z23\.d},#50' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z28\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{z0\.s-z3\.s},#32' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z6\.b,{z12\.s-z15\.s},#25' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.b,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z28\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{z0\.s-z3\.s},#32' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z6\.b,{z12\.s-z15\.s},#25' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{z0\.d-z3\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z28\.d-z31\.d},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.d-z3\.d},#64' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z25\.h,{z20\.d-z23\.d},#50' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.b,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{ ?z28\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.b,{ ?z0\.s ?- ?z3\.s ?},#32' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z6\.b,{ ?z12\.s ?- ?z15\.s ?},#25' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{ ?z0\.d ?- ?z3\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z28\.d ?- ?z31\.d ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.d ?- ?z3\.d ?},#64' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z25\.h,{ ?z20\.d ?- ?z23\.d ?},#50' diff --git a/gas/testsuite/gas/aarch64/sme2-29-invalid.l b/gas/testsuite/gas/aarch64/sme2-29-invalid.l index 893866c..c7b9f0a 100644 --- a/gas/testsuite/gas/aarch64/sme2-29-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-29-invalid.l @@ -1,37 +1,37 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `sunpk 0,z0\.b' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sunpk {z0\.h,z1\.h},0' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `sunpk { ?z0\.h,z1\.h ?},0' [^ :]+:[0-9]+: Error: missing braces at operand 1 -- `sunpk z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.b,z1\.b},z0\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.b,z1\.b ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sunpk {z0\.h-z1\.h}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sunpk {z0\.s-z1\.s}, z0\.h [^ :]+:[0-9]+: Info: sunpk {z0\.d-z1\.d}, z0\.s -[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.h,z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.h,z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sunpk {z0\.h-z1\.h}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sunpk {z0\.s-z1\.s}, z0\.h [^ :]+:[0-9]+: Info: sunpk {z0\.d-z1\.d}, z0\.s -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sunpk {z1\.h,z2\.h},z0\.b' -[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.b,z2\.b},z0\.b' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sunpk { ?z1\.h,z2\.h ?},z0\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.b,z2\.b ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sunpk {z0\.h, z2\.h}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sunpk {z0\.s, z2\.s}, z0\.h [^ :]+:[0-9]+: Info: sunpk {z0\.d, z2\.d}, z0\.s -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z1\.h-z3\.h},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z2\.h-z4\.h},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk {z3\.h-z5\.h},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.s-z3\.s},z0\.b' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk { ?z1\.h ?- ?z3\.h ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk { ?z2\.h ?- ?z4\.h ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `sunpk { ?z3\.h ?- ?z5\.h ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.s ?- ?z3\.s ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sunpk {z0\.h-z3\.h}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sunpk {z0\.s-z3\.s}, z0\.h [^ :]+:[0-9]+: Info: sunpk {z0\.d-z3\.d}, z0\.s -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sunpk {z0\.s-z3\.s},{x0\.s-x1\.s}' -[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk {z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?x0\.s ?- ?x1\.s ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sunpk {z0\.s-z3\.s}, {z0\.h-z3\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-29-noarch.l b/gas/testsuite/gas/aarch64/sme2-29-noarch.l index 2777e16..dad71cd 100644 --- a/gas/testsuite/gas/aarch64/sme2-29-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-29-noarch.l @@ -1,37 +1,37 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h,z1\.h},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.h,z31\.h},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h,z1\.h},z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h-z3\.h},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.h-z31\.h},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.h-z3\.h},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s,z1\.s},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.s,z31\.s},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s,z1\.s},z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s-z3\.s},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.s-z31\.s},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.s-z3\.s},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d,z1\.d},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z30\.d,z31\.d},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d,z1\.d},z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d-z3\.d},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z28\.d-z31\.d},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sunpk {z0\.d-z3\.d},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h,z1\.h},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.h,z31\.h},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h,z1\.h},z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h-z3\.h},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.h-z31\.h},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.h-z3\.h},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s,z1\.s},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.s,z31\.s},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s,z1\.s},z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s-z3\.s},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.s-z31\.s},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.s-z3\.s},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d,z1\.d},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z30\.d,z31\.d},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d,z1\.d},z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d-z3\.d},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z28\.d-z31\.d},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uunpk {z0\.d-z3\.d},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h,z1\.h ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z30\.h,z31\.h ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h,z1\.h ?},z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h ?- ?z3\.h ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z28\.h ?- ?z31\.h ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.h ?- ?z3\.h ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s,z1\.s ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z30\.s,z31\.s ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s,z1\.s ?},z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z28\.s ?- ?z31\.s ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.s ?- ?z3\.s ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d,z1\.d ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z30\.d,z31\.d ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d,z1\.d ?},z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d ?- ?z3\.d ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z28\.d ?- ?z31\.d ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sunpk { ?z0\.d ?- ?z3\.d ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h,z1\.h ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z30\.h,z31\.h ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h,z1\.h ?},z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h ?- ?z3\.h ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z28\.h ?- ?z31\.h ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.h ?- ?z3\.h ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s,z1\.s ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z30\.s,z31\.s ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s,z1\.s ?},z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s ?- ?z3\.s ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z28\.s ?- ?z31\.s ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.s ?- ?z3\.s ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d,z1\.d ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z30\.d,z31\.d ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d,z1\.d ?},z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d ?- ?z3\.d ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z28\.d ?- ?z31\.d ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uunpk { ?z0\.d ?- ?z3\.d ?},{ ?z30\.s ?- ?z31\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-3-invalid.l b/gas/testsuite/gas/aarch64/sme2-3-invalid.l index 90345d4..b9fb6d6 100644 --- a/gas/testsuite/gas/aarch64/sme2-3-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-3-invalid.l @@ -1,75 +1,75 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1d 0,pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1d {z0\.d-z1\.d},0,\[x0\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,0' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1d {z0\.d-z2\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z1\.d-z2\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d-z1\.d},p8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1d { ?z0\.d ?- ?z1\.d ?},0,\[x0\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,0' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1d { ?z0\.d ?- ?z2\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z1\.d ?- ?z2\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d ?- ?z1\.d ?},p8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8/m,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/m,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z1\.d},pn8\.d,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8\.d,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d-z1\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z1\.d},pn0/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z1\.d},pn7/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[w0,w1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[xzr,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[sp,sp,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,w1,sxtw#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z1\.d},pn8/z,\[x0,w1,uxtw#3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z1\.d-z4\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z2\.d-z5\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z3\.d-z6\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d-z3\.d},p8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn0/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn7/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[w0,w1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[xzr,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp,sp,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,w1,sxtw ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,w1,uxtw ?#3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z1\.d ?- ?z4\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z2\.d ?- ?z5\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z3\.d ?- ?z6\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d ?- ?z3\.d ?},p8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8/m,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/m,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.d-z3\.d},pn8\.d,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8\.d,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d-z3\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z3\.d},pn0/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d {z0\.d-z3\.d},pn7/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[w0,w1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[xzr,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[sp,sp,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,w1,sxtw#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d-z3\.d},pn8/z,\[x0,w1,uxtw#3\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z2\.d},pn8/z,\[x0,x1,lsl#3\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z3\.d},pn8/z,\[x0,x1,lsl#3\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z0\.d,z4\.d},pn8/z,\[x0,x1,lsl#3\]` -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z8\.d,z16\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z24\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d {z8\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]` -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn0/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn7/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[w0,w1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[xzr,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp,sp,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,w1,sxtw ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,w1,uxtw ?#3\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z0\.d,z2\.d ?},pn8/z,\[x0,x1,lsl ?#3\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z0\.d,z3\.d ?},pn8/z,\[x0,x1,lsl ?#3\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z0\.d,z4\.d ?},pn8/z,\[x0,x1,lsl ?#3\]` +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z8\.d,z16\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z24\.d,z0\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1d { ?z8\.d,z0\.d ?},pn8/z,\[x0,x1,lsl ?#3\]` +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d, z8\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d,z8\.d},p8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[w0,w30,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[xzr,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[x0,sp,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z4\.d,z8\.d,z12\.d,z16\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d {z20\.d,z24\.d,z28\.d,z0\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d,z8\.d ?},p8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[w0,w30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[xzr,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,sp,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z4\.d,z8\.d,z12\.d,z16\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1d { ?z20\.d,z24\.d,z28\.d,z0\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1d { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#3\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1d {z0\.d, z4\.d, z8\.d, z12\.d}, pn8/z, \[x0, x1, lsl #3\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},p8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[w0,w30,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[xzr,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,sp,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},p8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[w0,w30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[xzr,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,sp,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#1\]' diff --git a/gas/testsuite/gas/aarch64/sme2-3-noarch.l b/gas/testsuite/gas/aarch64/sme2-3-noarch.l index 16eba8f..1b744dd 100644 --- a/gas/testsuite/gas/aarch64/sme2-3-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-3-noarch.l @@ -1,481 +1,481 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z1\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z30\.d-z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z12\.d-z13\.d},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z3\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z28\.d-z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z8\.d-z11\.d},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z8\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z9\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z10\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z4\.d,z12\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z6\.d,z14\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z7\.d,z15\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z24\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z25\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z26\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z27\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z20\.d,z28\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z21\.d,z29\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z22\.d,z30\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z23\.d,z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z1\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z30\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z1\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z14\.d-z15\.d},pn9/z,\[x26,x3,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D-Z3\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z28\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d-z3\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z8\.d-z11\.d},pn11/z,\[x27,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z8\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z9\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z10\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z11\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z4\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z6\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z7\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z24\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z25\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z26\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z27\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z20\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z21\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z22\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z23\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z8\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z5\.d,z13\.d},pn14/z,\[x15,x24,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11/z,\[x4,x6,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z1\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z30\.d-z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z12\.d-z13\.d},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z3\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z28\.d-z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z8\.d-z11\.d},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z8\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z9\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z10\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z4\.d,z12\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z6\.d,z14\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z7\.d,z15\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z24\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z25\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z26\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z27\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z20\.d,z28\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z21\.d,z29\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z22\.d,z30\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z23\.d,z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z1\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z30\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z1\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z14\.d-z15\.d},pn9/z,\[x26,x3,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D-Z3\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z28\.d-z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d-z3\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z8\.d-z11\.d},pn11/z,\[x27,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z8\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z9\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z10\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z11\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z4\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z6\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z7\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z24\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z25\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z26\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z27\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z20\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z21\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z22\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z23\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z8\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z5\.d,z13\.d},pn14/z,\[x15,x24,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8/Z,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11/z,\[x4,x6,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z1\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z30\.d-z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z12\.d-z13\.d},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z3\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z28\.d-z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z8\.d-z11\.d},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z8\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z9\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z10\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z4\.d,z12\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z6\.d,z14\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z7\.d,z15\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z24\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z25\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z26\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z27\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z20\.d,z28\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z21\.d,z29\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z22\.d,z30\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z23\.d,z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z1\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z30\.d-z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z1\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z14\.d-z15\.d},pn9,\[x26,x3,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D-Z3\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z28\.d-z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d-z3\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z8\.d-z11\.d},pn11,\[x27,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z8\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z9\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z10\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z11\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z4\.d,z12\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z6\.d,z14\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z7\.d,z15\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z24\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z25\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z26\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z27\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z20\.d,z28\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z21\.d,z29\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z22\.d,z30\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z23\.d,z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z8\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z5\.d,z13\.d},pn14,\[x15,x24,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11,\[x4,x6,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z1\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z30\.d-z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z12\.d-z13\.d},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z3\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z28\.d-z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z8\.d-z11\.d},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z8\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z9\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z10\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z4\.d,z12\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z6\.d,z14\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z7\.d,z15\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z24\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z25\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z26\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z27\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z20\.d,z28\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z21\.d,z29\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z22\.d,z30\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z23\.d,z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z1\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z30\.d-z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z1\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z14\.d-z15\.d},pn9,\[x26,x3,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D-Z3\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z28\.d-z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d-z3\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z8\.d-z11\.d},pn11,\[x27,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z8\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z9\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z10\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z11\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z4\.d,z12\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z6\.d,z14\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z7\.d,z15\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z24\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z25\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z26\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z27\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z20\.d,z28\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z21\.d,z29\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z22\.d,z30\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z23\.d,z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z8\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z5\.d,z13\.d},pn14,\[x15,x24,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl 3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {Z0\.D,Z4\.D,Z8\.D,Z12\.D},PN8,\[X0,X1,LSL#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z1\.d,z5\.d,z9\.d,z13\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z2\.d,z6\.d,z10\.d,z14\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z3\.d,z7\.d,z11\.d,z15\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z16\.d,z20\.d,z24\.d,z28\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z18\.d,z22\.d,z26\.d,z30\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z19\.d,z23\.d,z27\.d,z31\.d},pn8,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn15,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x30,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[sp,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,x30,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z0\.d,z4\.d,z8\.d,z12\.d},pn8,\[x0,xzr,lsl#3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d {z17\.d,z21\.d,z25\.d,z29\.d},pn11,\[x4,x6,lsl#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z12\.d ?- ?z13\.d ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z9\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z10\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z11\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z4\.d,z12\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z5\.d,z13\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z6\.d,z14\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z7\.d,z15\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z24\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z25\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z26\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z27\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z20\.d,z28\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z21\.d,z29\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z22\.d,z30\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z23\.d,z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z11\.d ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z14\.d ?- ?z15\.d ?},pn9/z,\[x26,x3,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x27,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z9\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z10\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z11\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z4\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z5\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z6\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z7\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z24\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z25\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z26\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z27\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z20\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z21\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z22\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z23\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z5\.d,z13\.d ?},pn14/z,\[x15,x24,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11/z,\[x4,x6,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z12\.d ?- ?z13\.d ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z9\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z10\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z11\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z4\.d,z12\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z5\.d,z13\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z6\.d,z14\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z7\.d,z15\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z24\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z25\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z26\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z27\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z20\.d,z28\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z21\.d,z29\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z22\.d,z30\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z23\.d,z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z11\.d ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z30\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z1\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z14\.d ?- ?z15\.d ?},pn9/z,\[x26,x3,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z28\.d ?- ?z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d ?- ?z3\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z8\.d ?- ?z11\.d ?},pn11/z,\[x27,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z8\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z9\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z10\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z11\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z4\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z5\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z6\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z7\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z24\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z25\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z26\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z27\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z20\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z21\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z22\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z23\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z8\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z5\.d,z13\.d ?},pn14/z,\[x15,x24,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8/Z,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11/z,\[x4,x6,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z12\.d ?- ?z13\.d ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z8\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z9\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z10\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z11\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z4\.d,z12\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z5\.d,z13\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z6\.d,z14\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z7\.d,z15\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z24\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z25\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z26\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z27\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z20\.d,z28\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z21\.d,z29\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z22\.d,z30\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z23\.d,z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z11\.d ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z14\.d ?- ?z15\.d ?},pn9,\[x26,x3,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x27,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z8\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z9\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z10\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z11\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z4\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z5\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z6\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z7\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z24\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z25\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z26\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z27\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z20\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z21\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z22\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z23\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z8\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z5\.d,z13\.d ?},pn14,\[x15,x24,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11,\[x4,x6,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z12\.d ?- ?z13\.d ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z8\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z9\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z10\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z11\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z4\.d,z12\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z5\.d,z13\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z6\.d,z14\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z7\.d,z15\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z24\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z25\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z26\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z27\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z20\.d,z28\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z21\.d,z29\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z22\.d,z30\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z23\.d,z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z11\.d ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z1\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z30\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z1\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z14\.d ?- ?z15\.d ?},pn9,\[x26,x3,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D ?- ?Z3\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z28\.d ?- ?z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d ?- ?z3\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z8\.d ?- ?z11\.d ?},pn11,\[x27,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z8\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z9\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z10\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z11\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z4\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z5\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z6\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z7\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z24\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z25\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z26\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z27\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z20\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z21\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z22\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z23\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z8\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z5\.d,z13\.d ?},pn14,\[x15,x24,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl 3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?Z0\.D,Z4\.D,Z8\.D,Z12\.D ?},PN8,\[X0,X1,LSL ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z1\.d,z5\.d,z9\.d,z13\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z2\.d,z6\.d,z10\.d,z14\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z3\.d,z7\.d,z11\.d,z15\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z16\.d,z20\.d,z24\.d,z28\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z18\.d,z22\.d,z26\.d,z30\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z19\.d,z23\.d,z27\.d,z31\.d ?},pn8,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn15,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x30,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[sp,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,x30,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8,\[x0,xzr,lsl ?#3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1d { ?z17\.d,z21\.d,z25\.d,z29\.d ?},pn11,\[x4,x6,lsl ?#3\]' diff --git a/gas/testsuite/gas/aarch64/sme2-30-invalid.l b/gas/testsuite/gas/aarch64/sme2-30-invalid.l index 6805ddb..660d922 100644 --- a/gas/testsuite/gas/aarch64/sme2-30-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-30-invalid.l @@ -1,29 +1,29 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `uzp 0,z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `uzp {z0\.b-z1\.b},0,z0\.b' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `uzp {z0\.b-z1\.b},z0\.b,0' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z2\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z2\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp {z0\.b-z3\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z1\.b},{z0\.b-z1\.b},{z0\.b,z1\.b}' -[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.h-z1\.h},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 2 -- `uzp { ?z0\.b ?- ?z1\.b ?},0,z0\.b' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `uzp { ?z0\.b ?- ?z1\.b ?},z0\.b,0' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z1\.b ?- ?z2\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp { ?z0\.b ?- ?z2\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `uzp { ?z0\.b ?- ?z3\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b,z1\.b ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `uzp { ?z0\.h ?- ?z1\.h ?},z0\.b,z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: uzp {z0\.b-z1\.b}, z0\.b, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: uzp {z0\.h-z1\.h}, z0\.h, z0\.h [^ :]+:[0-9]+: Info: uzp {z0\.s-z1\.s}, z0\.s, z0\.s [^ :]+:[0-9]+: Info: uzp {z0\.d-z1\.d}, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `uzp {z0\.q-z3\.q},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `uzp { ?z0\.q ?- ?z3\.q ?},z0\.b,z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: uzp {z0\.b-z3\.b}, z0\.b, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: uzp {z0\.h-z3\.h}, z0\.h, z0\.h [^ :]+:[0-9]+: Info: uzp {z0\.s-z3\.s}, z0\.s, z0\.s [^ :]+:[0-9]+: Info: uzp {z0\.d-z3\.d}, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp {z0\.b-z3\.b},{z0\.b-z1\.b},{z2\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z1\.b-z4\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z2\.b-z5\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp {z3\.b-z6\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z1\.b-z4\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z2\.b-z5\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp {z0\.b-z3\.b},{z3\.b-z6\.b}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z1\.b ?},{ ?z2\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z1\.b ?- ?z4\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z2\.b ?- ?z5\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `uzp { ?z3\.b ?- ?z6\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z1\.b ?- ?z4\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z5\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z3\.b ?- ?z6\.b ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-30-noarch.l b/gas/testsuite/gas/aarch64/sme2-30-noarch.l index e3ddd70..c94a181 100644 --- a/gas/testsuite/gas/aarch64/sme2-30-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-30-noarch.l @@ -1,91 +1,91 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.b-z31\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z31\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z1\.b},z0\.b,z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z18\.b-z19\.b},z11\.b,z25\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z1\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z6\.h-z7\.h},z8\.h,z22\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z1\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z24\.s-z25\.s},z19\.s,z2\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z1\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z2\.d-z3\.d},z29\.d,z5\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z0\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z30\.q-z31\.q},z0\.q,z0\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z31\.q,z0\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z1\.q},z0\.q,z31\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z14\.q-z15\.q},z24\.q,z9\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z4\.b-z7\.b},{z24\.b-z27\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z16\.h-z19\.h},{z8\.h-z11\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z20\.s-z23\.s},{z12\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z8\.d-z11\.d},{z16\.d-z19\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z0\.q-z3\.q}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z28\.q-z31\.q},{z0\.q-z3\.q}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z0\.q-z3\.q},{z28\.q-z31\.q}' -[^ :]+:[0-9]+: Error: selected processor does not support `uzp {z12\.q-z15\.q},{z4\.q-z7\.q}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.b-z31\.b},z0\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z31\.b,z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z1\.b},z0\.b,z31\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z18\.b-z19\.b},z11\.b,z25\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.h-z31\.h},z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z31\.h,z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z1\.h},z0\.h,z31\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z6\.h-z7\.h},z8\.h,z22\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.s-z31\.s},z0\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z31\.s,z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z1\.s},z0\.s,z31\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z24\.s-z25\.s},z19\.s,z2\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.d-z31\.d},z0\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z31\.d,z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z1\.d},z0\.d,z31\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z2\.d-z3\.d},z29\.d,z5\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z0\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z30\.q-z31\.q},z0\.q,z0\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z31\.q,z0\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z1\.q},z0\.q,z31\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z14\.q-z15\.q},z24\.q,z9\.q' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z4\.b-z7\.b},{z24\.b-z27\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z16\.h-z19\.h},{z8\.h-z11\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z20\.s-z23\.s},{z12\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z8\.d-z11\.d},{z16\.d-z19\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z0\.q-z3\.q}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z28\.q-z31\.q},{z0\.q-z3\.q}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z0\.q-z3\.q},{z28\.q-z31\.q}' -[^ :]+:[0-9]+: Error: selected processor does not support `zip {z12\.q-z15\.q},{z4\.q-z7\.q}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z18\.b ?- ?z19\.b ?},z11\.b,z25\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z6\.h ?- ?z7\.h ?},z8\.h,z22\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z24\.s ?- ?z25\.s ?},z19\.s,z2\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z2\.d ?- ?z3\.d ?},z29\.d,z5\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z1\.q ?},z0\.q,z0\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z30\.q ?- ?z31\.q ?},z0\.q,z0\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z1\.q ?},z31\.q,z0\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z1\.q ?},z0\.q,z31\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z14\.q ?- ?z15\.q ?},z24\.q,z9\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z4\.b ?- ?z7\.b ?},{ ?z24\.b ?- ?z27\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z16\.h ?- ?z19\.h ?},{ ?z8\.h ?- ?z11\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z20\.s ?- ?z23\.s ?},{ ?z12\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z8\.d ?- ?z11\.d ?},{ ?z16\.d ?- ?z19\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z3\.q ?},{ ?z0\.q ?- ?z3\.q ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z28\.q ?- ?z31\.q ?},{ ?z0\.q ?- ?z3\.q ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z0\.q ?- ?z3\.q ?},{ ?z28\.q ?- ?z31\.q ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uzp { ?z12\.q ?- ?z15\.q ?},{ ?z4\.q ?- ?z7\.q ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z1\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.b ?- ?z31\.b ?},z0\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z1\.b ?},z31\.b,z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z1\.b ?},z0\.b,z31\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z18\.b ?- ?z19\.b ?},z11\.b,z25\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z1\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.h ?- ?z31\.h ?},z0\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z1\.h ?},z31\.h,z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z1\.h ?},z0\.h,z31\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z6\.h ?- ?z7\.h ?},z8\.h,z22\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z1\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.s ?- ?z31\.s ?},z0\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z1\.s ?},z31\.s,z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z1\.s ?},z0\.s,z31\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z24\.s ?- ?z25\.s ?},z19\.s,z2\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z1\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.d ?- ?z31\.d ?},z0\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z1\.d ?},z31\.d,z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z1\.d ?},z0\.d,z31\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z2\.d ?- ?z3\.d ?},z29\.d,z5\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z1\.q ?},z0\.q,z0\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z30\.q ?- ?z31\.q ?},z0\.q,z0\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z1\.q ?},z31\.q,z0\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z1\.q ?},z0\.q,z31\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z14\.q ?- ?z15\.q ?},z24\.q,z9\.q' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z4\.b ?- ?z7\.b ?},{ ?z24\.b ?- ?z27\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z16\.h ?- ?z19\.h ?},{ ?z8\.h ?- ?z11\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z20\.s ?- ?z23\.s ?},{ ?z12\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z8\.d ?- ?z11\.d ?},{ ?z16\.d ?- ?z19\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z3\.q ?},{ ?z0\.q ?- ?z3\.q ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z28\.q ?- ?z31\.q ?},{ ?z0\.q ?- ?z3\.q ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z0\.q ?- ?z3\.q ?},{ ?z28\.q ?- ?z31\.q ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zip { ?z12\.q ?- ?z15\.q ?},{ ?z4\.q ?- ?z7\.q ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-4-invalid.l b/gas/testsuite/gas/aarch64/sme2-4-invalid.l index d763939..db40ceb 100644 --- a/gas/testsuite/gas/aarch64/sme2-4-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-4-invalid.l @@ -1,75 +1,75 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1h 0,pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1h {z0\.h-z1\.h},0,\[x0\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,0' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1h {z0\.h-z2\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z1\.h-z2\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h-z1\.h},p8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1h { ?z0\.h ?- ?z1\.h ?},0,\[x0\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,0' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1h { ?z0\.h ?- ?z2\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z1\.h ?- ?z2\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h ?- ?z1\.h ?},p8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8/m,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/m,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z1\.h},pn8\.h,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8\.h,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h-z1\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z1\.h},pn0/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z1\.h},pn7/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[w0,w1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[xzr,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[sp,sp,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,w1,sxtw#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z1\.h},pn8/z,\[x0,w1,uxtw#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z1\.h-z4\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z2\.h-z5\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z3\.h-z6\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h-z3\.h},p8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn0/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn7/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[w0,w1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[xzr,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp,sp,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,w1,sxtw ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,w1,uxtw ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z1\.h ?- ?z4\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z2\.h ?- ?z5\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z3\.h ?- ?z6\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h ?- ?z3\.h ?},p8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8/m,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/m,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.h-z3\.h},pn8\.h,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8\.h,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h-z3\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z3\.h},pn0/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h {z0\.h-z3\.h},pn7/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[w0,w1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[xzr,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[sp,sp,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,w1,sxtw#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h-z3\.h},pn8/z,\[x0,w1,uxtw#1\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z2\.h},pn8/z,\[x0,x1,lsl#1\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z3\.h},pn8/z,\[x0,x1,lsl#1\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z0\.h,z4\.h},pn8/z,\[x0,x1,lsl#1\]` -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z8\.h,z16\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z24\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h {z8\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]` -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.d,z8\.d},pn8/z,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn0/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn7/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[w0,w1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[xzr,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp,sp,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,w1,sxtw ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,w1,uxtw ?#1\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z0\.h,z2\.h ?},pn8/z,\[x0,x1,lsl ?#1\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z0\.h,z3\.h ?},pn8/z,\[x0,x1,lsl ?#1\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z0\.h,z4\.h ?},pn8/z,\[x0,x1,lsl ?#1\]` +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z8\.h,z16\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z24\.h,z0\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1h { ?z8\.h,z0\.h ?},pn8/z,\[x0,x1,lsl ?#1\]` +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.d,z8\.d ?},pn8/z,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h, z8\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h,z8\.h},p8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[w0,w30,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[xzr,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[x0,sp,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z4\.h,z8\.h,z12\.h,z16\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h {z20\.h,z24\.h,z28\.h,z0\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h {z0\.d,z4\.d,z8\.d,z12\.d},pn8/z,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h,z8\.h ?},p8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[w0,w30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[xzr,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,sp,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z4\.h,z8\.h,z12\.h,z16\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1h { ?z20\.h,z24\.h,z28\.h,z0\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1h { ?z0\.d,z4\.d,z8\.d,z12\.d ?},pn8/z,\[x0,x1,lsl ?#1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1h {z0\.h, z4\.h, z8\.h, z12\.h}, pn8/z, \[x0, x1, lsl #1\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},p8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[w0,w30,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[xzr,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,sp,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#3\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},p8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[w0,w30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[xzr,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,sp,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#3\]' diff --git a/gas/testsuite/gas/aarch64/sme2-4-noarch.l b/gas/testsuite/gas/aarch64/sme2-4-noarch.l index c061de8..8d2c3ff 100644 --- a/gas/testsuite/gas/aarch64/sme2-4-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-4-noarch.l @@ -1,481 +1,481 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z1\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z30\.h-z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z12\.h-z13\.h},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z3\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z28\.h-z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z8\.h-z11\.h},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z8\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z9\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z10\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z4\.h,z12\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z6\.h,z14\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z7\.h,z15\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z24\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z25\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z26\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z27\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z20\.h,z28\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z21\.h,z29\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z22\.h,z30\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z23\.h,z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z1\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z30\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z1\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z14\.h-z15\.h},pn9/z,\[x26,x3,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H-Z3\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z28\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h-z3\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z8\.h-z11\.h},pn11/z,\[x27,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z8\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z9\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z10\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z11\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z4\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z6\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z7\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z24\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z25\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z26\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z27\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z20\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z21\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z22\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z23\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z8\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z5\.h,z13\.h},pn14/z,\[x15,x24,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11/z,\[x4,x6,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z1\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z30\.h-z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z12\.h-z13\.h},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z3\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z28\.h-z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z8\.h-z11\.h},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z8\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z9\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z10\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z4\.h,z12\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z6\.h,z14\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z7\.h,z15\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z24\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z25\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z26\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z27\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z20\.h,z28\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z21\.h,z29\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z22\.h,z30\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z23\.h,z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z1\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z30\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z1\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z14\.h-z15\.h},pn9/z,\[x26,x3,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H-Z3\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z28\.h-z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h-z3\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z8\.h-z11\.h},pn11/z,\[x27,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z8\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z9\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z10\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z11\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z4\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z6\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z7\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z24\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z25\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z26\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z27\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z20\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z21\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z22\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z23\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z8\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z5\.h,z13\.h},pn14/z,\[x15,x24,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8/Z,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11/z,\[x4,x6,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z1\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z30\.h-z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z12\.h-z13\.h},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z3\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z28\.h-z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z8\.h-z11\.h},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z8\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z9\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z10\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z4\.h,z12\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z6\.h,z14\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z7\.h,z15\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z24\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z25\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z26\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z27\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z20\.h,z28\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z21\.h,z29\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z22\.h,z30\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z23\.h,z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z1\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z30\.h-z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z1\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z14\.h-z15\.h},pn9,\[x26,x3,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H-Z3\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z28\.h-z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h-z3\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z8\.h-z11\.h},pn11,\[x27,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z8\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z9\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z10\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z11\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z4\.h,z12\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z6\.h,z14\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z7\.h,z15\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z24\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z25\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z26\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z27\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z20\.h,z28\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z21\.h,z29\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z22\.h,z30\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z23\.h,z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z8\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z5\.h,z13\.h},pn14,\[x15,x24,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11,\[x4,x6,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z1\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z30\.h-z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z12\.h-z13\.h},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z3\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z28\.h-z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z8\.h-z11\.h},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z8\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z9\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z10\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z4\.h,z12\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z6\.h,z14\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z7\.h,z15\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z24\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z25\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z26\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z27\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z20\.h,z28\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z21\.h,z29\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z22\.h,z30\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z23\.h,z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z1\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z30\.h-z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z1\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z14\.h-z15\.h},pn9,\[x26,x3,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H-Z3\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z28\.h-z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h-z3\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z8\.h-z11\.h},pn11,\[x27,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z8\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z9\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z10\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z11\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z4\.h,z12\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z6\.h,z14\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z7\.h,z15\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z24\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z25\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z26\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z27\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z20\.h,z28\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z21\.h,z29\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z22\.h,z30\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z23\.h,z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z8\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z5\.h,z13\.h},pn14,\[x15,x24,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl 1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {Z0\.H,Z4\.H,Z8\.H,Z12\.H},PN8,\[X0,X1,LSL#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z1\.h,z5\.h,z9\.h,z13\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z2\.h,z6\.h,z10\.h,z14\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z3\.h,z7\.h,z11\.h,z15\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z16\.h,z20\.h,z24\.h,z28\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z18\.h,z22\.h,z26\.h,z30\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z19\.h,z23\.h,z27\.h,z31\.h},pn8,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn15,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x30,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[sp,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,x30,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z0\.h,z4\.h,z8\.h,z12\.h},pn8,\[x0,xzr,lsl#1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h {z17\.h,z21\.h,z25\.h,z29\.h},pn11,\[x4,x6,lsl#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z12\.h ?- ?z13\.h ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z9\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z10\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z11\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z4\.h,z12\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z5\.h,z13\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z6\.h,z14\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z7\.h,z15\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z24\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z25\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z26\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z27\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z20\.h,z28\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z21\.h,z29\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z22\.h,z30\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z23\.h,z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z11\.h ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z14\.h ?- ?z15\.h ?},pn9/z,\[x26,x3,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x27,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z9\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z10\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z11\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z4\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z5\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z6\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z7\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z24\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z25\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z26\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z27\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z20\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z21\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z22\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z23\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z5\.h,z13\.h ?},pn14/z,\[x15,x24,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11/z,\[x4,x6,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z12\.h ?- ?z13\.h ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z9\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z10\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z11\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z4\.h,z12\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z5\.h,z13\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z6\.h,z14\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z7\.h,z15\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z24\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z25\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z26\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z27\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z20\.h,z28\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z21\.h,z29\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z22\.h,z30\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z23\.h,z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z11\.h ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z30\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z1\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z14\.h ?- ?z15\.h ?},pn9/z,\[x26,x3,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z28\.h ?- ?z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h ?- ?z3\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z8\.h ?- ?z11\.h ?},pn11/z,\[x27,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z8\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z9\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z10\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z11\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z4\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z5\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z6\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z7\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z24\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z25\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z26\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z27\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z20\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z21\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z22\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z23\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z8\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z5\.h,z13\.h ?},pn14/z,\[x15,x24,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8/Z,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11/z,\[x4,x6,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z12\.h ?- ?z13\.h ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z8\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z9\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z10\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z11\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z4\.h,z12\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z5\.h,z13\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z6\.h,z14\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z7\.h,z15\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z24\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z25\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z26\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z27\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z20\.h,z28\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z21\.h,z29\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z22\.h,z30\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z23\.h,z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z11\.h ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z14\.h ?- ?z15\.h ?},pn9,\[x26,x3,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x27,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z8\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z9\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z10\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z11\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z4\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z5\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z6\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z7\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z24\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z25\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z26\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z27\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z20\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z21\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z22\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z23\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z8\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z5\.h,z13\.h ?},pn14,\[x15,x24,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11,\[x4,x6,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z12\.h ?- ?z13\.h ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z8\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z9\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z10\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z11\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z4\.h,z12\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z5\.h,z13\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z6\.h,z14\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z7\.h,z15\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z24\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z25\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z26\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z27\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z20\.h,z28\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z21\.h,z29\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z22\.h,z30\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z23\.h,z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z11\.h ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z1\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z30\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z1\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z14\.h ?- ?z15\.h ?},pn9,\[x26,x3,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H ?- ?Z3\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z28\.h ?- ?z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h ?- ?z3\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z8\.h ?- ?z11\.h ?},pn11,\[x27,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z8\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z9\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z10\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z11\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z4\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z5\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z6\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z7\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z24\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z25\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z26\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z27\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z20\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z21\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z22\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z23\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z8\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z5\.h,z13\.h ?},pn14,\[x15,x24,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl 1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?Z0\.H,Z4\.H,Z8\.H,Z12\.H ?},PN8,\[X0,X1,LSL ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z1\.h,z5\.h,z9\.h,z13\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z2\.h,z6\.h,z10\.h,z14\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z3\.h,z7\.h,z11\.h,z15\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z16\.h,z20\.h,z24\.h,z28\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z18\.h,z22\.h,z26\.h,z30\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z19\.h,z23\.h,z27\.h,z31\.h ?},pn8,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn15,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x30,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[sp,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,x30,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8,\[x0,xzr,lsl ?#1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1h { ?z17\.h,z21\.h,z25\.h,z29\.h ?},pn11,\[x4,x6,lsl ?#1\]' diff --git a/gas/testsuite/gas/aarch64/sme2-5-invalid.l b/gas/testsuite/gas/aarch64/sme2-5-invalid.l index c2a6dbc..51bb6c0 100644 --- a/gas/testsuite/gas/aarch64/sme2-5-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-5-invalid.l @@ -1,75 +1,75 @@ [^ :]+: Assembler messages: [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `ld1w 0,pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1w {z0\.s-z1\.s},0,\[x0\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,0' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1w {z0\.s-z2\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z1\.s-z2\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s-z1\.s},p8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 2 -- `ld1w { ?z0\.s ?- ?z1\.s ?},0,\[x0\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,0' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `ld1w { ?z0\.s ?- ?z2\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z1\.s ?- ?z2\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s ?- ?z1\.s ?},p8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8/m,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/m,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z1\.s},pn8\.s,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8\.s,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s-z1\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z1\.s},pn0/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z1\.s},pn7/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[w0,w1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[xzr,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[sp,sp,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,w1,sxtw#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z1\.s},pn8/z,\[x0,w1,uxtw#2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z1\.s-z4\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z2\.s-z5\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z3\.s-z6\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s-z3\.s},p8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn0/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn7/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[w0,w1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[xzr,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp,sp,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,w1,sxtw ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,w1,uxtw ?#2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z1\.s ?- ?z4\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z2\.s ?- ?z5\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z3\.s ?- ?z6\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s ?- ?z3\.s ?},p8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8/m,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/m,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.s-z3\.s},pn8\.s,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8\.s,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s-z3\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z3\.s},pn0/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w {z0\.s-z3\.s},pn7/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[w0,w1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[xzr,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[sp,sp,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#3\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#4\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,w1,sxtw#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s-z3\.s},pn8/z,\[x0,w1,uxtw#2\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z2\.s},pn8/z,\[x0,x1,lsl#2\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z3\.s},pn8/z,\[x0,x1,lsl#2\]` -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z0\.s,z4\.s},pn8/z,\[x0,x1,lsl#2\]` -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z8\.s,z16\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z24\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w {z8\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]` -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.h,z8\.h},pn8/z,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn0/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn7/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[w0,w1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[xzr,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp,sp,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#3\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#4\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,w1,sxtw ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,w1,uxtw ?#2\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z0\.s,z2\.s ?},pn8/z,\[x0,x1,lsl ?#2\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z0\.s,z3\.s ?},pn8/z,\[x0,x1,lsl ?#2\]` +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z0\.s,z4\.s ?},pn8/z,\[x0,x1,lsl ?#2\]` +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z8\.s,z16\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z24\.s,z0\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 or 8 at operand 1 -- `ld1w { ?z8\.s,z0\.s ?},pn8/z,\[x0,x1,lsl ?#2\]` +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.h,z8\.h ?},pn8/z,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s, z8\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s,z8\.s},p8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[w0,w30,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[xzr,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[x0,sp,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#1\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z4\.s,z8\.s,z12\.s,z16\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w {z20\.s,z24\.s,z28\.s,z0\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w {z0\.h,z4\.h,z8\.h,z12\.h},pn8/z,\[x0,x1,lsl#2\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s,z8\.s ?},p8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[w0,w30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[xzr,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,sp,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl ?#1\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z4\.s,z8\.s,z12\.s,z16\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `ld1w { ?z20\.s,z24\.s,z28\.s,z0\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `ld1w { ?z0\.h,z4\.h,z8\.h,z12\.h ?},pn8/z,\[x0,x1,lsl ?#2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: ld1w {z0\.s, z4\.s, z8\.s, z12\.s}, pn8/z, \[x0, x1, lsl #2\] -[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},p8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[w0,w30,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[xzr,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,sp,lsl#2\]' -[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 1 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},p8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: expected a 64-bit base register at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[w0,w30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid base register at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[xzr,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid offset register at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,sp,lsl ?#2\]' +[^ :]+:[0-9]+: Error: invalid addressing mode at operand 3 -- `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#1\]' diff --git a/gas/testsuite/gas/aarch64/sme2-5-noarch.l b/gas/testsuite/gas/aarch64/sme2-5-noarch.l index 6eebd64..badd777 100644 --- a/gas/testsuite/gas/aarch64/sme2-5-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-5-noarch.l @@ -1,481 +1,481 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z1\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z30\.s-z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z12\.s-z13\.s},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z3\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z28\.s-z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z8\.s-z11\.s},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z8\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z9\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z10\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z4\.s,z12\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z6\.s,z14\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z7\.s,z15\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z24\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z25\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z26\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z27\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z20\.s,z28\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z21\.s,z29\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z22\.s,z30\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z23\.s,z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z1\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z30\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z1\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z14\.s-z15\.s},pn9/z,\[x26,x3,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S-Z3\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z28\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s-z3\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z8\.s-z11\.s},pn11/z,\[x27,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z8\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z9\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z10\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z11\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z4\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z6\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z7\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z24\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z25\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z26\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z27\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z20\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z21\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z22\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z23\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z8\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z5\.s,z13\.s},pn14/z,\[x15,x24,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ld1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11/z,\[x4,x6,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z1\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z30\.s-z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z12\.s-z13\.s},pn13/z,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z3\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z28\.s-z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z8\.s-z11\.s},pn11/z,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z8\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z9\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z10\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z4\.s,z12\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z6\.s,z14\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z7\.s,z15\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z24\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z25\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z26\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z27\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z20\.s,z28\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z21\.s,z29\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z22\.s,z30\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z23\.s,z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn10/z,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14/z,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z1\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z30\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z1\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z14\.s-z15\.s},pn9/z,\[x26,x3,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S-Z3\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z28\.s-z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s-z3\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z8\.s-z11\.s},pn11/z,\[x27,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z8\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z9\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z10\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z11\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z4\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z6\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z7\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z24\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z25\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z26\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z27\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z20\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z21\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z22\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z23\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z8\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z5\.s,z13\.s},pn14/z,\[x15,x24,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8/Z,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15/z,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8/z,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11/z,\[x4,x6,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z1\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z30\.s-z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z12\.s-z13\.s},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z3\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z28\.s-z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z8\.s-z11\.s},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z8\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z9\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z10\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z4\.s,z12\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z6\.s,z14\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z7\.s,z15\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z24\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z25\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z26\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z27\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z20\.s,z28\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z21\.s,z29\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z22\.s,z30\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z23\.s,z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z1\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z30\.s-z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z1\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z14\.s-z15\.s},pn9,\[x26,x3,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S-Z3\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z28\.s-z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s-z3\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z8\.s-z11\.s},pn11,\[x27,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z8\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z9\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z10\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z11\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z4\.s,z12\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z6\.s,z14\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z7\.s,z15\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z24\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z25\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z26\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z27\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z20\.s,z28\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z21\.s,z29\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z22\.s,z30\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z23\.s,z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z8\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z5\.s,z13\.s},pn14,\[x15,x24,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `st1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11,\[x4,x6,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z1\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z30\.s-z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z12\.s-z13\.s},pn13,\[x11,#-10,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z3\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z28\.s-z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z8\.s-z11\.s},pn11,\[x17,#20,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z8\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z9\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z10\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z4\.s,z12\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z6\.s,z14\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z7\.s,z15\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z24\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z25\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z26\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z27\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z20\.s,z28\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z21\.s,z29\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z22\.s,z30\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z23\.s,z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#-16,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,#14,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn10,\[x22,#6,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#0,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#-32,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,#28,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn14,\[x29,#8,mul vl\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z1\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z30\.s-z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z1\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z14\.s-z15\.s},pn9,\[x26,x3,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S-Z3\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z28\.s-z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s-z3\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z8\.s-z11\.s},pn11,\[x27,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z8\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z9\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z10\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z11\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z4\.s,z12\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z6\.s,z14\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z7\.s,z15\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z24\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z25\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z26\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z27\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z20\.s,z28\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z21\.s,z29\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z22\.s,z30\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z23\.s,z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z8\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z5\.s,z13\.s},pn14,\[x15,x24,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl 2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {Z0\.S,Z4\.S,Z8\.S,Z12\.S},PN8,\[X0,X1,LSL#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z1\.s,z5\.s,z9\.s,z13\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z2\.s,z6\.s,z10\.s,z14\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z3\.s,z7\.s,z11\.s,z15\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z16\.s,z20\.s,z24\.s,z28\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z18\.s,z22\.s,z26\.s,z30\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z19\.s,z23\.s,z27\.s,z31\.s},pn8,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn15,\[x0,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x30,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[sp,x1,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,x30,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z0\.s,z4\.s,z8\.s,z12\.s},pn8,\[x0,xzr,lsl#2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w {z17\.s,z21\.s,z25\.s,z29\.s},pn11,\[x4,x6,lsl#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z12\.s ?- ?z13\.s ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z9\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z10\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z11\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z4\.s,z12\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z5\.s,z13\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z6\.s,z14\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z7\.s,z15\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z24\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z25\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z26\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z27\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z20\.s,z28\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z21\.s,z29\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z22\.s,z30\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z23\.s,z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z11\.s ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z14\.s ?- ?z15\.s ?},pn9/z,\[x26,x3,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x27,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z9\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z10\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z11\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z4\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z5\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z6\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z7\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z24\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z25\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z26\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z27\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z20\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z21\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z22\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z23\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z5\.s,z13\.s ?},pn14/z,\[x15,x24,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ld1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11/z,\[x4,x6,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z12\.s ?- ?z13\.s ?},pn13/z,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z9\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z10\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z11\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z4\.s,z12\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z5\.s,z13\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z6\.s,z14\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z7\.s,z15\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z24\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z25\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z26\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z27\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z20\.s,z28\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z21\.s,z29\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z22\.s,z30\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z23\.s,z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z11\.s ?},pn10/z,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14/z,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z30\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z1\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z14\.s ?- ?z15\.s ?},pn9/z,\[x26,x3,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z28\.s ?- ?z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s ?- ?z3\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z8\.s ?- ?z11\.s ?},pn11/z,\[x27,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z8\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z9\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z10\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z11\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z4\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z5\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z6\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z7\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z24\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z25\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z26\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z27\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z20\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z21\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z22\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z23\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z8\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z5\.s,z13\.s ?},pn14/z,\[x15,x24,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8/Z,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15/z,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8/z,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `ldnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11/z,\[x4,x6,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z12\.s ?- ?z13\.s ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z8\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z9\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z10\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z11\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z4\.s,z12\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z5\.s,z13\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z6\.s,z14\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z7\.s,z15\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z24\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z25\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z26\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z27\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z20\.s,z28\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z21\.s,z29\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z22\.s,z30\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z23\.s,z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z11\.s ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z14\.s ?- ?z15\.s ?},pn9,\[x26,x3,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x27,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z8\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z9\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z10\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z11\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z4\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z5\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z6\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z7\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z24\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z25\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z26\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z27\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z20\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z21\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z22\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z23\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z8\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z5\.s,z13\.s ?},pn14,\[x15,x24,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `st1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11,\[x4,x6,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z12\.s ?- ?z13\.s ?},pn13,\[x11,#-10,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x17,#20,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z8\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z9\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z10\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z11\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z4\.s,z12\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z5\.s,z13\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z6\.s,z14\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z7\.s,z15\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z24\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z25\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z26\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z27\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z20\.s,z28\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z21\.s,z29\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z22\.s,z30\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z23\.s,z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,#-16,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,#14,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z11\.s ?},pn10,\[x22,#6,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#0,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#-32,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,#28,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn14,\[x29,#8,mul vl\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z1\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z30\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z1\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z14\.s ?- ?z15\.s ?},pn9,\[x26,x3,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S ?- ?Z3\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z28\.s ?- ?z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s ?- ?z3\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z8\.s ?- ?z11\.s ?},pn11,\[x27,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z8\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z9\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z10\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z11\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z4\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z5\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z6\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z7\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z24\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z25\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z26\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z27\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z20\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z21\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z22\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z23\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z8\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z5\.s,z13\.s ?},pn14,\[x15,x24,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl 2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?Z0\.S,Z4\.S,Z8\.S,Z12\.S ?},PN8,\[X0,X1,LSL ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z1\.s,z5\.s,z9\.s,z13\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z2\.s,z6\.s,z10\.s,z14\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z3\.s,z7\.s,z11\.s,z15\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z16\.s,z20\.s,z24\.s,z28\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z18\.s,z22\.s,z26\.s,z30\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z19\.s,z23\.s,z27\.s,z31\.s ?},pn8,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn15,\[x0,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x30,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[sp,x1,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,x30,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z0\.s,z4\.s,z8\.s,z12\.s ?},pn8,\[x0,xzr,lsl ?#2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `stnt1w { ?z17\.s,z21\.s,z25\.s,z29\.s ?},pn11,\[x4,x6,lsl ?#2\]' diff --git a/gas/testsuite/gas/aarch64/sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sme2-6-invalid.l index cac3ec4..652ab22 100644 --- a/gas/testsuite/gas/aarch64/sme2-6-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-6-invalid.l @@ -40,7 +40,7 @@ [^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext p8\.b,pn8' [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[-1\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[4\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[1<<32\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 2 -- `pext p8\.b,pn8\[1 ?<< ?32\]' [^ :]+:[0-9]+: Error: operand mismatch -- `pext p8\.b,pn8\.b\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: pext p8\.b, pn8\[0\] @@ -55,22 +55,22 @@ [^ :]+:[0-9]+: Info: pext p8\.h, pn8\[0\] [^ :]+:[0-9]+: Info: pext p8\.s, pn8\[0\] [^ :]+:[0-9]+: Info: pext p8\.d, pn8\[0\] -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `pext {p0\.b-p2\.b},pn8\[0\]' -[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `pext {p0-p1},pn8\[0\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn7\[0\]' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext {p0\.b-p1\.b},pn0\[0\]' -[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext {p0\.b-p1\.b},pn8' -[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext {p0\.b-p1\.b},p0\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `pext {p0\.b-p1\.b},pn8\.b\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `pext { ?p0\.b ?- ?p2\.b ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `pext { ?p0 ?- ?p1 ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn7\[0\]' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn0\[0\]' +[^ :]+:[0-9]+: Error: missing register index at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8' +[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},p0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\.b\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: pext {p0\.b-p1\.b}, pn8\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: pext {p0\.h-p1\.h}, pn8\[0\] [^ :]+:[0-9]+: Info: pext {p0\.s-p1\.s}, pn8\[0\] [^ :]+:[0-9]+: Info: pext {p0\.d-p1\.d}, pn8\[0\] -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[2\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext {p0\.b-p1\.b},pn8\[1<<32\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\[2\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 2 -- `pext { ?p0\.b ?- ?p1\.b ?},pn8\[1 ?<< ?32\]' [^ :]+:[0-9]+: Error: expected an SVE predicate register at operand 1 -- `ptrue 0' [^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn0\.b' [^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 1 -- `ptrue pn7\.b' @@ -88,49 +88,49 @@ [^ :]+:[0-9]+: Info: ptrue pn8\.h [^ :]+:[0-9]+: Info: ptrue pn8\.s [^ :]+:[0-9]+: Info: ptrue pn8\.d -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sel 0,pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `sel {z0\.b-z1\.b},0,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected '{' at operand 3 -- `sel {z0\.b-z1\.b},pn8,0,{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected '{' at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},0' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `sel {z0\.b-z1\.b},p8,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn7,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/z,{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `sel 0,pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected an SVE predicate-as-counter register at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},0,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected '{' at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,0,{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected '{' at operand 4 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},0' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z1\.b ?- ?z2\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a predicate-as-counter rather than predicate-as-mask register at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},p8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},pn7,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sel { ?z0\.b ?- ?z1\.b ?},pn8/z,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h} [^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.b-z1\.b},pn8/m,{z0\.b-z1\.b},{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sel { ?z0\.b ?- ?z1\.b ?},pn8/m,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sel {z0\.h-z1\.h}, pn8, {z0\.h-z1\.h}, {z0\.h-z1\.h} [^ :]+:[0-9]+: Info: sel {z0\.s-z1\.s}, pn8, {z0\.s-z1\.s}, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: sel {z0\.d-z1\.d}, pn8, {z0\.d-z1\.d}, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel {z0\.b-z1\.b},pn0,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z11\.b-z12\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z17\.b-z18\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z1\.b-z4\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z10\.b-z13\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel {z15\.b-z18\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z1\.b-z4\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z22\.b-z25\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z27\.b-z30\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z5\.b-z8\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z14\.b-z17\.b}' -[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z19\.b-z22\.b}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z1\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z2\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z2\.b}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel {z0\.b-z2\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z2\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 4 -- `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z2\.b}' -[^ :]+:[0-9]+: Error: operand mismatch -- `sel {z0\.q-z1\.q},pn8,{z0\.q-z1\.q},{z0\.q-z1\.q}' +[^ :]+:[0-9]+: Error: pn8-pn15 expected at operand 2 -- `sel { ?z0\.b ?- ?z1\.b ?},pn0,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z11\.b ?- ?z12\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z17\.b ?- ?z18\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z1\.b ?- ?z4\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z10\.b ?- ?z13\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `sel { ?z15\.b ?- ?z18\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z1\.b ?- ?z4\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z22\.b ?- ?z25\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z27\.b ?- ?z30\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z5\.b ?- ?z8\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z14\.b ?- ?z17\.b ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z19\.b ?- ?z22\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel { ?z0\.b ?- ?z2\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 4 -- `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z2\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `sel { ?z0\.b ?- ?z2\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 4 -- `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z2\.b ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sel { ?z0\.q ?- ?z1\.q ?},pn8,{ ?z0\.q ?- ?z1\.q ?},{ ?z0\.q ?- ?z1\.q ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sel {z0\.b-z1\.b}, pn8, {z0\.b-z1\.b}, {z0\.b-z1\.b} [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sme2-6-noarch.l index 173e99a..b521215 100644 --- a/gas/testsuite/gas/aarch64/sme2-6-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-6-noarch.l @@ -51,42 +51,42 @@ [^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn15\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `pext p0\.d,pn8\[3\]' [^ :]+:[0-9]+: Error: selected processor does not support `pext p7\.d,pn9\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b,p1\.b},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.B-P1\.B},PN8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.b-p15\.b},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b,p0\.b},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.b-p0\.b},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn15\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.b-p1\.b},pn8\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p7\.b-p8\.b},pn12\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h,p1\.h},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.H-P1\.H},PN8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.h-p15\.h},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h,p0\.h},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.h-p0\.h},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn15\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.h-p1\.h},pn8\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p2\.h-p3\.h},pn14\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s,p1\.s},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.S-P1\.S},PN8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.s-p15\.s},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s,p0\.s},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.s-p0\.s},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn15\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.s-p1\.s},pn8\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p5\.s-p6\.s},pn13\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d,p1\.d},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {P0\.D-P1\.D},PN8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p14\.d-p15\.d},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d,p0\.d},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p15\.d-p0\.d},pn8\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn15\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p0\.d-p1\.d},pn8\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `pext {p12\.d-p13\.d},pn9\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b,p1\.b ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b ?- ?p1\.b ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.B ?- ?P1\.B ?},PN8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.b ?- ?p15\.b ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.b,p0\.b ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.b ?- ?p0\.b ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b ?- ?p1\.b ?},pn15\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.b ?- ?p1\.b ?},pn8\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p7\.b ?- ?p8\.b ?},pn12\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h,p1\.h ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h ?- ?p1\.h ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.H ?- ?P1\.H ?},PN8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.h ?- ?p15\.h ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.h,p0\.h ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.h ?- ?p0\.h ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h ?- ?p1\.h ?},pn15\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.h ?- ?p1\.h ?},pn8\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p2\.h ?- ?p3\.h ?},pn14\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s,p1\.s ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s ?- ?p1\.s ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.S ?- ?P1\.S ?},PN8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.s ?- ?p15\.s ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.s,p0\.s ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.s ?- ?p0\.s ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s ?- ?p1\.s ?},pn15\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.s ?- ?p1\.s ?},pn8\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p5\.s ?- ?p6\.s ?},pn13\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d,p1\.d ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d ?- ?p1\.d ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?P0\.D ?- ?P1\.D ?},PN8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p14\.d ?- ?p15\.d ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.d,p0\.d ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p15\.d ?- ?p0\.d ?},pn8\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d ?- ?p1\.d ?},pn15\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p0\.d ?- ?p1\.d ?},pn8\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `pext { ?p12\.d ?- ?p13\.d ?},pn9\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.b' [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn11\.b' [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.b' @@ -99,47 +99,47 @@ [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn8\.d' [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn12\.d' [^ :]+:[0-9]+: Error: selected processor does not support `ptrue pn15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.b-z31\.b},pn8,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn15,{z0\.b-z1\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z30\.b-z31\.b},{z0\.b-z1\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z1\.b},pn8,{z0\.b-z1\.b},{z30\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z2\.b-z3\.b},pn12,{z6\.b-z7\.b},{z10\.b-z11\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.h-z31\.h},pn8,{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn15,{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z1\.h},pn8,{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z12\.h-z13\.h},pn9,{z14\.h-z15\.h},{z16\.h-z17\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.s-z31\.s},pn8,{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn15,{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z1\.s},pn8,{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z18\.s-z19\.s},pn11,{z22\.s-z23\.s},{z24\.s-z25\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z30\.d-z31\.d},pn8,{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn15,{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z1\.d},pn8,{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.d-z9\.d},pn14,{z26\.d-z27\.d},{z28\.d-z29\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.b-z31\.b},pn8,{z0\.b-z3\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z28\.b-z31\.b},{z0\.b-z3\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.b-z3\.b},pn8,{z0\.b-z3\.b},{z28\.b-z31\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z4\.b-z7\.b},pn10,{z8\.b-z11\.b},{z12\.b-z15\.b}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.h-z31\.h},pn8,{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.h-z3\.h},pn8,{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z8\.h-z11\.h},pn10,{z16\.h-z19\.h},{z20\.h-z23\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.s-z31\.s},pn8,{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.s-z3\.s},pn8,{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z16\.s-z19\.s},pn10,{z20\.s-z23\.s},{z24\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z28\.d-z31\.d},pn8,{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z0\.d-z3\.d},pn8,{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `sel {z20\.d-z23\.d},pn10,{z4\.d-z7\.d},{z8\.d-z11\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.b ?- ?z31\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn15,{ ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z30\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z1\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z1\.b ?},pn8,{ ?z0\.b ?- ?z1\.b ?},{ ?z30\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z2\.b ?- ?z3\.b ?},pn12,{ ?z6\.b ?- ?z7\.b ?},{ ?z10\.b ?- ?z11\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn8,{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.h ?- ?z31\.h ?},pn8,{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn15,{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn8,{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z1\.h ?},pn8,{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z12\.h ?- ?z13\.h ?},pn9,{ ?z14\.h ?- ?z15\.h ?},{ ?z16\.h ?- ?z17\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn8,{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.s ?- ?z31\.s ?},pn8,{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn15,{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn8,{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z1\.s ?},pn8,{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z18\.s ?- ?z19\.s ?},pn11,{ ?z22\.s ?- ?z23\.s ?},{ ?z24\.s ?- ?z25\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn8,{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z30\.d ?- ?z31\.d ?},pn8,{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn15,{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn8,{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z1\.d ?},pn8,{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z8\.d ?- ?z9\.d ?},pn14,{ ?z26\.d ?- ?z27\.d ?},{ ?z28\.d ?- ?z29\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.b ?- ?z31\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z28\.b ?- ?z31\.b ?},{ ?z0\.b ?- ?z3\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.b ?- ?z3\.b ?},pn8,{ ?z0\.b ?- ?z3\.b ?},{ ?z28\.b ?- ?z31\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z4\.b ?- ?z7\.b ?},pn10,{ ?z8\.b ?- ?z11\.b ?},{ ?z12\.b ?- ?z15\.b ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z3\.h ?},pn8,{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.h ?- ?z31\.h ?},pn8,{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z3\.h ?},pn8,{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.h ?- ?z3\.h ?},pn8,{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z8\.h ?- ?z11\.h ?},pn10,{ ?z16\.h ?- ?z19\.h ?},{ ?z20\.h ?- ?z23\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z3\.s ?},pn8,{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.s ?- ?z31\.s ?},pn8,{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z3\.s ?},pn8,{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.s ?- ?z3\.s ?},pn8,{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z16\.s ?- ?z19\.s ?},pn10,{ ?z20\.s ?- ?z23\.s ?},{ ?z24\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z3\.d ?},pn8,{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z28\.d ?- ?z31\.d ?},pn8,{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z3\.d ?},pn8,{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z0\.d ?- ?z3\.d ?},pn8,{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sel { ?z20\.d ?- ?z23\.d ?},pn10,{ ?z4\.d ?- ?z7\.d ?},{ ?z8\.d ?- ?z11\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-8-invalid.l b/gas/testsuite/gas/aarch64/sme2-8-invalid.l index aef9b1a..3477af0 100644 --- a/gas/testsuite/gas/aarch64/sme2-8-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-8-invalid.l @@ -2,13 +2,13 @@ [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `zero 0' [^ :]+:[0-9]+: Error: expected '{' at operand 1 -- `zero zt0' [^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `zero {' -[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {foo}' -[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {zt}' -[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {x0}' -[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero {z0}' -[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0' -[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0\.b}' -[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero {zt0,zt0}' +[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?foo ?}' +[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?zt ?}' +[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?x0 ?}' +[^ :]+:[0-9]+: Error: expected ZT0 or a ZA mask at operand 1 -- `zero { ?z0 ?}' +[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero { ?zt0' +[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero { ?zt0\.b ?}' +[^ :]+:[0-9]+: Error: expected '}' after ZT0 at operand 1 -- `zero { ?zt0,zt0 ?}' [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt 0,zt0\[0\]' [^ :]+:[0-9]+: Error: expected a register at operand 2 -- `movt x0,0' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0,x0' @@ -79,49 +79,49 @@ [^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 0,zt0,z0\[0\]' [^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti2 z0\.b,0,z0\[0\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z0\.b,zt0,0' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z1\.b-z2\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z1\.b},z0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z1\.b},za,z0\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.h-z1\.h},zt0,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z1\.b ?- ?z2\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.b ?- ?z1\.b ?},z0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.b ?- ?z1\.b ?},za,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 {z0\.h-z1\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti2 {z0\.b-z1\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti2 {z0\.s-z1\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0\.h-z1\.h},zt0,z0\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0\.h-z1\.h},zt0,z0\[8\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.d-z1\.d},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[8\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.d ?- ?z1\.d ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 {z0\.b-z1\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti2 {z0\.h-z1\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti2 {z0\.s-z1\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.q-z1\.q},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.q ?- ?z1\.q ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 {z0\.b-z1\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti2 {z0\.h-z1\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti2 {z0\.s-z1\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z1\.s-z4\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z2\.s-z5\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 {z3\.s-z6\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.s-z3\.s},z0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 {z0\.b-z3\.b},za,z0\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.b-z3\.b},zt0,z0\.b\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z1\.s ?- ?z4\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z2\.s ?- ?z5\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti2 { ?z3\.s ?- ?z6\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.s ?- ?z3\.s ?},z0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 { ?z0\.b ?- ?z3\.b ?},za,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\.b\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 {z0\.b-z3\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti2 {z0\.h-z3\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti2 {z0\.s-z3\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z0\.b-z3\.b},zt0,z0\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z0\.b-z3\.b},zt0,z0\[4\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.d-z3\.d},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[4\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.d ?- ?z3\.d ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 {z0\.b-z3\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti2 {z0\.h-z3\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti2 {z0\.s-z3\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 {z0\.q-z3\.q},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 { ?z0\.q ?- ?z3\.q ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 {z0\.b-z3\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): @@ -157,50 +157,50 @@ [^ :]+:[0-9]+: Info: luti4 z0\.h, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti4 z0\.s, zt0, z0\[0\] [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z0\.h,zt0,zt0' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z1\.h-z2\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.h-z1\.h},z0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.h-z1\.h},za,z0\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.h-z1\.h},zt0,z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z1\.h ?- ?z2\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.h ?- ?z1\.h ?},z0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.h ?- ?z1\.h ?},za,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z0\.h-z1\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti4 {z0\.b-z1\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti4 {z0\.s-z1\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0\.h-z1\.h},zt0,z0\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0\.h-z1\.h},zt0,z0\[4\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.d-z1\.d},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[4\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.d ?- ?z1\.d ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z0\.b-z1\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti4 {z0\.h-z1\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti4 {z0\.s-z1\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.q-z1\.q},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.q ?- ?z1\.q ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z0\.b-z1\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti4 {z0\.h-z1\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti4 {z0\.s-z1\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z1\.s-z4\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z2\.s-z5\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 {z3\.s-z6\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.s-z3\.s},z0,z0\[0\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z0\.s-z3\.s},za,z0\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.s-z3\.s},zt0,z0\.s\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z1\.s ?- ?z4\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z2\.s ?- ?z5\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 { ?z3\.s ?- ?z6\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.s ?- ?z3\.s ?},z0,z0\[0\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z0\.s ?- ?z3\.s ?},za,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\.s\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z0\.s-z3\.s}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti4 {z0\.b-z3\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti4 {z0\.h-z3\.h}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z0\.s-z3\.s},zt0,z0\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z0\.s-z3\.s},zt0,z0\[2\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `luti4 {z0\.b-z3\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.d-z3\.d},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[2\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `luti4 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.d ?- ?z3\.d ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z0\.b-z3\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: luti4 {z0\.h-z3\.h}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: luti4 {z0\.s-z3\.s}, zt0, z0\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z0\.q-z3\.q},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z0\.q ?- ?z3\.q ?},zt0,z0\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z0\.b-z3\.b}, zt0, z0\[0\] [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-8-noarch.l b/gas/testsuite/gas/aarch64/sme2-8-noarch.l index 994b359..149725d 100644 --- a/gas/testsuite/gas/aarch64/sme2-8-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-8-noarch.l @@ -1,6 +1,6 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `zero {zt0}' -[^ :]+:[0-9]+: Error: selected processor does not support `zero {ZT0}' +[^ :]+:[0-9]+: Error: selected processor does not support `zero { ?zt0 ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `zero { ?ZT0 ?}' [^ :]+:[0-9]+: Error: selected processor does not support `movt x0,zt0\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `movt X0,ZT0\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `movt x30,zt0\[0\]' @@ -39,32 +39,32 @@ [^ :]+:[0-9]+: Error: selected processor does not support `luti2 z31\.s,zt0,z0\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.s,zt0,z31\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `luti2 z0\.s,zt0,z0\[15\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {Z0\.B-Z1\.B},ZT0,Z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.b-z31\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z1\.b},zt0,z0\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.h-z31\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z1\.h},zt0,z0\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z30\.s-z31\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z1\.s},zt0,z0\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {Z0\.B-Z3\.B},ZT0,Z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.b-z31\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.b-z3\.b},zt0,z0\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.h-z31\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.h-z3\.h},zt0,z0\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z28\.s-z31\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti2 {z0\.s-z3\.s},zt0,z0\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?Z0\.B ?- ?Z1\.B ?},ZT0,Z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z30\.b ?- ?z31\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z1\.b ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z30\.h ?- ?z31\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z30\.s ?- ?z31\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z1\.s ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?Z0\.B ?- ?Z3\.B ?},ZT0,Z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z28\.b ?- ?z31\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.b ?- ?z3\.b ?},zt0,z0\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z28\.h ?- ?z31\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z3\.h ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z28\.s ?- ?z31\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z3\.s ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti2 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[3\]' [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.b,zt0,z0\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `luti4 Z0\.b,ZT0,Z0\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z31\.b,zt0,z0\[0\]' @@ -79,26 +79,26 @@ [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z31\.s,zt0,z0\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.s,zt0,z31\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `luti4 z0\.s,zt0,z0\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.b-Z1\.b},ZT0,Z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.b-z31\.b},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.b-z1\.b},zt0,z0\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.H-Z1\.H},ZT0,Z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.h-z31\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z1\.h},zt0,z0\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z30\.s-z31\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z1\.s},zt0,z0\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {Z0\.H-Z3\.H},ZT0,Z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z28\.h-z31\.h},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.h-z3\.h},zt0,z0\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z28\.s-z31\.s},zt0,z0\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z31\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `luti4 {z0\.s-z3\.s},zt0,z0\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?Z0\.b ?- ?Z1\.b ?},ZT0,Z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z30\.b ?- ?z31\.b ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.b ?- ?z1\.b ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.b ?- ?z1\.b ?},zt0,z0\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?Z0\.H ?- ?Z1\.H ?},ZT0,Z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z30\.h ?- ?z31\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z1\.h ?},zt0,z0\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z30\.s ?- ?z31\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z1\.s ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z1\.s ?},zt0,z0\[3\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?Z0\.H ?- ?Z3\.H ?},ZT0,Z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z28\.h ?- ?z31\.h ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z3\.h ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.h ?- ?z3\.h ?},zt0,z0\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z28\.s ?- ?z31\.s ?},zt0,z0\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z31\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `luti4 { ?z0\.s ?- ?z3\.s ?},zt0,z0\[1\]' diff --git a/gas/testsuite/gas/aarch64/sme2-9-invalid.l b/gas/testsuite/gas/aarch64/sme2-9-invalid.l index 0063e94..9de408e 100644 --- a/gas/testsuite/gas/aarch64/sme2-9-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-9-invalid.l @@ -1,175 +1,175 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `add za\.s\[w8,0\],0' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z1\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z4\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z2\.s-z5\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z3\.s-z6\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z1\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1}' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{ ?z0 ?- ?z1 ?}' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `add 0,{ ?z0\.s ?- ?z1\.s ?},z0\.s' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `add za\.s\[w8,0\],0,z0\.s' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},0' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w0,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.s\[w31,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,1<<63\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z31\.s' -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `add za\.s\[w8,0:0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `add za\.s\[w8,0:-1\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:1\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:100\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z16\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},z16\.s' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z4\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s,z1\.s,z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.s\[w8,0\],{z0\.s,z1\.s,z5\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},z0\.s' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},0' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w0,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.s\[w31,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,1<<63\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z31\.s' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `add za\.s\[w8,0:0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `add za\.s\[w8,0:-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `add za\.s\[w8,0:100\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z16\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z16\.s' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z4\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s,z1\.s,z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s,z1\.s,z5\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{z0-z1},z0\.s' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{z0\.s-z1\.s},z0' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.s\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.s' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},z0' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z2\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z15\.s-z16\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z31\.s,z0\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z1\.s-z4\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z2\.s-z5\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{z3\.s-z6\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z15\.s-z18\.s}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z29\.s,z30\.s,z31\.s,z0\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{z0\.s-z2\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z4\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z1\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{z0\.s-z3\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z15\.s ?- ?z16\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z31\.s,z0\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w7,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.s\[w12,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,-1\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.s\[w8,8\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z1\.s ?- ?z4\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z2\.s ?- ?z5\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.s\[w8,0\],{ ?z3\.s ?- ?z6\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z15\.s ?- ?z18\.s ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z29\.s,z30\.s,z31\.s,z0\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z2\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z4\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z3\.s}, {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d} -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z0\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `add {z0\.b-z2\.b},{z0\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z1\.b},{z2\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z1\.b-z2\.b},{z1\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z31\.b,z0\.b},{z31\.b,z0\.b},z0\.b' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z16\.b' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z31\.b' -[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z1\.b},{z0\.h-z1\.h},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `add { ?z0\.b ?- ?z2\.b ?},{ ?z0\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z2\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z1\.b ?- ?z2\.b ?},{ ?z1\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z31\.b,z0\.b ?},{ ?z31\.b,z0\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z16\.b' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z31\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.h ?- ?z1\.h ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h [^ :]+:[0-9]+: Info: add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h [^ :]+:[0-9]+: Info: add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.q-z1\.q},{z0\.q-z1\.q},z0\.q' +[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.q ?- ?z1\.q ?},{ ?z0\.q ?- ?z1\.q ?},z0\.q' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add {z0\.b-z1\.b}, {z0\.b-z1\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add {z0\.h-z1\.h}, {z0\.h-z1\.h}, z0\.h [^ :]+:[0-9]+: Info: add {z0\.s-z1\.s}, {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: add {z0\.d-z1\.d}, {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z0\.b-z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add {z0\.b-z3\.b},{z2\.b-z5\.b},z0\.b' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z1\.b-z4\.b},{z1\.b-z4\.b},z0\.b' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z2\.b-z5\.b},{z2\.b-z5\.b},z0\.b' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z3\.b-z6\.b},{z3\.b-z6\.b},z0\.b' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add {z31\.b,z0\.b,z1\.b,z2\.b},{z31\.b,z0\.b,z1\.b,z2\.b},z0\.b' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z16\.b' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z31\.b' -[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z3\.b},{z0\.h-z3\.h},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z2\.b ?- ?z5\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z1\.b ?- ?z4\.b ?},{ ?z1\.b ?- ?z4\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z2\.b ?- ?z5\.b ?},{ ?z2\.b ?- ?z5\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z3\.b ?- ?z6\.b ?},{ ?z3\.b ?- ?z6\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `add { ?z31\.b,z0\.b,z1\.b,z2\.b ?},{ ?z31\.b,z0\.b,z1\.b,z2\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z16\.b' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z31\.b' +[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.h ?- ?z3\.h ?},z0\.b' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h [^ :]+:[0-9]+: Info: add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s [^ :]+:[0-9]+: Info: add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h [^ :]+:[0-9]+: Info: add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s [^ :]+:[0-9]+: Info: add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `add {z0\.q-z3\.q},{z0\.q-z3\.q},z0\.q' +[^ :]+:[0-9]+: Error: operand mismatch -- `add { ?z0\.q ?- ?z3\.q ?},{ ?z0\.q ?- ?z3\.q ?},z0\.q' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add {z0\.b-z3\.b}, {z0\.b-z3\.b}, z0\.b [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add {z0\.h-z3\.h}, {z0\.h-z3\.h}, z0\.h [^ :]+:[0-9]+: Info: add {z0\.s-z3\.s}, {z0\.s-z3\.s}, z0\.s [^ :]+:[0-9]+: Info: add {z0\.d-z3\.d}, {z0\.d-z3\.d}, z0\.d -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.b\[w8,0\],{z0\.b-z1\.b}' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sub { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.b\[w8,0\],{ ?z0\.b ?- ?z1\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fadd za\.s\[w8, 0\], {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fadd za\.d\[w8, 0\], {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.h\[w8,0\],{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.h\[w8,0\],{ ?z0\.h ?- ?z1\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-9-noarch.l b/gas/testsuite/gas/aarch64/sme2-9-noarch.l index 1a2ad07..c92cfe6 100644 --- a/gas/testsuite/gas/aarch64/sme2-9-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-9-noarch.l @@ -1,177 +1,177 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,3\],{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,1\],{z12\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z1\.b},{z0\.b-z1\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.b-z31\.b},{z30\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z1\.b},{z0\.b-z1\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z14\.b-z15\.b},{z14\.b-z15\.b},z5\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z1\.h},{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.h-z31\.h},{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z1\.h},{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z20\.h-z21\.h},{z20\.h-z21\.h},z11\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z1\.s},{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.s-z31\.s},{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z1\.s},{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z2\.s-z3\.s},{z2\.s-z3\.s},z9\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z1\.d},{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z30\.d-z31\.d},{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z1\.d},{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.d-z29\.d},{z28\.d-z29\.d},z1\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z3\.b},{z0\.b-z3\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.b-z31\.b},{z28\.b-z31\.b},z0\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.b-z3\.b},{z0\.b-z3\.b},z15\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z24\.b-z27\.b},{z24\.b-z27\.b},z5\.b' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z3\.h},{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.h-z31\.h},{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.h-z3\.h},{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z20\.h-z23\.h},{z20\.h-z23\.h},z11\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z3\.s},{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.s-z31\.s},{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.s-z3\.s},{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z4\.s-z7\.s},{z4\.s-z7\.s},z9\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z3\.d},{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z28\.d-z31\.d},{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z0\.d-z3\.d},{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add {z16\.d-z19\.d},{z16\.d-z19\.d},z3\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,3\],{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,1\],{z12\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s,z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s-z0\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w9,5\],{z9\.s-z10\.s},z6\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},Z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},Z0\.S' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s,z0\.s,z1\.s,z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z31\.s-z2\.s},z0\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},z15\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,2\],{z23\.s-z26\.s},z13\.s' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s},{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S},{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z1\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z30\.s-z31\.s},{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z1\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,1\],{z22\.s-z23\.s},{z18\.s-z19\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s},{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S},{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{z0\.s-z3\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z28\.s-z31\.s},{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{z0\.s-z3\.s},{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,3\],{z16\.s-z19\.s},{z24\.s-z27\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w10,3\],{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,1\],{z12\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx2\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx2\],{Z0\.s-Z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX2\],{Z0\.S-Z1\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w10,3\],{z10\.s-z11\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx4\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx4\],{Z0\.s-Z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX4\],{Z0\.S-Z3\.S}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{z28\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,1\],{z12\.s-z15\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.b ?- ?z31\.b ?},{ ?z30\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z1\.b ?},{ ?z0\.b ?- ?z1\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z14\.b ?- ?z15\.b ?},{ ?z14\.b ?- ?z15\.b ?},z5\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z20\.h ?- ?z21\.h ?},{ ?z20\.h ?- ?z21\.h ?},z11\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z2\.s ?- ?z3\.s ?},{ ?z2\.s ?- ?z3\.s ?},z9\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z30\.d ?- ?z31\.d ?},{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.d ?- ?z29\.d ?},{ ?z28\.d ?- ?z29\.d ?},z1\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.b ?- ?z31\.b ?},{ ?z28\.b ?- ?z31\.b ?},z0\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.b ?- ?z3\.b ?},{ ?z0\.b ?- ?z3\.b ?},z15\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z24\.b ?- ?z27\.b ?},{ ?z24\.b ?- ?z27\.b ?},z5\.b' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.h ?- ?z31\.h ?},{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z20\.h ?- ?z23\.h ?},{ ?z20\.h ?- ?z23\.h ?},z11\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.s ?- ?z31\.s ?},{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z4\.s ?- ?z7\.s ?},{ ?z4\.s ?- ?z7\.s ?},z9\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z28\.d ?- ?z31\.d ?},{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add { ?z16\.d ?- ?z19\.d ?},{ ?z16\.d ?- ?z19\.d ?},z3\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s,z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s ?- ?z0\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w9,5\],{ ?z9\.s ?- ?z10\.s ?},z6\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},Z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},Z0\.S' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s,z0\.s,z1\.s,z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z31\.s ?- ?z2\.s ?},z0\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},z15\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,2\],{ ?z23\.s ?- ?z26\.s ?},z13\.s' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?},{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?},{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w10,1\],{ ?z22\.s ?- ?z23\.s ?},{ ?z18\.s ?- ?z19\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?},{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?},{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?},{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?},{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sub za\.s\[w11,3\],{ ?z16\.s ?- ?z19\.s ?},{ ?z24\.s ?- ?z27\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx2\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx2\],{ ?Z0\.s ?- ?Z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX2\],{ ?Z0\.S ?- ?Z1\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w10,3\],{ ?z10\.s ?- ?z11\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0,vgx4\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.s\[W8,0,VGx4\],{ ?Z0\.s ?- ?Z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.S\[W8,0,VGX4\],{ ?Z0\.S ?- ?Z3\.S ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,0\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,7\],{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w8,0\],{ ?z28\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.s\[w11,1\],{ ?z12\.s ?- ?z15\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l index 60ee8bd..a7e3ac0 100644 --- a/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-invalid.l @@ -1,26 +1,26 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fadd za\.d\[w8,0\],{z0\.d-z2\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z1\.d-z2\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{z1\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z1\.d-z4\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z2\.d-z5\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{z3\.d-z6\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fadd za\.d\[w8,0,vgx4\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fadd za\.d\[w8,0,vgx2\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\[w8,0\],{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fadd za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fadd za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fadd za\.d\[w8,8\],{ ?z1\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fadd za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fadd za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fadd za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fadd za\.d\[w8, 0\], {z0\.d-z1\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fadd za\.s\[w8, 0\], {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fadd za\.d\[w8,0\],{z0-z1}' -[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.d\[w8,0\],{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fadd za\.d\[w8,0\],{ ?z0 ?- ?z1 ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fadd za\.d\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fadd za\.s\[w8, 0\], {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l index f3750f5..220d8f6 100644 --- a/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-f64f64-1-noarch.l @@ -1,33 +1,33 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w10,3\],{z10\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,1\],{z12\.d-z15\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w10,3\],{z10\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,1\],{z12\.d-z15\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w10,3\],{ ?z10\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fadd za\.d\[w11,1\],{ ?z12\.d ?- ?z15\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w10,3\],{ ?z10\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fsub za\.d\[w11,1\],{ ?z12\.d ?- ?z15\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l index 97b0db1..45ba11a 100644 --- a/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-invalid.l @@ -1,97 +1,97 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z2\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[2\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z4\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z2\.d-z5\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z3\.d-z6\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[2\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w0,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.d\[w31,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,1<<63\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z31\.d' -[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.d\[w8,0:0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.d\[w8,0:-1\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:1\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:100\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d,z1\.d,z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d,z1\.d,z5\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z16\.d\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[2\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z4\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z16\.d\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[2\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w0,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `fmla za\.d\[w31,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,1<<63\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z31\.d' +[^ :]+:[0-9]+: Error: the last offset is equal to the first offset at operand 1 -- `fmla za\.d\[w8,0:0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: the last offset is less than the first offset at operand 1 -- `fmla za\.d\[w8,0:-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a single offset rather than a range at operand 1 -- `fmla za\.d\[w8,0:100\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z16\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z16\.d' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z4\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d,z1\.d,z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d,z1\.d,z5\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.d\[w8,0\],{z0-z1},z0\.d' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.d' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},z0' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z2\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z15\.d-z16\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z31\.d,z0\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z1\.d-z4\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z2\.d-z5\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{z3\.d-z6\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z15\.d-z18\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z29\.d,z30\.d,z31\.d,z0\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{z0\.d-z2\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z2\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z4\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z15\.d ?- ?z16\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z31\.d,z0\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `fmla za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `fmla za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `fmla za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z15\.d ?- ?z18\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z29\.d,z30\.d,z31\.d,z0\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z4\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fmla za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `fmla za\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fmla za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l index 5ab290d..0d76ba4 100644 --- a/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-f64f64-2-noarch.l @@ -1,117 +1,117 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,2\],{z6\.d-z7\.d},z5\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,3\],{z8\.d-z11\.d},z14\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,2\],{z6\.d-z7\.d},z5\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,3\],{z8\.d-z11\.d},z14\.d\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,2\],{ ?z6\.d ?- ?z7\.d ?},z5\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,3\],{ ?z8\.d ?- ?z11\.d ?},z14\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},Z0\.D' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d,z0\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d ?- ?z0\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w9,5\],{ ?z9\.d ?- ?z10\.d ?},z6\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},Z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d,z0\.d,z1\.d,z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z31\.d ?- ?z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,2\],{ ?z23\.d ?- ?z26\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},{ ?Z0\.d ?- ?Z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},{ ?Z0\.D ?- ?Z1\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w10,1\],{ ?z22\.d ?- ?z23\.d ?},{ ?z18\.d ?- ?z19\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},{ ?Z0\.d ?- ?Z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},{ ?Z0\.D ?- ?Z3\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmla za\.d\[w11,3\],{ ?z16\.d ?- ?z19\.d ?},{ ?z24\.d ?- ?z27\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,2\],{ ?z6\.d ?- ?z7\.d ?},z5\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,3\],{ ?z8\.d ?- ?z11\.d ?},z14\.d\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},Z0\.D' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d,z0\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d ?- ?z0\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w9,5\],{ ?z9\.d ?- ?z10\.d ?},z6\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},Z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d,z0\.d,z1\.d,z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z31\.d ?- ?z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,2\],{ ?z23\.d ?- ?z26\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},{ ?Z0\.d ?- ?Z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},{ ?Z0\.D ?- ?Z1\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w10,1\],{ ?z22\.d ?- ?z23\.d ?},{ ?z18\.d ?- ?z19\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},{ ?Z0\.d ?- ?Z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},{ ?Z0\.D ?- ?Z3\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `fmls za\.d\[w11,3\],{ ?z16\.d ?- ?z19\.d ?},{ ?z24\.d ?- ?z27\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l index 513b430..7dfd085 100644 --- a/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l +++ b/gas/testsuite/gas/aarch64/sme2-faminmax-bad.l @@ -1,49 +1,49 @@ [^ :]+: Assembler messages: -.*: Error: selected processor does not support `famax {z0.h-z1.h},{z0.h-z1.h},{z0.h-z1.h}' -.*: Error: selected processor does not support `famax {z30.h-z31.h},{z30.h-z31.h},{z0.h-z1.h}' -.*: Error: selected processor does not support `famax {z0.h-z1.h},{z0.h-z1.h},{z30.h-z31.h}' -.*: Error: selected processor does not support `famax {z18.h-z19.h},{z18.h-z19.h},{z26.h-z27.h}' -.*: Error: selected processor does not support `famax {z0.s-z1.s},{z0.s-z1.s},{z0.s-z1.s}' -.*: Error: selected processor does not support `famax {z30.s-z31.s},{z30.s-z31.s},{z0.s-z1.s}' -.*: Error: selected processor does not support `famax {z0.s-z1.s},{z0.s-z1.s},{z30.s-z31.s}' -.*: Error: selected processor does not support `famax {z4.s-z5.s},{z4.s-z5.s},{z10.s-z11.s}' -.*: Error: selected processor does not support `famax {z0.d-z1.d},{z0.d-z1.d},{z0.d-z1.d}' -.*: Error: selected processor does not support `famax {z30.d-z31.d},{z30.d-z31.d},{z0.d-z1.d}' -.*: Error: selected processor does not support `famax {z0.d-z1.d},{z0.d-z1.d},{z30.d-z31.d}' -.*: Error: selected processor does not support `famax {z28.d-z29.d},{z28.d-z29.d},{z8.d-z9.d}' -.*: Error: selected processor does not support `famax {z0.h-z3.h},{z0.h-z3.h},{z0.h-z3.h}' -.*: Error: selected processor does not support `famax {z28.h-z31.h},{z28.h-z31.h},{z0.h-z3.h}' -.*: Error: selected processor does not support `famax {z0.h-z3.h},{z0.h-z3.h},{z28.h-z31.h}' -.*: Error: selected processor does not support `famax {z16.h-z19.h},{z16.h-z19.h},{z20.h-z23.h}' -.*: Error: selected processor does not support `famax {z0.s-z3.s},{z0.s-z3.s},{z0.s-z3.s}' -.*: Error: selected processor does not support `famax {z28.s-z31.s},{z28.s-z31.s},{z0.s-z3.s}' -.*: Error: selected processor does not support `famax {z0.s-z3.s},{z0.s-z3.s},{z28.s-z31.s}' -.*: Error: selected processor does not support `famax {z24.s-z27.s},{z24.s-z27.s},{z4.s-z7.s}' -.*: Error: selected processor does not support `famax {z0.d-z3.d},{z0.d-z3.d},{z0.d-z3.d}' -.*: Error: selected processor does not support `famax {z28.d-z31.d},{z28.d-z31.d},{z0.d-z3.d}' -.*: Error: selected processor does not support `famax {z0.d-z3.d},{z0.d-z3.d},{z28.d-z31.d}' -.*: Error: selected processor does not support `famax {z12.d-z15.d},{z12.d-z15.d},{z8.d-z11.d}' -.*: Error: selected processor does not support `famin {z0.h-z1.h},{z0.h-z1.h},{z0.h-z1.h}' -.*: Error: selected processor does not support `famin {z30.h-z31.h},{z30.h-z31.h},{z0.h-z1.h}' -.*: Error: selected processor does not support `famin {z0.h-z1.h},{z0.h-z1.h},{z30.h-z31.h}' -.*: Error: selected processor does not support `famin {z18.h-z19.h},{z18.h-z19.h},{z26.h-z27.h}' -.*: Error: selected processor does not support `famin {z0.s-z1.s},{z0.s-z1.s},{z0.s-z1.s}' -.*: Error: selected processor does not support `famin {z30.s-z31.s},{z30.s-z31.s},{z0.s-z1.s}' -.*: Error: selected processor does not support `famin {z0.s-z1.s},{z0.s-z1.s},{z30.s-z31.s}' -.*: Error: selected processor does not support `famin {z4.s-z5.s},{z4.s-z5.s},{z10.s-z11.s}' -.*: Error: selected processor does not support `famin {z0.d-z1.d},{z0.d-z1.d},{z0.d-z1.d}' -.*: Error: selected processor does not support `famin {z30.d-z31.d},{z30.d-z31.d},{z0.d-z1.d}' -.*: Error: selected processor does not support `famin {z0.d-z1.d},{z0.d-z1.d},{z30.d-z31.d}' -.*: Error: selected processor does not support `famin {z28.d-z29.d},{z28.d-z29.d},{z8.d-z9.d}' -.*: Error: selected processor does not support `famin {z0.h-z3.h},{z0.h-z3.h},{z0.h-z3.h}' -.*: Error: selected processor does not support `famin {z28.h-z31.h},{z28.h-z31.h},{z0.h-z3.h}' -.*: Error: selected processor does not support `famin {z0.h-z3.h},{z0.h-z3.h},{z28.h-z31.h}' -.*: Error: selected processor does not support `famin {z16.h-z19.h},{z16.h-z19.h},{z20.h-z23.h}' -.*: Error: selected processor does not support `famin {z0.s-z3.s},{z0.s-z3.s},{z0.s-z3.s}' -.*: Error: selected processor does not support `famin {z28.s-z31.s},{z28.s-z31.s},{z0.s-z3.s}' -.*: Error: selected processor does not support `famin {z0.s-z3.s},{z0.s-z3.s},{z28.s-z31.s}' -.*: Error: selected processor does not support `famin {z24.s-z27.s},{z24.s-z27.s},{z4.s-z7.s}' -.*: Error: selected processor does not support `famin {z0.d-z3.d},{z0.d-z3.d},{z0.d-z3.d}' -.*: Error: selected processor does not support `famin {z28.d-z31.d},{z28.d-z31.d},{z0.d-z3.d}' -.*: Error: selected processor does not support `famin {z0.d-z3.d},{z0.d-z3.d},{z28.d-z31.d}' -.*: Error: selected processor does not support `famin {z12.d-z15.d},{z12.d-z15.d},{z8.d-z11.d}' +.*: Error: selected processor does not support `famax { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?}' +.*: Error: selected processor does not support `famax { ?z30.h ?- ?z31.h ?},{ ?z30.h ?- ?z31.h ?},{ ?z0.h ?- ?z1.h ?}' +.*: Error: selected processor does not support `famax { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z30.h ?- ?z31.h ?}' +.*: Error: selected processor does not support `famax { ?z18.h ?- ?z19.h ?},{ ?z18.h ?- ?z19.h ?},{ ?z26.h ?- ?z27.h ?}' +.*: Error: selected processor does not support `famax { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?}' +.*: Error: selected processor does not support `famax { ?z30.s ?- ?z31.s ?},{ ?z30.s ?- ?z31.s ?},{ ?z0.s ?- ?z1.s ?}' +.*: Error: selected processor does not support `famax { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z30.s ?- ?z31.s ?}' +.*: Error: selected processor does not support `famax { ?z4.s ?- ?z5.s ?},{ ?z4.s ?- ?z5.s ?},{ ?z10.s ?- ?z11.s ?}' +.*: Error: selected processor does not support `famax { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?}' +.*: Error: selected processor does not support `famax { ?z30.d ?- ?z31.d ?},{ ?z30.d ?- ?z31.d ?},{ ?z0.d ?- ?z1.d ?}' +.*: Error: selected processor does not support `famax { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z30.d ?- ?z31.d ?}' +.*: Error: selected processor does not support `famax { ?z28.d ?- ?z29.d ?},{ ?z28.d ?- ?z29.d ?},{ ?z8.d ?- ?z9.d ?}' +.*: Error: selected processor does not support `famax { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?}' +.*: Error: selected processor does not support `famax { ?z28.h ?- ?z31.h ?},{ ?z28.h ?- ?z31.h ?},{ ?z0.h ?- ?z3.h ?}' +.*: Error: selected processor does not support `famax { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z28.h ?- ?z31.h ?}' +.*: Error: selected processor does not support `famax { ?z16.h ?- ?z19.h ?},{ ?z16.h ?- ?z19.h ?},{ ?z20.h ?- ?z23.h ?}' +.*: Error: selected processor does not support `famax { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?}' +.*: Error: selected processor does not support `famax { ?z28.s ?- ?z31.s ?},{ ?z28.s ?- ?z31.s ?},{ ?z0.s ?- ?z3.s ?}' +.*: Error: selected processor does not support `famax { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z28.s ?- ?z31.s ?}' +.*: Error: selected processor does not support `famax { ?z24.s ?- ?z27.s ?},{ ?z24.s ?- ?z27.s ?},{ ?z4.s ?- ?z7.s ?}' +.*: Error: selected processor does not support `famax { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?}' +.*: Error: selected processor does not support `famax { ?z28.d ?- ?z31.d ?},{ ?z28.d ?- ?z31.d ?},{ ?z0.d ?- ?z3.d ?}' +.*: Error: selected processor does not support `famax { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z28.d ?- ?z31.d ?}' +.*: Error: selected processor does not support `famax { ?z12.d ?- ?z15.d ?},{ ?z12.d ?- ?z15.d ?},{ ?z8.d ?- ?z11.d ?}' +.*: Error: selected processor does not support `famin { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?}' +.*: Error: selected processor does not support `famin { ?z30.h ?- ?z31.h ?},{ ?z30.h ?- ?z31.h ?},{ ?z0.h ?- ?z1.h ?}' +.*: Error: selected processor does not support `famin { ?z0.h ?- ?z1.h ?},{ ?z0.h ?- ?z1.h ?},{ ?z30.h ?- ?z31.h ?}' +.*: Error: selected processor does not support `famin { ?z18.h ?- ?z19.h ?},{ ?z18.h ?- ?z19.h ?},{ ?z26.h ?- ?z27.h ?}' +.*: Error: selected processor does not support `famin { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?}' +.*: Error: selected processor does not support `famin { ?z30.s ?- ?z31.s ?},{ ?z30.s ?- ?z31.s ?},{ ?z0.s ?- ?z1.s ?}' +.*: Error: selected processor does not support `famin { ?z0.s ?- ?z1.s ?},{ ?z0.s ?- ?z1.s ?},{ ?z30.s ?- ?z31.s ?}' +.*: Error: selected processor does not support `famin { ?z4.s ?- ?z5.s ?},{ ?z4.s ?- ?z5.s ?},{ ?z10.s ?- ?z11.s ?}' +.*: Error: selected processor does not support `famin { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?}' +.*: Error: selected processor does not support `famin { ?z30.d ?- ?z31.d ?},{ ?z30.d ?- ?z31.d ?},{ ?z0.d ?- ?z1.d ?}' +.*: Error: selected processor does not support `famin { ?z0.d ?- ?z1.d ?},{ ?z0.d ?- ?z1.d ?},{ ?z30.d ?- ?z31.d ?}' +.*: Error: selected processor does not support `famin { ?z28.d ?- ?z29.d ?},{ ?z28.d ?- ?z29.d ?},{ ?z8.d ?- ?z9.d ?}' +.*: Error: selected processor does not support `famin { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?}' +.*: Error: selected processor does not support `famin { ?z28.h ?- ?z31.h ?},{ ?z28.h ?- ?z31.h ?},{ ?z0.h ?- ?z3.h ?}' +.*: Error: selected processor does not support `famin { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z28.h ?- ?z31.h ?}' +.*: Error: selected processor does not support `famin { ?z16.h ?- ?z19.h ?},{ ?z16.h ?- ?z19.h ?},{ ?z20.h ?- ?z23.h ?}' +.*: Error: selected processor does not support `famin { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?}' +.*: Error: selected processor does not support `famin { ?z28.s ?- ?z31.s ?},{ ?z28.s ?- ?z31.s ?},{ ?z0.s ?- ?z3.s ?}' +.*: Error: selected processor does not support `famin { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z28.s ?- ?z31.s ?}' +.*: Error: selected processor does not support `famin { ?z24.s ?- ?z27.s ?},{ ?z24.s ?- ?z27.s ?},{ ?z4.s ?- ?z7.s ?}' +.*: Error: selected processor does not support `famin { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?}' +.*: Error: selected processor does not support `famin { ?z28.d ?- ?z31.d ?},{ ?z28.d ?- ?z31.d ?},{ ?z0.d ?- ?z3.d ?}' +.*: Error: selected processor does not support `famin { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z28.d ?- ?z31.d ?}' +.*: Error: selected processor does not support `famin { ?z12.d ?- ?z15.d ?},{ ?z12.d ?- ?z15.d ?},{ ?z8.d ?- ?z11.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l index 6eb0a00..fe3e22e 100644 --- a/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l +++ b/gas/testsuite/gas/aarch64/sme2-faminmax-illegal.l @@ -1,87 +1,87 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.s ?- ?z31\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famax {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famax {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} [^ :]+:[0-9]+: Info: famax {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z30\.s-z31\.s},{z30\.s-z31\.s},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z18\.h ?- ?z19\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famax {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z18\.s-z19\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famax {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z18\.h-z19\.h} [^ :]+:[0-9]+: Info: famax {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z18\.d-z19\.d} -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famax {z24\.s-z27\.s},{z24\.s-z27\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famax {z30\.h-z31\.h},{z30\.h-z31\.h},{z24\.h-z27\.h}' -[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.s-z31\.s}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famax { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famax { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z24\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.s ?- ?z31\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famin {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famin {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} [^ :]+:[0-9]+: Info: famin {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z30\.s-z31\.s},{z30\.s-z31\.s},{z18\.h-z19\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z30\.s ?- ?z31\.s ?},{ ?z30\.s ?- ?z31\.s ?},{ ?z18\.h ?- ?z19\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famin {z30\.s-z31\.s}, {z30\.s-z31\.s}, {z18\.s-z19\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famin {z30\.h-z31\.h}, {z30\.h-z31\.h}, {z18\.h-z19\.h} [^ :]+:[0-9]+: Info: famin {z30\.d-z31\.d}, {z30\.d-z31\.d}, {z18\.d-z19\.d} -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famin {z24\.s-z27\.s},{z24\.s-z27\.s},{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famin {z30\.h-z31\.h},{z30\.h-z31\.h},{z24\.h-z27\.h}' -[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z18\.b-z19\.b},{z18\.b-z19\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `famin { ?z24\.s ?- ?z27\.s ?},{ ?z24\.s ?- ?z27\.s ?},{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `famin { ?z30\.h ?- ?z31\.h ?},{ ?z30\.h ?- ?z31\.h ?},{ ?z24\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z18\.b ?- ?z19\.b ?},{ ?z18\.b ?- ?z19\.b ?},{ ?z30\.b ?- ?z31\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famax {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famax {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} [^ :]+:[0-9]+: Info: famax {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `famax {z24\.b-z27\.b},{z24\.b-z27\.b},{z19\.b-z22\.b}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famax { ?z24\.b ?- ?z27\.b ?},{ ?z24\.b ?- ?z27\.b ?},{ ?z19\.b ?- ?z22\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famax {z24\.h-z27\.h}, {z24\.h-z27\.h}, {z19\.h-z22\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famax {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z19\.s-z22\.s} [^ :]+:[0-9]+: Info: famax {z24\.d-z27\.d}, {z24\.d-z27\.d}, {z19\.d-z22\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z18\.b-z19\.b},{z18\.b-z19\.b},{z30\.b-z31\.b}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z18\.b ?- ?z19\.b ?},{ ?z18\.b ?- ?z19\.b ?},{ ?z30\.b ?- ?z31\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famin {z18\.h-z19\.h}, {z18\.h-z19\.h}, {z30\.h-z31\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famin {z18\.s-z19\.s}, {z18\.s-z19\.s}, {z30\.s-z31\.s} [^ :]+:[0-9]+: Info: famin {z18\.d-z19\.d}, {z18\.d-z19\.d}, {z30\.d-z31\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `famin {z24\.b-z27\.b},{z24\.b-z27\.b},{z19\.b-z22\.b}' +[^ :]+:[0-9]+: Error: operand mismatch -- `famin { ?z24\.b ?- ?z27\.b ?},{ ?z24\.b ?- ?z27\.b ?},{ ?z19\.b ?- ?z22\.b ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: famin {z24\.h-z27\.h}, {z24\.h-z27\.h}, {z19\.h-z22\.h} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: famin {z24\.s-z27\.s}, {z24\.s-z27\.s}, {z19\.s-z22\.s} [^ :]+:[0-9]+: Info: famin {z24\.d-z27\.d}, {z24\.d-z27\.d}, {z19\.d-z22\.d} -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famax {z18\.h-z20\.h},{z18\.h-z20\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famax {z27\.s-z31\.s},{z27\.s-z31\.s},{z16\.s-z20\.s}' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famax {z27\.s-z28\.s},{z27\.s-z30\.s},{z16\.s-z17\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famin {z18\.h-z20\.h},{z18\.h-z20\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famin {z27\.s-z31\.s},{z27\.s-z31\.s},{z16\.s-z20\.s}' -[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famin {z27\.s-z28\.s},{z27\.s-z30\.s},{z16\.s-z17\.s}' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famax {z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z12\.h-z13\.h},{z12\.h-z13\.h}' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famin {z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z12\.h-z13\.h},{z12\.h-z13\.h}' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.t-z31\.t}' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famax {z18\.t-z19\.t},{z18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.t-z31\.t}' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famin {z18\.t-z19\.t},{z18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},\{30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famax {z18\.h-z19\.h},\{18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famax {z18\.h-19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30-z31\.h}' -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famax {z18\.h-z19\.h},{z18-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famax {z18-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},\{30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famin {z18\.h-z19\.h},\{18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famin {z18\.h-19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30-z31\.h}' -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famin {z18\.h-z19\.h},{z18-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famin {z18-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z34\.h-z35\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famax {z34\.h-z35\.h},{z34\.h-z35\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z34\.h-z35\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famin {z34\.h-z35\.h},{z34\.h-z35\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famax {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famin {z18\.h-z19\.h},{z18\.h-z19\.h},{z30\.h-z31\.h}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famax { ?z18\.h ?- ?z20\.h ?},{ ?z18\.h ?- ?z20\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famax { ?z27\.s ?- ?z31\.s ?},{ ?z27\.s ?- ?z31\.s ?},{ ?z16\.s ?- ?z20\.s ?}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famax { ?z27\.s ?- ?z28\.s ?},{ ?z27\.s ?- ?z30\.s ?},{ ?z16\.s ?- ?z17\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 1 -- `famin { ?z18\.h ?- ?z20\.h ?},{ ?z18\.h ?- ?z20\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `famin { ?z27\.s ?- ?z31\.s ?},{ ?z27\.s ?- ?z31\.s ?},{ ?z16\.s ?- ?z20\.s ?}' +[^ :]+:[0-9]+: Error: operand 2 must be the same register as operand 1 -- `famin { ?z27\.s ?- ?z28\.s ?},{ ?z27\.s ?- ?z30\.s ?},{ ?z16\.s ?- ?z17\.s ?}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famax { ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z12\.h ?- ?z13\.h ?},{ ?z12\.h ?- ?z13\.h ?}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `famin { ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z12\.h ?- ?z13\.h ?},{ ?z12\.h ?- ?z13\.h ?}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.t ?- ?z31\.t ?}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famax { ?z18\.t ?- ?z19\.t ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.t ?- ?z31\.t ?}' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `famin { ?z18\.t ?- ?z19\.t ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},\{ ?30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famax { ?z18\.h ?- ?z19\.h ?},\{ ?18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famax { ?z18\.h ?- ?19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30 ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18 ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famax { ?z18 ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},\{ ?30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `famin { ?z18\.h ?- ?z19\.h ?},\{ ?18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `famin { ?z18\.h ?- ?19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30 ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18 ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `famin { ?z18 ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z34\.h ?- ?z35\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famax { ?z34\.h ?- ?z35\.h ?},{ ?z34\.h ?- ?z35\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z34\.h ?- ?z35\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `famin { ?z34\.h ?- ?z35\.h ?},{ ?z34\.h ?- ?z35\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famax { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `famin { ?z18\.h ?- ?z19\.h ?},{ ?z18\.h ?- ?z19\.h ?},{ ?z30\.h ?- ?z31\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-fp8-fail.l b/gas/testsuite/gas/aarch64/sme2-fp8-fail.l index f25fd60..3612c88 100644 --- a/gas/testsuite/gas/aarch64/sme2-fp8-fail.l +++ b/gas/testsuite/gas/aarch64/sme2-fp8-fail.l @@ -175,99 +175,99 @@ [^:]+:64: Info: macro invoked from here [^:]+:60: Error: start register out of range at operand 2 -- `fcvt z4.b,{z3.s-z6.s}' [^:]+:64: Info: macro invoked from here -[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z1.h},{z2.h-z3.h},z2.h' +[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z1.h ?},{ ?z2.h ?- ?z3.h ?},z2.h' [^:]+:81: Info: macro invoked from here -[^:]+:71: Error: start register out of range at operand 1 -- `fscale {z1.h-z2.h},{z1.h-z2.h},z3.h' +[^:]+:71: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z2.h ?},{ ?z1.h ?- ?z2.h ?},z3.h' [^:]+:81: Info: macro invoked from here -[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z3.h},{z1.h-z4.h},z4.h' +[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z1.h ?- ?z4.h ?},z4.h' [^:]+:81: Info: macro invoked from here -[^:]+:76: Error: start register out of range at operand 1 -- `fscale {z1.h-z4.h},{z1.h-z4.h},z4.h' +[^:]+:76: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z4.h ?},{ ?z1.h ?- ?z4.h ?},z4.h' [^:]+:81: Info: macro invoked from here -[^:]+:77: Error: start register out of range at operand 1 -- `fscale {z2.h-z5.h},{z2.h-z5.h},z4.h' +[^:]+:77: Error: start register out of range at operand 1 -- `fscale { ?z2.h ?- ?z5.h ?},{ ?z2.h ?- ?z5.h ?},z4.h' [^:]+:81: Info: macro invoked from here -[^:]+:78: Error: start register out of range at operand 1 -- `fscale {z3.h-z6.h},{z3.h-z6.h},z4.h' +[^:]+:78: Error: start register out of range at operand 1 -- `fscale { ?z3.h ?- ?z6.h ?},{ ?z3.h ?- ?z6.h ?},z4.h' [^:]+:81: Info: macro invoked from here -[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z1.s},{z2.s-z3.s},z2.s' +[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z1.s ?},{ ?z2.s ?- ?z3.s ?},z2.s' [^:]+:82: Info: macro invoked from here -[^:]+:71: Error: start register out of range at operand 1 -- `fscale {z1.s-z2.s},{z1.s-z2.s},z3.s' +[^:]+:71: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z2.s ?},{ ?z1.s ?- ?z2.s ?},z3.s' [^:]+:82: Info: macro invoked from here -[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z3.s},{z1.s-z4.s},z4.s' +[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z1.s ?- ?z4.s ?},z4.s' [^:]+:82: Info: macro invoked from here -[^:]+:76: Error: start register out of range at operand 1 -- `fscale {z1.s-z4.s},{z1.s-z4.s},z4.s' +[^:]+:76: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z4.s ?},{ ?z1.s ?- ?z4.s ?},z4.s' [^:]+:82: Info: macro invoked from here -[^:]+:77: Error: start register out of range at operand 1 -- `fscale {z2.s-z5.s},{z2.s-z5.s},z4.s' +[^:]+:77: Error: start register out of range at operand 1 -- `fscale { ?z2.s ?- ?z5.s ?},{ ?z2.s ?- ?z5.s ?},z4.s' [^:]+:82: Info: macro invoked from here -[^:]+:78: Error: start register out of range at operand 1 -- `fscale {z3.s-z6.s},{z3.s-z6.s},z4.s' +[^:]+:78: Error: start register out of range at operand 1 -- `fscale { ?z3.s ?- ?z6.s ?},{ ?z3.s ?- ?z6.s ?},z4.s' [^:]+:82: Info: macro invoked from here -[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z1.d},{z2.d-z3.d},z2.d' +[^:]+:69: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z1.d ?},{ ?z2.d ?- ?z3.d ?},z2.d' [^:]+:83: Info: macro invoked from here -[^:]+:71: Error: start register out of range at operand 1 -- `fscale {z1.d-z2.d},{z1.d-z2.d},z3.d' +[^:]+:71: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z2.d ?},{ ?z1.d ?- ?z2.d ?},z3.d' [^:]+:83: Info: macro invoked from here -[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z3.d},{z1.d-z4.d},z4.d' +[^:]+:74: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z1.d ?- ?z4.d ?},z4.d' [^:]+:83: Info: macro invoked from here -[^:]+:76: Error: start register out of range at operand 1 -- `fscale {z1.d-z4.d},{z1.d-z4.d},z4.d' +[^:]+:76: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z4.d ?},{ ?z1.d ?- ?z4.d ?},z4.d' [^:]+:83: Info: macro invoked from here -[^:]+:77: Error: start register out of range at operand 1 -- `fscale {z2.d-z5.d},{z2.d-z5.d},z4.d' +[^:]+:77: Error: start register out of range at operand 1 -- `fscale { ?z2.d ?- ?z5.d ?},{ ?z2.d ?- ?z5.d ?},z4.d' [^:]+:83: Info: macro invoked from here -[^:]+:78: Error: start register out of range at operand 1 -- `fscale {z3.d-z6.d},{z3.d-z6.d},z4.d' +[^:]+:78: Error: start register out of range at operand 1 -- `fscale { ?z3.d ?- ?z6.d ?},{ ?z3.d ?- ?z6.d ?},z4.d' [^:]+:83: Info: macro invoked from here -[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z1.h},{z1.h-z2.h},{z2.h-z3.h}' +[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z1.h ?},{ ?z1.h ?- ?z2.h ?},{ ?z2.h ?- ?z3.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:90: Error: start register out of range at operand 1 -- `fscale {z1.h-z2.h},{z1.h-z2.h},{z2.h-z3.h}' +[^:]+:90: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z2.h ?},{ ?z1.h ?- ?z2.h ?},{ ?z2.h ?- ?z3.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:91: Error: start register out of range at operand 1 -- `fscale {z1.h-z2.h},{z1.h-z2.h},{z3.h-z4.h}' +[^:]+:91: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z2.h ?},{ ?z1.h ?- ?z2.h ?},{ ?z3.h ?- ?z4.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.h-z3.h},{z1.h-z4.h},{z4.h-z7.h}' +[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z1.h ?- ?z4.h ?},{ ?z4.h ?- ?z7.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:96: Error: start register out of range at operand 1 -- `fscale {z1.h-z4.h},{z1.h-z4.h},{z4.h-z7.h}' +[^:]+:96: Error: start register out of range at operand 1 -- `fscale { ?z1.h ?- ?z4.h ?},{ ?z1.h ?- ?z4.h ?},{ ?z4.h ?- ?z7.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:97: Error: start register out of range at operand 1 -- `fscale {z2.h-z5.h},{z2.h-z5.h},{z4.h-z7.h}' +[^:]+:97: Error: start register out of range at operand 1 -- `fscale { ?z2.h ?- ?z5.h ?},{ ?z2.h ?- ?z5.h ?},{ ?z4.h ?- ?z7.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:98: Error: start register out of range at operand 1 -- `fscale {z3.h-z6.h},{z3.h-z6.h},{z4.h-z7.h}' +[^:]+:98: Error: start register out of range at operand 1 -- `fscale { ?z3.h ?- ?z6.h ?},{ ?z3.h ?- ?z6.h ?},{ ?z4.h ?- ?z7.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:99: Error: start register out of range at operand 3 -- `fscale {z0.h-z3.h},{z0.h-z3.h},{z5.h-z8.h}' +[^:]+:99: Error: start register out of range at operand 3 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z5.h ?- ?z8.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:100: Error: start register out of range at operand 3 -- `fscale {z0.h-z3.h},{z0.h-z3.h},{z6.h-z9.h}' +[^:]+:100: Error: start register out of range at operand 3 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z6.h ?- ?z9.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:101: Error: start register out of range at operand 3 -- `fscale {z0.h-z3.h},{z0.h-z3.h},{z7.h-z10.h}' +[^:]+:101: Error: start register out of range at operand 3 -- `fscale { ?z0.h ?- ?z3.h ?},{ ?z0.h ?- ?z3.h ?},{ ?z7.h ?- ?z10.h ?}' [^:]+:104: Info: macro invoked from here -[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z1.s},{z1.s-z2.s},{z2.s-z3.s}' +[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z1.s ?},{ ?z1.s ?- ?z2.s ?},{ ?z2.s ?- ?z3.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:90: Error: start register out of range at operand 1 -- `fscale {z1.s-z2.s},{z1.s-z2.s},{z2.s-z3.s}' +[^:]+:90: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z2.s ?},{ ?z1.s ?- ?z2.s ?},{ ?z2.s ?- ?z3.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:91: Error: start register out of range at operand 1 -- `fscale {z1.s-z2.s},{z1.s-z2.s},{z3.s-z4.s}' +[^:]+:91: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z2.s ?},{ ?z1.s ?- ?z2.s ?},{ ?z3.s ?- ?z4.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.s-z3.s},{z1.s-z4.s},{z4.s-z7.s}' +[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z1.s ?- ?z4.s ?},{ ?z4.s ?- ?z7.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:96: Error: start register out of range at operand 1 -- `fscale {z1.s-z4.s},{z1.s-z4.s},{z4.s-z7.s}' +[^:]+:96: Error: start register out of range at operand 1 -- `fscale { ?z1.s ?- ?z4.s ?},{ ?z1.s ?- ?z4.s ?},{ ?z4.s ?- ?z7.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:97: Error: start register out of range at operand 1 -- `fscale {z2.s-z5.s},{z2.s-z5.s},{z4.s-z7.s}' +[^:]+:97: Error: start register out of range at operand 1 -- `fscale { ?z2.s ?- ?z5.s ?},{ ?z2.s ?- ?z5.s ?},{ ?z4.s ?- ?z7.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:98: Error: start register out of range at operand 1 -- `fscale {z3.s-z6.s},{z3.s-z6.s},{z4.s-z7.s}' +[^:]+:98: Error: start register out of range at operand 1 -- `fscale { ?z3.s ?- ?z6.s ?},{ ?z3.s ?- ?z6.s ?},{ ?z4.s ?- ?z7.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:99: Error: start register out of range at operand 3 -- `fscale {z0.s-z3.s},{z0.s-z3.s},{z5.s-z8.s}' +[^:]+:99: Error: start register out of range at operand 3 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z5.s ?- ?z8.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:100: Error: start register out of range at operand 3 -- `fscale {z0.s-z3.s},{z0.s-z3.s},{z6.s-z9.s}' +[^:]+:100: Error: start register out of range at operand 3 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z6.s ?- ?z9.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:101: Error: start register out of range at operand 3 -- `fscale {z0.s-z3.s},{z0.s-z3.s},{z7.s-z10.s}' +[^:]+:101: Error: start register out of range at operand 3 -- `fscale { ?z0.s ?- ?z3.s ?},{ ?z0.s ?- ?z3.s ?},{ ?z7.s ?- ?z10.s ?}' [^:]+:105: Info: macro invoked from here -[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z1.d},{z1.d-z2.d},{z2.d-z3.d}' +[^:]+:88: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z1.d ?},{ ?z1.d ?- ?z2.d ?},{ ?z2.d ?- ?z3.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:90: Error: start register out of range at operand 1 -- `fscale {z1.d-z2.d},{z1.d-z2.d},{z2.d-z3.d}' +[^:]+:90: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z2.d ?},{ ?z1.d ?- ?z2.d ?},{ ?z2.d ?- ?z3.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:91: Error: start register out of range at operand 1 -- `fscale {z1.d-z2.d},{z1.d-z2.d},{z3.d-z4.d}' +[^:]+:91: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z2.d ?},{ ?z1.d ?- ?z2.d ?},{ ?z3.d ?- ?z4.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale {z0.d-z3.d},{z1.d-z4.d},{z4.d-z7.d}' +[^:]+:94: Error: operand 2 must be the same register as operand 1 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z1.d ?- ?z4.d ?},{ ?z4.d ?- ?z7.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:96: Error: start register out of range at operand 1 -- `fscale {z1.d-z4.d},{z1.d-z4.d},{z4.d-z7.d}' +[^:]+:96: Error: start register out of range at operand 1 -- `fscale { ?z1.d ?- ?z4.d ?},{ ?z1.d ?- ?z4.d ?},{ ?z4.d ?- ?z7.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:97: Error: start register out of range at operand 1 -- `fscale {z2.d-z5.d},{z2.d-z5.d},{z4.d-z7.d}' +[^:]+:97: Error: start register out of range at operand 1 -- `fscale { ?z2.d ?- ?z5.d ?},{ ?z2.d ?- ?z5.d ?},{ ?z4.d ?- ?z7.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:98: Error: start register out of range at operand 1 -- `fscale {z3.d-z6.d},{z3.d-z6.d},{z4.d-z7.d}' +[^:]+:98: Error: start register out of range at operand 1 -- `fscale { ?z3.d ?- ?z6.d ?},{ ?z3.d ?- ?z6.d ?},{ ?z4.d ?- ?z7.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:99: Error: start register out of range at operand 3 -- `fscale {z0.d-z3.d},{z0.d-z3.d},{z5.d-z8.d}' +[^:]+:99: Error: start register out of range at operand 3 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z5.d ?- ?z8.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:100: Error: start register out of range at operand 3 -- `fscale {z0.d-z3.d},{z0.d-z3.d},{z6.d-z9.d}' +[^:]+:100: Error: start register out of range at operand 3 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z6.d ?- ?z9.d ?}' [^:]+:106: Info: macro invoked from here -[^:]+:101: Error: start register out of range at operand 3 -- `fscale {z0.d-z3.d},{z0.d-z3.d},{z7.d-z10.d}' +[^:]+:101: Error: start register out of range at operand 3 -- `fscale { ?z0.d ?- ?z3.d ?},{ ?z0.d ?- ?z3.d ?},{ ?z7.d ?- ?z10.d ?}' [^:]+:106: Info: macro invoked from here diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l index d9d537a..2ff72ce 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-invalid.l @@ -1,110 +1,110 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z2\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z1\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z4\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z2\.d-z5\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z3\.d-z6\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z1\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z1\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{z0-z1}' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{ ?z0 ?- ?z1 ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z31\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z16\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},z16\.d' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z4\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d,z1\.d,z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.d\[w8,0\],{z0\.d,z1\.d,z5\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},z0\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z31\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z16\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z16\.d' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z4\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d,z1\.d,z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: invalid register list at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d,z1\.d,z5\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{z0-z1},z0\.d' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.d-z1\.d},z0' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `add za\.d\[w8,0\],{ ?z0 ?- ?z1 ?},z0\.d' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},z0' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{z0\.d-z1\.d},z0\.s' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.s\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.s' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{z0\.s-z1\.s},z0\.d' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\.d\[w8,0\],{ ?z0\.s ?- ?z1\.s ?},z0\.d' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, z0\.d [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, z0\.s -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z1\.d-z2\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z15\.d-z16\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z31\.d,z0\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z1\.d-z4\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z2\.d-z5\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{z3\.d-z6\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z15\.d-z18\.d}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z29\.d,z30\.d,z31\.d,z0\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{z0\.d-z2\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z2\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z4\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z1\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{z0\.d-z3\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w0,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a 32-bit selection register at operand 1 -- `add za\.d\[w31,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,1<<63\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z1\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z15\.d ?- ?z16\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z31\.d,z0\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w7,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `add za\.d\[w12,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,-1\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 7 at operand 1 -- `add za\.d\[w8,8\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z1\.d ?- ?z4\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z2\.d ?- ?z5\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `add za\.d\[w8,0\],{ ?z3\.d ?- ?z6\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z15\.d ?- ?z18\.d ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z29\.d,z30\.d,z31\.d,z0\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z2\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z2\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 3 -- `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z4\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 3 -- `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 3 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z1\.d}, {z0\.d-z1\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: add za\.s\[w8, 0\], {z0\.s-z1\.s}, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `add za\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: add za\.d\[w8, 0\], {z0\.d-z3\.d}, {z0\.d-z3\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l index bbdccc7..c178efe 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-1-noarch.l @@ -1,57 +1,57 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,3\],{z10\.d-z11\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,1\],{z12\.d-z15\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},Z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},Z0\.D' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d,z0\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d-z0\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w9,5\],{z9\.d-z10\.d},z6\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},Z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},Z0\.D' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d,z0\.d,z1\.d,z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z31\.d-z2\.d},z0\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},z15\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,2\],{z23\.d-z26\.d},z13\.d' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{Z0\.d-Z1\.d},{Z0\.d-Z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{Z0\.D-Z1\.D},{Z0\.D-Z1\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z1\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z30\.d-z31\.d},{z0\.d-z1\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z1\.d},{z30\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,1\],{z22\.d-z23\.d},{z18\.d-z19\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{Z0\.d-Z3\.d},{Z0\.d-Z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{Z0\.D-Z3\.D},{Z0\.D-Z3\.D}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{z0\.d-z3\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z28\.d-z31\.d},{z0\.d-z3\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{z0\.d-z3\.d},{z28\.d-z31\.d}' -[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,3\],{z16\.d-z19\.d},{z24\.d-z27\.d}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,3\],{ ?z10\.d ?- ?z11\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,1\],{ ?z12\.d ?- ?z15\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},Z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},Z0\.D' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d,z0\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d ?- ?z0\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w9,5\],{ ?z9\.d ?- ?z10\.d ?},z6\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},Z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},Z0\.D' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d,z0\.d,z1\.d,z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z31\.d ?- ?z2\.d ?},z0\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},z15\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,2\],{ ?z23\.d ?- ?z26\.d ?},z13\.d' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx2\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx2\],{ ?Z0\.d ?- ?Z1\.d ?},{ ?Z0\.d ?- ?Z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX2\],{ ?Z0\.D ?- ?Z1\.D ?},{ ?Z0\.D ?- ?Z1\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z1\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z30\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z1\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z1\.d ?},{ ?z30\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w10,1\],{ ?z22\.d ?- ?z23\.d ?},{ ?z18\.d ?- ?z19\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0,vgx4\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.d\[W8,0,VGx4\],{ ?Z0\.d ?- ?Z3\.d ?},{ ?Z0\.d ?- ?Z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add ZA\.D\[W8,0,VGX4\],{ ?Z0\.D ?- ?Z3\.D ?},{ ?Z0\.D ?- ?Z3\.D ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,7\],{ ?z0\.d ?- ?z3\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z28\.d ?- ?z31\.d ?},{ ?z0\.d ?- ?z3\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w8,0\],{ ?z0\.d ?- ?z3\.d ?},{ ?z28\.d ?- ?z31\.d ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `add za\.d\[w11,3\],{ ?z16\.d ?- ?z19\.d ?},{ ?z24\.d ?- ?z27\.d ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l index 280f685..dd81d56 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-invalid.l @@ -13,7 +13,7 @@ [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h\[0\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[-1\]' [^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[8\]' [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.b,z0\.b\[0\]' @@ -22,74 +22,74 @@ [^ :]+:[0-9]+: Error: operand mismatch -- `smlall za\.d\[w8,0:3\],z0\.d,z0\.d\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: smlall za\.d\[w8, 0:3\], z0\.h, z0\.h\[0\] -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[8\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z2\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[8\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w7,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a selection register in the range w8-w11 at operand 1 -- `smlall za\.d\[w12,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:1\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a range of four offsets at operand 1 -- `smlall za\.d\[w8,0:2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,1:4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,2:5\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: starting offset is not a multiple of 4 at operand 1 -- `smlall za\.d\[w8,3:6\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z16\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[8\]' [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx2\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: unexpected vector group size at operand 1 -- `smlall za\.d\[w8,0:3,vgx4\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: immediate offset out of range 0 to 12 at operand 1 -- `smlall za\.d\[w8,16:19\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.d\[w8,0:3\],{z0\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z16\.h' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: z0-z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z16\.h' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z2\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z1\.h-z2\.h}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z1\.h-z4\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z2\.h-z5\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{z3\.h-z6\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z1\.h-z4\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z2\.h-z5\.h}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z3\.h-z6\.h}' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],z0\.h,z16\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 or 4 registers at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z16\.h' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: z0 ?- ?z15 expected at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z16\.h' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z2\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z1\.h ?- ?z2\.h ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: immediate offset out of range 0 to 4 at operand 1 -- `smlall za\.d\[w8,8:11\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z1\.h ?- ?z4\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z2\.h ?- ?z5\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `smlall za\.d\[w8,0:3\],{ ?z3\.h ?- ?z6\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z1\.h ?- ?z4\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z2\.h ?- ?z5\.h ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z3\.h ?- ?z6\.h ?}' [^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], z0\.b, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b\[0\] [^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `sumlall za\.d\[w8,0:3\],z0\.h,z0\.h' -[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z1\.b}, z0\.b -[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sumlall za\.s\[w8, 0:3\], {z0\.b-z3\.b}, z0\.b -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sumlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l index c78057f..f384850 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-2-noarch.l @@ -6,62 +6,62 @@ [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,12:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlall za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]' @@ -69,62 +69,62 @@ [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,12:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `smlsll za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]' @@ -132,62 +132,62 @@ [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[5\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[5\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[1\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,12:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlall za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h\[0\]' @@ -195,59 +195,59 @@ [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h\[0\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h\[7\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,8:11\],z21\.h,z9\.h\[3\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z18\.h-z19\.h},z9\.h\[2\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h\[7\]' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,0:3\],{z24\.h-z27\.h},z14\.h\[6\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{ ?z18\.h ?- ?z19\.h ?},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[7\]' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,0:3\],{ ?z24\.h ?- ?z27\.h ?},z14\.h\[6\]' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,12:15\],z0\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z31\.h,z0\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],z0\.h,z15\.h' [^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],z25\.h,z7\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{z19\.h-z20\.h},z13\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z29\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,0:3\],{z25\.h-z28\.h},z14\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,4:7\],{ ?z19\.h ?- ?z20\.h ?},z13\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z29\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w9,0:3\],{ ?z25\.h ?- ?z28\.h ?},z14\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w10,4:7\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,4:7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w8,0:3\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `umlsll za\.d\[w11,0:3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l index dfbb8f9..8ffc9c1 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-invalid.l @@ -1,19 +1,19 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[2\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[2\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b\[0\] -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z1\.b}, z0\.b -[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h' +[^ :]+:[0-9]+: Error: operand mismatch -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sudot za\.s\[w8, 0\], {z0\.b-z3\.b}, z0\.b -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `sudot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l index 432d194..50eb94a 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-3-noarch.l @@ -1,125 +1,125 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,2\],{z14\.h-z15\.h},z13\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z0\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,3\],{z21\.h-z22\.h},z9\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h,z31\.h,z0\.h,z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h,z0\.h,z1\.h,z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z31\.h-z2\.h},z0\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,5\],{z17\.h-z20\.h},z3\.h' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{Z0\.h-Z1\.h},{Z0\.h-Z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{Z0\.H-Z1\.H},{Z0\.H-Z1\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z30\.h-z31\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z1\.h},{z30\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,1\],{z22\.h-z23\.h},{z18\.h-z19\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},{Z0\.h-Z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},{Z0\.H-Z3\.H}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{z0\.h-z3\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z28\.h-z31\.h},{z0\.h-z3\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{z0\.h-z3\.h},{z28\.h-z31\.h}' -[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,3\],{z16\.h-z19\.h},{z24\.h-z27\.h}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sdot za\.d\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,2\],{ ?z14\.h ?- ?z15\.h ?},z13\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h,z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h ?- ?z0\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w9,3\],{ ?z21\.h ?- ?z22\.h ?},z9\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h,z31\.h,z0\.h,z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h,z0\.h,z1\.h,z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z31\.h ?- ?z2\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,5\],{ ?z17\.h ?- ?z20\.h ?},z3\.h' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx2\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx2\],{ ?Z0\.h ?- ?Z1\.h ?},{ ?Z0\.h ?- ?Z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX2\],{ ?Z0\.H ?- ?Z1\.H ?},{ ?Z0\.H ?- ?Z1\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z30\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z30\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w10,1\],{ ?z22\.h ?- ?z23\.h ?},{ ?z18\.h ?- ?z19\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},{ ?Z0\.h ?- ?Z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},{ ?Z0\.H ?- ?Z3\.H ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},{ ?z0\.h ?- ?z3\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z28\.h ?- ?z31\.h ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `udot za\.d\[w11,3\],{ ?z16\.h ?- ?z19\.h ?},{ ?z24\.h ?- ?z27\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l index c33f15e..741064a 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-invalid.l @@ -1,11 +1,11 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[-1\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[2\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z1\.h-z4\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z2\.h-z5\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{z3\.h-z6\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},z0\.h' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z1\.h},{z0\.h-z1\.h}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{z0\.h-z3\.h},{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 2 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[2\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{ ?z1\.h ?- ?z4\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{ ?z2\.h ?- ?z5\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `svdot za\.d\[w8,0\],{ ?z3\.h ?- ?z6\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z1\.h ?},{ ?z0\.h ?- ?z1\.h ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},{ ?z0\.h ?- ?z3\.h ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l index 4b27662..4fd2fd5 100644 --- a/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l +++ b/gas/testsuite/gas/aarch64/sme2-i16i64-4-noarch.l @@ -1,21 +1,21 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0,vgx4\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.d\[W8,0,VGx4\],{Z0\.h-Z3\.h},Z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.D\[W8,0,VGX4\],{Z0\.H-Z3\.H},Z0\.H\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w11,0\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,7\],{z0\.h-z3\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z28\.h-z31\.h},z0\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z15\.h\[0\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{z0\.h-z3\.h},z0\.h\[1\]' -[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w9,1\],{z4\.h-z7\.h},z10\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `svdot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0,vgx4\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.d\[W8,0,VGx4\],{ ?Z0\.h ?- ?Z3\.h ?},Z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot ZA\.D\[W8,0,VGX4\],{ ?Z0\.H ?- ?Z3\.H ?},Z0\.H\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w11,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,7\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z28\.h ?- ?z31\.h ?},z0\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z15\.h\[0\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w8,0\],{ ?z0\.h ?- ?z3\.h ?},z0\.h\[1\]' +[^ :]+:[0-9]+: Error: selected processor does not support `uvdot za\.d\[w9,1\],{ ?z4\.h ?- ?z7\.h ?},z10\.h\[1\]' diff --git a/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l b/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l index 7883722..a73996e 100644 --- a/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l +++ b/gas/testsuite/gas/aarch64/sme2-lutv2-bad.l @@ -4,12 +4,12 @@ .*: Error: selected processor does not support `movt zt0\[3,mul vl\],z0' .*: Error: selected processor does not support `movt zt0\[3,mul vl\],z31' .*: Error: selected processor does not support `movt zt0\[2,mul vl\],z25' -.*: Error: selected processor does not support `luti4 {z0.b-z3.b},zt0,{z0-z1}' -.*: Error: selected processor does not support `luti4 {z28.b-z31.b},zt0,{z0-z1}' -.*: Error: selected processor does not support `luti4 {z0.b-z3.b},zt0,{z30-z31}' -.*: Error: selected processor does not support `luti4 {z20.b-z23.b},zt0,{z12-z13}' -.*: Error: selected processor does not support `luti4 {z0.b,z4.b,z8.b,z12.b},zt0,{z0-z1}' -.*: Error: selected processor does not support `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z0-z1}' -.*: Error: selected processor does not support `luti4 {z0.b,z4.b,z8.b,z12.b},zt0,{z30-z31}' -.*: Error: selected processor does not support `luti4 {z17.b,z21.b,z25.b,z29.b},zt0,{z12-z13}' -.*: Error: selected processor does not support `luti4 {z20.b,z21.b,z22.b,z23.b},zt0,{z12-z13}' +.*: Error: selected processor does not support `luti4 { ?z0.b ?- ?z3.b ?},zt0,{ ?z0 ?- ?z1 ?}' +.*: Error: selected processor does not support `luti4 { ?z28.b ?- ?z31.b ?},zt0,{ ?z0 ?- ?z1 ?}' +.*: Error: selected processor does not support `luti4 { ?z0.b ?- ?z3.b ?},zt0,{ ?z30 ?- ?z31 ?}' +.*: Error: selected processor does not support `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12 ?- ?z13 ?}' +.*: Error: selected processor does not support `luti4 { ?z0.b,z4.b,z8.b,z12.b ?},zt0,{ ?z0 ?- ?z1 ?}' +.*: Error: selected processor does not support `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z0 ?- ?z1 ?}' +.*: Error: selected processor does not support `luti4 { ?z0.b,z4.b,z8.b,z12.b ?},zt0,{ ?z30 ?- ?z31 ?}' +.*: Error: selected processor does not support `luti4 { ?z17.b,z21.b,z25.b,z29.b ?},zt0,{ ?z12 ?- ?z13 ?}' +.*: Error: selected processor does not support `luti4 { ?z20.b,z21.b,z22.b,z23.b ?},zt0,{ ?z12 ?- ?z13 ?}' diff --git a/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l b/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l index 4495a9a..e889dae 100644 --- a/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l +++ b/gas/testsuite/gas/aarch64/sme2-lutv2-illegal.l @@ -1,25 +1,25 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 {z20.b-z23.h},zt0,{z13-z14}' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 {z19.b,z23.b,z27.b,z31.h},zt0,{z13-z14}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 { ?z20.b ?- ?z23.h ?},zt0,{ ?z13 ?- ?z14 ?}' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 { ?z19.b,z23.b,z27.b,z31.h ?},zt0,{ ?z13 ?- ?z14 ?}' [^ :]+:[0-9]+: Error: unexpected register type at operand 1 -- `movt z3,zt0' [^ :]+:[0-9]+: Error: unexpected register type at operand 1 -- `movt z3\[0\],zt0' [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zt1,z25' -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,\{z0.b-z3.b\},\{z0-z1\}' -[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{z0.b-z3.b\},\{z0.b-z1.b\}\{z0-z1\}' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `luti4 \{\},zt0,\{z12-z13\}' -[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 \{z20.b-z23.b\},zt0,\{\}' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{z20.b-z23.b\},z3,\{z12-z13\}' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 \{z19.b-z22.b\},zt0,\{z12-z13\}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 \{z20.b-z23.b\},zt0,\{z13-z14\}' -[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,{z0.b,z4.b,z8.b,z12.b},{z0-z1}' -[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 {z0.b,z4.b,z8.b,z12.b},{z0.b-z1.b}{z0-z1}' -[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{}' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 {z19.b,z23.b,z27.b,z31.b},z3,{z12-z13}' -[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z13-z14}' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 \{z20.s-z23.s\},zt0,\{z20-z21\}' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,\{ ?z0.b ?- ?z3.b\ ?},\{ ?z0 ?- ?z1\ ?}' +[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{ ?z0.b ?- ?z3.b\ ?},\{ ?z0.b ?- ?z1.b\ ?} ?\{ ?z0 ?- ?z1\ ?}' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 1 -- `luti4 \{ ?\ ?},zt0,\{ ?z12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0,\{ ?\ ?}' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},z3,\{ ?z12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `luti4 \{ ?z19.b ?- ?z22.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0,\{ ?z13 ?- ?z14\ ?}' +[^ :]+:[0-9]+: Error: expected a vector register at operand 1 -- `luti4 zt0,{ ?z0.b,z4.b,z8.b,z12.b ?},{ ?z0 ?- ?z1 ?}' +[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 { ?z0.b,z4.b,z8.b,z12.b ?},{ ?z0.b ?- ?z1.b ?} ?{ ?z0 ?- ?z1 ?}' +[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ? ?}' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},z3,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: start register out of range at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z13 ?- ?z14 ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 \{ ?z20.s ?- ?z23.s\ ?},zt0,\{ ?z20 ?- ?z21\ ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z20.b-z23.b}, zt0, {z20-z21} -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 {z19.s,z23.s,z27.s,z31.s},zt0,{z20-z21}' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 { ?z19.s,z23.s,z27.s,z31.s ?},zt0,{ ?z20 ?- ?z21 ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 {z19.b, z23.b, z27.b, z31.b}, zt0, {z20-z21} [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `movt zt0.b,z31' @@ -28,43 +28,43 @@ [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `movt zt0\[1,mul vl\]' [^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `movt zt0,z23,z31' [^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 2 -- `movt zt0\[1,mul vl\],z23,z31' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 \{z20.b-z23.b\}' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 \{z20.b-z23.b\},zt0' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 \{z20.b-z23.b\},zt0,\{z12-z13\},\{z20-z21\}' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 {z19.b,z23.b,z27.b,z31.b}' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0{z12-z13},{z20-z21}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?},\{ ?z20 ?- ?z21\ ?}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0 ?{ ?z12 ?- ?z13 ?},{ ?z20 ?- ?z21 ?}' [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zy0,z16' [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zt1,z16' [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zy0\[1,mul vl\],z16' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0,y16' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0\[1,mul vl\],y16' -[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{z20.b-y23.b\},zt0,\{z12-z13\}' -[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 \{z20.x-z23.b\},zt0,\{z12-z13\}' -[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{z20.b-z23.b\},zy0,\{z12-z13\}' -[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{z20.b-y23.b\},zt0,\{y12-z13\}' -[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 {z19.b,z23.b,z27.b,y31.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 {z19.x,z23.b,z27.b,z31.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zy0,{z12-z13}' -[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{y12-z13}' -[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `luti4 \{z20-z23.b\},zt0,\{z12-z13\}' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 {z19.b,z23,z27.b,z31.b},zt0,{z12-z13}' +[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{ ?z20.b ?- ?y23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 \{ ?z20.x ?- ?z23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 \{ ?z20.b ?- ?z23.b\ ?},zy0,\{ ?z12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 \{ ?z20.b ?- ?y23.b\ ?},zt0,\{ ?y12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: operand 1 must be a list of SVE vector registers -- `luti4 { ?z19.b,z23.b,z27.b,y31.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: unexpected character `x' in element size at operand 1 -- `luti4 { ?z19.x,z23.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: expected a register at operand 2 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zy0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?y12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `luti4 \{ ?z20 ?- ?z23.b\ ?},zt0,\{ ?z12 ?- ?z13\ ?}' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 1 -- `luti4 { ?z19.b,z23,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}' [^ :]+:[0-9]+: Error: operand 1 must be an integer register -- `movt zt,z25.b' -[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 {z20.b-z23.b},zt0,{z12.b-z13.b}' -[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z12.b-z13.b}' +[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12.b ?- ?z13.b ?}' +[^ :]+:[0-9]+: Error: end of vector register list not found at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z12.b ?- ?z13.b ?}' [^ :]+:[0-9]+: Error: operand 2 must be an SVE vector register -- `movt zt0,z25\[1\]' [^ :]+:[0-9]+: Error: operand 2 must be an SVE vector register -- `movt zt0,z25\[1,mul vl\]' [^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `movt zt0\[2,mul vl\],z32' [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 1 -- `movt zt0\[4,mul vl\],z25' [^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 1 -- `movt zt0\[-1,mul vl\],z25' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 {z32.b-z36.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z20.b-z23.b},zt0,{z32-z33}' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 {z32.b,z36.b,z40.b,z44.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z32-z33}' -[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `luti4 {z20.b-z24.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `luti4 {z20.b-z22.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: invalid register stride at operand 1 -- `luti4 {z20.b-z23.b},zt0,{z12-z14}' -[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 3 -- `luti4 {z20.b-z23.b},zt0,{z12-z12}' -[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 {z19.b,z24.b,z27.b,z31.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 {z19.b,z22.b,z27.b,z31.b},zt0,{z12-z13}' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `luti4 {z19.b,z23.b,z27.b,z31.b},zt0,{z12-z14}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 { ?z32.b ?- ?z36.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z32 ?- ?z33 ?}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `luti4 { ?z32.b,z36.b,z40.b,z44.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: invalid vector register in list at operand 3 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z32 ?- ?z33 ?}' +[^ :]+:[0-9]+: Error: too many registers in vector register list at operand 1 -- `luti4 { ?z20.b ?- ?z24.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: expected a list of 4 registers at operand 1 -- `luti4 { ?z20.b ?- ?z22.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: invalid register stride at operand 1 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12 ?- ?z14 ?}' +[^ :]+:[0-9]+: Error: invalid range in vector register list at operand 3 -- `luti4 { ?z20.b ?- ?z23.b ?},zt0,{ ?z12 ?- ?z12 ?}' +[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 { ?z19.b,z24.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: invalid register list at operand 1 -- `luti4 { ?z19.b,z22.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z13 ?}' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `luti4 { ?z19.b,z23.b,z27.b,z31.b ?},zt0,{ ?z12 ?- ?z14 ?}' diff --git a/gas/testsuite/gas/aarch64/sme2p1-2-bad.l b/gas/testsuite/gas/aarch64/sme2p1-2-bad.l index 8fd4039..27a1f74 100644 --- a/gas/testsuite/gas/aarch64/sme2p1-2-bad.l +++ b/gas/testsuite/gas/aarch64/sme2p1-2-bad.l @@ -1,62 +1,62 @@ .*: Assembler messages: -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z0.b,z7.b},zt0,z0\[0\]` -.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z8.s},ZT0,Z0\[0\]' -.*: Error: operand mismatch -- `luti2 {z7.d,z15.d},zt0,z0\[0\]' +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z0.b,z7.b ?},zt0,z0\[0\]` +.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z8.s ?},ZT0,Z0\[0\]' +.*: Error: operand mismatch -- `luti2 { ?z7.d,z15.d ?},zt0,z0\[0\]' .*: Info: did you mean this\? .*: Info: luti2 {z7.b, z15.b}, zt0, z0\[0\] .*: Info: other valid variant\(s\): .*: Info: luti2 {z7.h, z15.h}, zt0, z0\[0\] .*: Info: luti2 {z7.s, z15.s}, zt0, z0\[0\] -.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 {z16.b,z24.b},zt0,z0' -.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z23.b,z31.b},zt0,z0\[8\]' -.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 {z0.b,z8.b},zt0,z31\[15\]' -.*: Error: unexpected register type at operand 2 -- `luti2 {z0.b,z8.b},z0\[7\]' -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z8.b,z24.b},zt0,z31\[0\]` -.*: Error: invalid register list at operand 1 -- `luti2 {z24.b,z24.b},zt0,z0\[7\]' -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z4.h,z16.h},zt0,z20\[4\]` -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 {z20.h,z22.h},zt0,z12\[2\]` -.*: Error: invalid register list at operand 1 -- `luti2 {z0.b,z3.b,z18.b,z1.b},zt0,z0\[0\]' -.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z4.s,Z8.s,Z12.s},ZT0,Z0\[0\]' -.*: Error: operand mismatch -- `luti2 {z3.d,z7.d,z11.d,z15.d},zt0,z0\[0\]' +.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 { ?z16.b,z24.b ?},zt0,z0' +.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z23.b,z31.b ?},zt0,z0\[8\]' +.*: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 { ?z0.b,z8.b ?},zt0,z31\[15\]' +.*: Error: unexpected register type at operand 2 -- `luti2 { ?z0.b,z8.b ?},z0\[7\]' +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z8.b,z24.b ?},zt0,z31\[0\]` +.*: Error: invalid register list at operand 1 -- `luti2 { ?z24.b,z24.b ?},zt0,z0\[7\]' +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z4.h,z16.h ?},zt0,z20\[4\]` +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti2 { ?z20.h,z22.h ?},zt0,z12\[2\]` +.*: Error: invalid register list at operand 1 -- `luti2 { ?z0.b,z3.b,z18.b,z1.b ?},zt0,z0\[0\]' +.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z4.s,Z8.s,Z12.s ?},ZT0,Z0\[0\]' +.*: Error: operand mismatch -- `luti2 { ?z3.d,z7.d,z11.d,z15.d ?},zt0,z0\[0\]' .*: Info: did you mean this\? .*: Info: luti2 {z3.b, z7.b, z11.b, z15.b}, zt0, z0\[0\] .*: Info: other valid variant\(s\): .*: Info: luti2 {z3.h, z7.h, z11.h, z15.h}, zt0, z0\[0\] .*: Info: luti2 {z3.s, z7.s, z11.s, z15.s}, zt0, z0\[0\] -.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 {z16.h,z20.h,z24.h,z28.h},zt0,z0' -.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 {z19.h,z23.h,z27.h,z31.h},zt0,z0\[5\]' -.*: Error: start register out of range at operand 1 -- `luti2 {z10.b,z14.b,z18.b,z22.b},zt0,z31\[0\]' -.*: Error: invalid register list at operand 1 -- `luti2 {z20.b,z24.b,z28.b,z30.b},z0\[3\]' -.*: Error: invalid register list at operand 1 -- `luti2 {z4.b,z7.b,z11.b,z18.b},zt0,z31\[0\]' -.*: Error: type mismatch in vector register list at operand 1 -- `luti2 {z6.b,z0.s,z2.d,z28.h},zt0,z0\[7\]' -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z0.b,z7.b},zt0,z0\[0\]` -.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z8.s},ZT0,Z0\[0\]' -.*: Error: operand mismatch -- `luti4 {z7.d,z15.d},zt0,z0\[0\]' +.*: Error: operand 3 must be an indexed SVE vector register -- `luti2 { ?z16.h,z20.h,z24.h,z28.h ?},zt0,z0' +.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 { ?z19.h,z23.h,z27.h,z31.h ?},zt0,z0\[5\]' +.*: Error: start register out of range at operand 1 -- `luti2 { ?z10.b,z14.b,z18.b,z22.b ?},zt0,z31\[0\]' +.*: Error: invalid register list at operand 1 -- `luti2 { ?z20.b,z24.b,z28.b,z30.b ?},z0\[3\]' +.*: Error: invalid register list at operand 1 -- `luti2 { ?z4.b,z7.b,z11.b,z18.b ?},zt0,z31\[0\]' +.*: Error: type mismatch in vector register list at operand 1 -- `luti2 { ?z6.b,z0.s,z2.d,z28.h ?},zt0,z0\[7\]' +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z0.b,z7.b ?},zt0,z0\[0\]` +.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z8.s ?},ZT0,Z0\[0\]' +.*: Error: operand mismatch -- `luti4 { ?z7.d,z15.d ?},zt0,z0\[0\]' .*: Info: did you mean this\? .*: Info: luti4 {z7.b, z15.b}, zt0, z0\[0\] .*: Info: other valid variant\(s\): .*: Info: luti4 {z7.h, z15.h}, zt0, z0\[0\] .*: Info: luti4 {z7.s, z15.s}, zt0, z0\[0\] -.*: Error: missing braces at operand 3 -- `luti4 {z16.b,z24.b},zt0,z0' -.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z23.b,z31.b},zt0,z0\[8\]' -.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 {z0.b,z8.b},zt0,z31\[15\]' -.*: Error: unexpected register type at operand 2 -- `luti4 {z0.b,z8.b},z0\[7\]' -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z8.b,z24.b},zt0,z31\[0\]` -.*: Error: invalid register list at operand 1 -- `luti4 {z24.b,z24.b},zt0,z0\[7\]' -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z4.h,z16.h},zt0,z20\[4\]` -.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 {z20.h,z22.h},zt0,z12\[2\]` -.*: Error: the register list must have a stride of 1 at operand 1 -- `luti4 {z0.s,z4.s,z8.s,z12.s},zt0,z0\[0\]' -.*: Error: invalid register list at operand 1 -- `luti4 {z0.b,z3.b,z18.b,z1.b},zt0,z0\[0\]' -.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 {Z0.s,Z4.s,Z8.s,Z12.s},ZT0,Z0\[0\]' -.*: Error: operand mismatch -- `luti4 {z3.d,z7.d,z11.d,z15.d},zt0,z0\[0\]' +.*: Error: missing braces at operand 3 -- `luti4 { ?z16.b,z24.b ?},zt0,z0' +.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z23.b,z31.b ?},zt0,z0\[8\]' +.*: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 { ?z0.b,z8.b ?},zt0,z31\[15\]' +.*: Error: unexpected register type at operand 2 -- `luti4 { ?z0.b,z8.b ?},z0\[7\]' +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z8.b,z24.b ?},zt0,z31\[0\]` +.*: Error: invalid register list at operand 1 -- `luti4 { ?z24.b,z24.b ?},zt0,z0\[7\]' +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z4.h,z16.h ?},zt0,z20\[4\]` +.*: Error: the register list must have a stride of 1 or 8 at operand 1 -- `luti4 { ?z20.h,z22.h ?},zt0,z12\[2\]` +.*: Error: the register list must have a stride of 1 at operand 1 -- `luti4 { ?z0.s,z4.s,z8.s,z12.s ?},zt0,z0\[0\]' +.*: Error: invalid register list at operand 1 -- `luti4 { ?z0.b,z3.b,z18.b,z1.b ?},zt0,z0\[0\]' +.*: Error: the register list must have a stride of 1 at operand 1 -- `luti2 { ?Z0.s,Z4.s,Z8.s,Z12.s ?},ZT0,Z0\[0\]' +.*: Error: operand mismatch -- `luti4 { ?z3.d,z7.d,z11.d,z15.d ?},zt0,z0\[0\]' .*: Info: did you mean this\? .*: Info: luti4 {z3.b, z7.b, z11.b, z15.b}, zt0, z0\[0\] .*: Info: other valid variant\(s\): .*: Info: luti4 {z3.h, z7.h, z11.h, z15.h}, zt0, z0\[0\] .*: Info: luti4 {z3.s, z7.s, z11.s, z15.s}, zt0, z0\[0\] -.*: Error: missing braces at operand 3 -- `luti4 {z16.h,z20.h,z24.h,z28.h},zt0,z0' -.*: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 {z19.h,z23.h,z27.h,z31.h},zt0,z0\[5\]' -.*: Error: expected a list of 2 registers at operand 1 -- `luti4 {z10.b,z14.b,z18.b,z22.b},zt0,z31\[0\]' -.*: Error: invalid register list at operand 1 -- `luti4 {z20.b,z24.b,z28.b,z30.b},z0\[3\]' -.*: Error: invalid register list at operand 1 -- `luti4 {z4.b,z7.b,z11.b,z18.b},zt0,z31\[0\]' -.*: Error: type mismatch in vector register list at operand 1 -- `luti4 {z6.b,z0.s,z2.d,z28.h},zt0,z0\[7\]' +.*: Error: missing braces at operand 3 -- `luti4 { ?z16.h,z20.h,z24.h,z28.h ?},zt0,z0' +.*: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 { ?z19.h,z23.h,z27.h,z31.h ?},zt0,z0\[5\]' +.*: Error: expected a list of 2 registers at operand 1 -- `luti4 { ?z10.b,z14.b,z18.b,z22.b ?},zt0,z31\[0\]' +.*: Error: invalid register list at operand 1 -- `luti4 { ?z20.b,z24.b,z28.b,z30.b ?},z0\[3\]' +.*: Error: invalid register list at operand 1 -- `luti4 { ?z4.b,z7.b,z11.b,z18.b ?},zt0,z31\[0\]' +.*: Error: type mismatch in vector register list at operand 1 -- `luti4 { ?z6.b,z0.s,z2.d,z28.h ?},zt0,z0\[7\]' diff --git a/gas/testsuite/gas/aarch64/sme2p1-3-bad.l b/gas/testsuite/gas/aarch64/sme2p1-3-bad.l index 8b7019f..94dc67b 100644 --- a/gas/testsuite/gas/aarch64/sme2p1-3-bad.l +++ b/gas/testsuite/gas/aarch64/sme2p1-3-bad.l @@ -1,30 +1,30 @@ .*: Assembler messages: -.*: Error: operand mismatch -- `movaz {z0.s-z1.s},za.d\[w8,0,vgx2\]' +.*: Error: operand mismatch -- `movaz {z0.s ?- ?z1.s},za.d\[w8,0,vgx2\]' .*: Info: did you mean this\? .*: Info: movaz {z0.d-z1.d}, za.d\[w8, 0, vgx2\] -.*: Error: operand mismatch -- `movaz {z30.h-z31.h},za.d\[w8,0,vgx2\]' +.*: Error: operand mismatch -- `movaz {z30.h ?- ?z31.h},za.d\[w8,0,vgx2\]' .*: Info: did you mean this\? .*: Info: movaz {z30.d-z31.d}, za.d\[w8, 0, vgx2\] -.*: Error: operand mismatch -- `movaz {z0.b-z1.b},za.b\[w11,0,vgx2\]' +.*: Error: operand mismatch -- `movaz {z0.b ?- ?z1.b},za.b\[w11,0,vgx2\]' .*: Info: did you mean this\? .*: Info: movaz {z0.d-z1.d}, za.d\[w11, 0, vgx2\] -.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d-z1.d},za.d\[w13,7,vgx2\]' -.*: Error: immediate offset out of range 0 to 7 at operand 2 -- `movaz {z30.d-z31.d},za.d\[w11,15,vgx2\]' -.*: Error: invalid vector group size at operand 2 -- `movaz {z14.d-z15.d},za.d\[w9,4,vgx3\]' -.*: Error: missing immediate offset at operand 2 -- `movaz {z6.d-z7.d},za.d\[w10\]' -.*: Error: missing immediate offset at operand 2 -- `movaz {z2.d-z4.d},za.d\[w10 6\]' -.*: Error: operand mismatch -- `movaz {z0.s-z3.s},za.d\[w8,0,vgx4\]' +.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d ?- ?z1.d},za.d\[w13,7,vgx2\]' +.*: Error: immediate offset out of range 0 to 7 at operand 2 -- `movaz {z30.d ?- ?z31.d},za.d\[w11,15,vgx2\]' +.*: Error: invalid vector group size at operand 2 -- `movaz {z14.d ?- ?z15.d},za.d\[w9,4,vgx3\]' +.*: Error: missing immediate offset at operand 2 -- `movaz {z6.d ?- ?z7.d},za.d\[w10\]' +.*: Error: missing immediate offset at operand 2 -- `movaz {z2.d ?- ?z4.d},za.d\[w10 6\]' +.*: Error: operand mismatch -- `movaz {z0.s ?- ?z3.s},za.d\[w8,0,vgx4\]' .*: Info: did you mean this\? .*: Info: movaz {z0.d-z3.d}, za.d\[w8, 0, vgx4\] -.*: Error: operand mismatch -- `movaz {z28.h-z31.h},za.d\[w8,0,vgx4\]' +.*: Error: operand mismatch -- `movaz {z28.h ?- ?z31.h},za.d\[w8,0,vgx4\]' .*: Info: did you mean this\? .*: Info: movaz {z28.d-z31.d}, za.d\[w8, 0, vgx4\] -.*: Error: operand mismatch -- `movaz {z0.b-z3.b},za.b\[w11,0,vgx4\]' +.*: Error: operand mismatch -- `movaz {z0.b ?- ?z3.b},za.b\[w11,0,vgx4\]' .*: Info: did you mean this\? .*: Info: movaz {z0.d-z3.d}, za.d\[w11, 0, vgx4\] -.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d-z3.d},za.d\[w14,7,vgx4\]' -.*: Error: invalid vector group size at operand 2 -- `movaz {z28.d-z31.d},za.d\[w11,11,vgx3\]' -.*: Error: start register out of range at operand 1 -- `movaz {z14.d-z17.d},za.d\[w9,4,vgx4\]' -.*: Error: too many registers in vector register list at operand 1 -- `movaz {z4.d-z8.d},za.d\[w10,3,vgx4\]' +.*: Error: expected a selection register in the range w8-w11 at operand 2 -- `movaz {z0.d ?- ?z3.d},za.d\[w14,7,vgx4\]' +.*: Error: invalid vector group size at operand 2 -- `movaz {z28.d ?- ?z31.d},za.d\[w11,11,vgx3\]' +.*: Error: start register out of range at operand 1 -- `movaz {z14.d ?- ?z17.d},za.d\[w9,4,vgx4\]' +.*: Error: too many registers in vector register list at operand 1 -- `movaz {z4.d ?- ?z8.d},za.d\[w10,3,vgx4\]' .*: Error: missing immediate offset at operand 2 -- `movaz {z0.d,z3.d},za.d\[w10\]' .*: Error: the register list must have a stride of 1 at operand 1 -- `movaz {z1.d,z4.d},za.d\[w10,20\]' diff --git a/gas/testsuite/gas/aarch64/sve-invalid.l b/gas/testsuite/gas/aarch64/sve-invalid.l index 3dcb063..6b5f38f 100644 --- a/gas/testsuite/gas/aarch64/sve-invalid.l +++ b/gas/testsuite/gas/aarch64/sve-invalid.l @@ -232,9 +232,9 @@ .*: Error: missing type suffix at operand 1 -- `ld1w z0,p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ld1d z0,p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ldff1b z0,p1/z,\[x1,xzr\]' -.*: Error: missing type suffix at operand 1 -- `ldff1h z0,p1/z,\[x1,xzr,lsl#1\]' -.*: Error: missing type suffix at operand 1 -- `ldff1w z0,p1/z,\[x1,xzr,lsl#2\]' -.*: Error: missing type suffix at operand 1 -- `ldff1d z0,p1/z,\[x1,xzr,lsl#3\]' +.*: Error: missing type suffix at operand 1 -- `ldff1h z0,p1/z,\[x1,xzr,lsl ?#1\]' +.*: Error: missing type suffix at operand 1 -- `ldff1w z0,p1/z,\[x1,xzr,lsl ?#2\]' +.*: Error: missing type suffix at operand 1 -- `ldff1d z0,p1/z,\[x1,xzr,lsl ?#3\]' .*: Error: missing type suffix at operand 1 -- `ldnf1b z0,p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ldnf1h z0,p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ldnf1w z0,p1/z,\[x1\]' @@ -256,9 +256,9 @@ .*: Error: missing type suffix at operand 1 -- `ld1w {z0},p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ld1d {z0},p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ldff1b {z0},p1/z,\[x1,xzr\]' -.*: Error: missing type suffix at operand 1 -- `ldff1h {z0},p1/z,\[x1,xzr,lsl#1\]' -.*: Error: missing type suffix at operand 1 -- `ldff1w {z0},p1/z,\[x1,xzr,lsl#2\]' -.*: Error: missing type suffix at operand 1 -- `ldff1d {z0},p1/z,\[x1,xzr,lsl#3\]' +.*: Error: missing type suffix at operand 1 -- `ldff1h {z0},p1/z,\[x1,xzr,lsl ?#1\]' +.*: Error: missing type suffix at operand 1 -- `ldff1w {z0},p1/z,\[x1,xzr,lsl ?#2\]' +.*: Error: missing type suffix at operand 1 -- `ldff1d {z0},p1/z,\[x1,xzr,lsl ?#3\]' .*: Error: missing type suffix at operand 1 -- `ldnf1b {z0},p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ldnf1h {z0},p1/z,\[x1\]' .*: Error: missing type suffix at operand 1 -- `ldnf1w {z0},p1/z,\[x1\]' @@ -292,8 +292,8 @@ .*: Error: type mismatch in vector register list at operand 1 -- `ld2b {z0\.s,z1\.d},p1/z,\[x1\]' .*: Error: type mismatch in vector register list at operand 1 -- `ld2b {z0\.d,z1},p1/z,\[x1\]' .*: Error: immediate offset out of range -8 to 7 at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#-9,mul vl\]' -.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul#1\]' -.*: Error: '\]' expected at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul vl#1\]' +.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul ?#1\]' +.*: Error: '\]' expected at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#0,mul vl ?#1\]' .*: Error: constant offset required at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#foo,mul vl\]' .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#1\]' .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,#7,mul vl\]!' @@ -367,91 +367,91 @@ .*: Error: immediate offset out of range 0 to 504 at operand 3 -- `ld1rd z0\.d,p1/z,\[x1,#512\]' .*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2\]!' .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1\],x2' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.b,p1/z,\[x1,x2,lsl x3\]' .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,w2,sxtw\]' .*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.b,p1/z,\[x1,w2,uxtw\]' .*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2\]' -.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl#1\]!' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl#3\]' +.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl ?#1\]!' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.h,p1/z,\[x1,x2,lsl x3\]' .*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,w2,sxtw\]' .*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.h,p1/z,\[x1,w2,uxtw\]' .*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl#1\]' -.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl#2\]!' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl ?#1\]' +.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl ?#2\]!' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.s,p1/z,\[x1,x2,lsl x3\]' .*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,w2,sxtw\]' .*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,w2,uxtw\]' .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl#2\]' -.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl#3\]!' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl ?#2\]' +.*: Error: register offset not allowed in pre-indexed addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl ?#3\]!' .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,x2,lsl x3\]' .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,w2,sxtw\]' .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,w2,uxtw\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,lsl x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,lsl x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,lsl x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl ?#2\]' .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,lsl x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,sxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,sxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,sxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.s,p1/z,\[x1,z2\.s,uxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.s,p1/z,\[x1,z2\.s,uxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.s,p1/z,\[x1,z2\.s,uxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw ?#2\]' .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,sxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1b z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1h z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw ?#3\]' .*: Error: constant shift amount required at operand 3 -- `ld1w z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw ?#2\]' .*: Error: constant shift amount required at operand 3 -- `ld1d z0\.d,p1/z,\[x1,z2\.d,uxtw x3\]' .*: Error: immediate offset out of range 0 to 31 at operand 3 -- `ld1b z0\.d,p1/z,\[z2\.d,#-1\]' .*: Error: constant offset required at operand 3 -- `ld1b z0\.d,p1/z,\[z2\.d,#foo\]' @@ -478,8 +478,8 @@ .*: Error: immediate value must be a multiple of 8 at operand 3 -- `ld1d z0\.d,p1/z,\[z2\.d,#4\]' .*: Error: invalid addressing mode at operand 3 -- `ld1d z0\.d,p1/z,\[z2\.d,#8,mul vl\]' .*: Error: immediate offset out of range 0 to 248 at operand 3 -- `ld1d z0\.d,p1/z,\[z2\.d,#256\]' -.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl#-1\]' -.*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl#4\]' +.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl ?#-1\]' +.*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl ?#4\]' .*: Error: constant shift amount required at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,lsl x3\]' .*: Error: offset has different size from base at operand 2 -- `adr z0\.s,\[z1\.s,z2\.d\]' .*: Error: offset has different size from base at operand 2 -- `adr z0\.s,\[z1\.s,x2\]' @@ -489,16 +489,16 @@ .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[x1,z2\.d\]' .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.d,x2\]' .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[x1,x2\]' -.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl#-1\]' -.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl#4\]' +.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl ?#-1\]' +.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl ?#4\]' .*: Error: constant shift amount required at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,lsl x3\]' .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,sxtw\]' -.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw#-1\]' -.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw#4\]' +.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw ?#-1\]' +.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw ?#4\]' .*: Error: constant shift amount required at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,sxtw x3\]' .*: Error: invalid addressing mode at operand 2 -- `adr z0\.s,\[z1\.s,z2\.s,uxtw\]' -.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw#-1\]' -.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw#4\]' +.*: Error: shift amount out of range 0 to 63 at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw ?#-1\]' +.*: Error: invalid addressing mode at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw ?#4\]' .*: Error: constant shift amount required at operand 2 -- `adr z0\.d,\[z1\.d,z2\.d,uxtw x3\]' .*: Error: index register xzr is not allowed at operand 3 -- `ld1b z0\.b,p0/z,\[x1,xzr\]' .*: Error: index register xzr is not allowed at operand 3 -- `ld1b z0\.h,p0/z,\[x1,xzr\]' @@ -507,70 +507,70 @@ .*: Error: index register xzr is not allowed at operand 3 -- `ld1sb z0\.h,p0/z,\[x1,xzr\]' .*: Error: index register xzr is not allowed at operand 3 -- `ld1sb z0\.s,p0/z,\[x1,xzr\]' .*: Error: index register xzr is not allowed at operand 3 -- `ld1sb z0\.d,p0/z,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.h,p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.s,p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.d,p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.s,p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.d,p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.s,p0/z,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.d,p0/z,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1sw z0\.d,p0/z,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1d z0\.d,p0/z,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.h,p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.s,p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1h z0\.d,p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.s,p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1sh z0\.d,p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.s,p0/z,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1w z0\.d,p0/z,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1sw z0\.d,p0/z,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1d z0\.d,p0/z,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `ld2b {z0\.b-z1\.b},p0/z,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld2h {z0\.h-z1\.h},p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld2w {z0\.s-z1\.s},p0/z,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld2d {z0\.d-z1\.d},p0/z,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld2h {z0\.h-z1\.h},p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld2w {z0\.s-z1\.s},p0/z,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld2d {z0\.d-z1\.d},p0/z,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `ld3b {z0\.b-z2\.b},p0/z,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld3h {z0\.h-z2\.h},p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld3w {z0\.s-z2\.s},p0/z,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld3d {z0\.d-z2\.d},p0/z,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld3h {z0\.h-z2\.h},p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld3w {z0\.s-z2\.s},p0/z,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld3d {z0\.d-z2\.d},p0/z,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `ld4b {z0\.b-z3\.b},p0/z,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld4h {z0\.h-z3\.h},p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld4w {z0\.s-z3\.s},p0/z,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld4d {z0\.d-z3\.d},p0/z,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld4h {z0\.h-z3\.h},p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld4w {z0\.s-z3\.s},p0/z,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld4d {z0\.d-z3\.d},p0/z,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `ldnt1b z0\.b,p0/z,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1h z0\.h,p0/z,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1w z0\.s,p0/z,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1d z0\.d,p0/z,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1h z0\.h,p0/z,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1w z0\.s,p0/z,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ldnt1d z0\.d,p0/z,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.b,p0,\[x1,xzr\]' .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.h,p0,\[x1,xzr\]' .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.s,p0,\[x1,xzr\]' .*: Error: index register xzr is not allowed at operand 3 -- `st1b z0\.d,p0,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.h,p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.s,p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.d,p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.s,p0,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.d,p0,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st1d z0\.d,p0,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.h,p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.s,p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st1h z0\.d,p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.s,p0,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st1w z0\.d,p0,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st1d z0\.d,p0,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `st2b {z0\.b-z1\.b},p0,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st2h {z0\.h-z1\.h},p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st2w {z0\.s-z1\.s},p0,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st2d {z0\.d-z1\.d},p0,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st2h {z0\.h-z1\.h},p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st2w {z0\.s-z1\.s},p0,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st2d {z0\.d-z1\.d},p0,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `st3b {z0\.b-z2\.b},p0,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st3h {z0\.h-z2\.h},p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st3w {z0\.s-z2\.s},p0,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st3d {z0\.d-z2\.d},p0,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st3h {z0\.h-z2\.h},p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st3w {z0\.s-z2\.s},p0,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st3d {z0\.d-z2\.d},p0,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `st4b {z0\.b-z3\.b},p0,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st4h {z0\.h-z3\.h},p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st4w {z0\.s-z3\.s},p0,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st4d {z0\.d-z3\.d},p0,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st4h {z0\.h-z3\.h},p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st4w {z0\.s-z3\.s},p0,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st4d {z0\.d-z3\.d},p0,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `stnt1b z0\.b,p0,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `stnt1h z0\.h,p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `stnt1w z0\.s,p0,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `stnt1d z0\.d,p0,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `stnt1h z0\.h,p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `stnt1w z0\.s,p0,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `stnt1d z0\.d,p0,\[x1,xzr,lsl ?#3\]' .*: Error: index register xzr is not allowed at operand 3 -- `prfb pldl1keep,p0,\[x1,xzr\]' -.*: Error: index register xzr is not allowed at operand 3 -- `prfh pldl1keep,p0,\[x1,xzr,lsl#1\]' -.*: Error: index register xzr is not allowed at operand 3 -- `prfw pldl1keep,p0,\[x1,xzr,lsl#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `prfd pldl1keep,p0,\[x1,xzr,lsl#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `prfh pldl1keep,p0,\[x1,xzr,lsl ?#1\]' +.*: Error: index register xzr is not allowed at operand 3 -- `prfw pldl1keep,p0,\[x1,xzr,lsl ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `prfd pldl1keep,p0,\[x1,xzr,lsl ?#3\]' .*: Error: immediate too big for element size at operand 3 -- `add z0\.b,z0\.b,#-257' .*: Error: immediate too big for element size at operand 3 -- `add z0\.b,z0\.b,#256' -.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl#1' -.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#0,lsl#8' -.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl#8' +.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl ?#1' +.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#0,lsl ?#8' +.*: Error: no shift amount allowed for 8-bit constants at operand 3 -- `add z0\.b,z0\.b,#1,lsl ?#8' .*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#-65537' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-65536\+257' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-65536 ?\+ ?257' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-32767' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-32768\+255' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-32768 ?\+ ?255' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-257' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-255' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#-129' @@ -580,14 +580,14 @@ .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#257' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#32768-255' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#32767' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536-255' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536-129' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536-128' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536 ?- ?255' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536 ?- ?129' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65536 ?- ?128' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.h,z0\.h,#65535' .*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#65536' -.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.h,z0\.h,#1,lsl#1' -.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#-257,lsl#8' -.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#256,lsl#8' +.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.h,z0\.h,#1,lsl ?#1' +.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#-257,lsl ?#8' +.*: Error: immediate too big for element size at operand 3 -- `add z0\.h,z0\.h,#256,lsl ?#8' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-256' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-255' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-129' @@ -598,9 +598,9 @@ .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#32767' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#65536' .*: Error: immediate too big for element size at operand 3 -- `add z0\.s,z0\.s,#0x100000000' -.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.s,z0\.s,#1,lsl#1' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-1,lsl#8' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#256,lsl#8' +.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.s,z0\.s,#1,lsl ?#1' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#-1,lsl ?#8' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.s,z0\.s,#256,lsl ?#8' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-256' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-255' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-129' @@ -611,17 +611,17 @@ .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#32767' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#65536' .*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#0x100000000' -.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.d,z0\.d,#1,lsl#1' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-1,lsl#8' -.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#256,lsl#8' +.*: Error: shift amount must be 0 or 8 at operand 3 -- `add z0\.d,z0\.d,#1,lsl ?#1' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#-1,lsl ?#8' +.*: Error: invalid arithmetic immediate at operand 3 -- `add z0\.d,z0\.d,#256,lsl ?#8' .*: Error: immediate too big for element size at operand 2 -- `dup z0\.b,#-257' .*: Error: immediate too big for element size at operand 2 -- `dup z0\.b,#256' -.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl#1' -.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#0,lsl#8' -.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl#8' +.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl ?#1' +.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#0,lsl ?#8' +.*: Error: no shift amount allowed for 8-bit constants at operand 2 -- `dup z0\.b,#1,lsl ?#8' .*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#-65537' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-32767' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-32768\+255' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-32768 ?\+ ?255' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-257' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-255' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#-129' @@ -630,16 +630,16 @@ .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#257' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#32768-255' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#32767' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536-255' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536-129' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536 ?- ?255' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.h,#65536 ?- ?129' .*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#65536' -.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.h,#1,lsl#1' -.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#-257,lsl#8' -.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#256,lsl#8' +.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.h,#1,lsl ?#1' +.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#-257,lsl ?#8' +.*: Error: immediate too big for element size at operand 2 -- `dup z0\.h,#256,lsl ?#8' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-65536' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32769' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32767' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32768\+255' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-32768 ?\+ ?255' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-257' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-255' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-129' @@ -652,13 +652,13 @@ .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#65536' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#0xffffff7f' .*: Error: immediate too big for element size at operand 2 -- `dup z0\.s,#0x100000000' -.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.s,#1,lsl#1' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-129,lsl#8' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#128,lsl#8' +.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.s,#1,lsl ?#1' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#-129,lsl ?#8' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.s,#128,lsl ?#8' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-65536' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32769' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32767' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32768\+255' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-32768 ?\+ ?255' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-257' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-255' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-129' @@ -671,9 +671,9 @@ .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#65536' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#0xffffff7f' .*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#0x100000000' -.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.d,#1,lsl#1' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-129,lsl#8' -.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#128,lsl#8' +.*: Error: shift amount must be 0 or 8 at operand 2 -- `dup z0\.d,#1,lsl ?#1' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#-129,lsl ?#8' +.*: Error: invalid arithmetic immediate at operand 2 -- `dup z0\.d,#128,lsl ?#8' .*: Error: immediate out of range at operand 3 -- `and z0\.b,z0\.b,#0x0101' .*: Error: immediate out of range at operand 3 -- `and z0\.b,z0\.b,#0x01010101' .*: Error: immediate out of range at operand 3 -- `and z0\.b,z0\.b,#0x0101010101010101' @@ -846,9 +846,9 @@ .*: Error: operand 2 must be an enumeration value such as POW2 -- `cntb x0,#32' .*: Error: immediate operand required at operand 2 -- `cntb x0,x0' .*: Error: immediate operand required at operand 2 -- `cntb x0,z0\.s' -.*: Error: operand 2 must be an enumeration value such as POW2 -- `cntb x0,mul#1' -.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul#0' -.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul#17' +.*: Error: operand 2 must be an enumeration value such as POW2 -- `cntb x0,mul ?#1' +.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul ?#0' +.*: Error: multiplier out of range 1 to 16 at operand 2 -- `cntb x0,pow2,mul ?#17' .*: Error: shift expression expected at operand 2 -- `cntb x0,pow2,#1' .*: Error: operand 1 must be an enumeration value such as PLDL1KEEP -- `prfb pldl0keep,p1,\[x0\]' .*: Error: operand 1 must be an enumeration value such as PLDL1KEEP -- `prfb pldl4keep,p1,\[x0\]' @@ -1133,21 +1133,21 @@ .*: Info: did you mean this\? .*: Info: ld1rqb {z0\.b}, p0/z, \[x0\] .*: Error: index register xzr is not allowed at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,xzr\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl#3\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,xzr,lsl#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqb {z0\.b},p0/z,\[x0,x1,lsl ?#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,xzr,lsl ?#1\]' .*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl#2\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl#3\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,xzr,lsl#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl ?#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqh {z0\.h},p0/z,\[x0,x1,lsl ?#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,xzr,lsl ?#2\]' .*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl#3\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,xzr,lsl#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqw {z0\.s},p0/z,\[x0,x1,lsl ?#3\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,xzr,lsl ?#3\]' .*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl#1\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl#2\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl ?#1\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1rqd {z0\.d},p0/z,\[x0,x1,lsl ?#2\]' .*: Error: operand mismatch -- `sdot z0\.b,z1\.b,z2\.b' .*: Info: did you mean this\? .*: Info: sdot z0\.s, z1\.b, z2\.b diff --git a/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l b/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l index 435d52a..72dfa05 100644 --- a/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l +++ b/gas/testsuite/gas/aarch64/sve-reg-diagnostic.l @@ -9,7 +9,7 @@ .*: Error: invalid base register at operand 2 -- `ldr x1,\[p0\]' .*: Error: invalid base register at operand 2 -- `ldr x1,\[p0\.b\]' .*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl p0\.b\]' -.*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl#p0\.b\]' +.*: Error: invalid shift amount at operand 2 -- `ldr x0,\[x1,x2,lsl ?#p0\.b\]' .*: Error: immediate out of range at operand 3 -- `and x0,x0,#x0' .*: Error: immediate out of range at operand 3 -- `and x0,x0,s0' .*: Error: immediate out of range at operand 3 -- `and x0,x0,#s0' diff --git a/gas/testsuite/gas/aarch64/sve2-fp8-fail.l b/gas/testsuite/gas/aarch64/sve2-fp8-fail.l index ab48ff4..19ecc00 100644 --- a/gas/testsuite/gas/aarch64/sve2-fp8-fail.l +++ b/gas/testsuite/gas/aarch64/sve2-fp8-fail.l @@ -127,35 +127,35 @@ [^:]+:37: Info: macro invoked from here [^:]+:17: Error: expected an SVE vector register at operand 2 -- `f2cvtlt z0.h,p0/z,z1.d' [^:]+:37: Info: macro invoked from here -[^:]+:23: Error: operand mismatch -- `bfcvtn z1.h,{z0.h-z1.h}' +[^:]+:23: Error: operand mismatch -- `bfcvtn z1.h,{ ?z0.h ?- ?z1.h ?}' [^:]+:39: Info: macro invoked from here -[^:]+:24: Error: operand mismatch -- `bfcvtn z0.s,{z0.h-z1.h}' +[^:]+:24: Error: operand mismatch -- `bfcvtn z0.s,{ ?z0.h ?- ?z1.h ?}' [^:]+:39: Info: macro invoked from here -[^:]+:25: Error: operand mismatch -- `bfcvtn z7.d,{z0.h-z1.h}' +[^:]+:25: Error: operand mismatch -- `bfcvtn z7.d,{ ?z0.h ?- ?z1.h ?}' [^:]+:39: Info: macro invoked from here -[^:]+:27: Error: start register out of range at operand 2 -- `bfcvtn z0.b,{z1.h-z2.h}' +[^:]+:27: Error: start register out of range at operand 2 -- `bfcvtn z0.b,{ ?z1.h ?- ?z2.h ?}' [^:]+:39: Info: macro invoked from here -[^:]+:23: Error: operand mismatch -- `fcvtn z1.h,{z0.h-z1.h}' +[^:]+:23: Error: operand mismatch -- `fcvtn z1.h,{ ?z0.h ?- ?z1.h ?}' [^:]+:40: Info: macro invoked from here -[^:]+:24: Error: operand mismatch -- `fcvtn z0.s,{z0.h-z1.h}' +[^:]+:24: Error: operand mismatch -- `fcvtn z0.s,{ ?z0.h ?- ?z1.h ?}' [^:]+:40: Info: macro invoked from here -[^:]+:25: Error: operand mismatch -- `fcvtn z7.d,{z0.h-z1.h}' +[^:]+:25: Error: operand mismatch -- `fcvtn z7.d,{ ?z0.h ?- ?z1.h ?}' [^:]+:40: Info: macro invoked from here -[^:]+:27: Error: start register out of range at operand 2 -- `fcvtn z0.b,{z1.h-z2.h}' +[^:]+:27: Error: start register out of range at operand 2 -- `fcvtn z0.b,{ ?z1.h ?- ?z2.h ?}' [^:]+:40: Info: macro invoked from here -[^:]+:23: Error: operand mismatch -- `fcvtnb z1.h,{z0.s-z1.s}' +[^:]+:23: Error: operand mismatch -- `fcvtnb z1.h,{ ?z0.s ?- ?z1.s ?}' [^:]+:41: Info: macro invoked from here -[^:]+:24: Error: operand mismatch -- `fcvtnb z0.s,{z0.s-z1.s}' +[^:]+:24: Error: operand mismatch -- `fcvtnb z0.s,{ ?z0.s ?- ?z1.s ?}' [^:]+:41: Info: macro invoked from here -[^:]+:25: Error: operand mismatch -- `fcvtnb z7.d,{z0.s-z1.s}' +[^:]+:25: Error: operand mismatch -- `fcvtnb z7.d,{ ?z0.s ?- ?z1.s ?}' [^:]+:41: Info: macro invoked from here -[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnb z0.b,{z1.s-z2.s}' +[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnb z0.b,{ ?z1.s ?- ?z2.s ?}' [^:]+:41: Info: macro invoked from here -[^:]+:23: Error: operand mismatch -- `fcvtnt z1.h,{z0.s-z1.s}' +[^:]+:23: Error: operand mismatch -- `fcvtnt z1.h,{ ?z0.s ?- ?z1.s ?}' [^:]+:42: Info: macro invoked from here -[^:]+:24: Error: operand mismatch -- `fcvtnt z0.s,{z0.s-z1.s}' +[^:]+:24: Error: operand mismatch -- `fcvtnt z0.s,{ ?z0.s ?- ?z1.s ?}' [^:]+:42: Info: macro invoked from here -[^:]+:25: Error: operand mismatch -- `fcvtnt z7.d,{z0.s-z1.s}' +[^:]+:25: Error: operand mismatch -- `fcvtnt z7.d,{ ?z0.s ?- ?z1.s ?}' [^:]+:42: Info: macro invoked from here -[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnt z0.b,{z1.s-z2.s}' +[^:]+:27: Error: start register out of range at operand 2 -- `fcvtnt z0.b,{ ?z1.s ?- ?z2.s ?}' [^:]+:42: Info: macro invoked from here diff --git a/gas/testsuite/gas/aarch64/sve2-lut-bad.l b/gas/testsuite/gas/aarch64/sve2-lut-bad.l index 8bbdc3e..18c730e 100644 --- a/gas/testsuite/gas/aarch64/sve2-lut-bad.l +++ b/gas/testsuite/gas/aarch64/sve2-lut-bad.l @@ -1,34 +1,34 @@ [^ :]+: Assembler messages: -.*: Error: selected processor does not support `luti2 z0.b,{z0.b},z0\[0\]' -.*: Error: selected processor does not support `luti2 z31.b,{z0.b},z0\[0\]' -.*: Error: selected processor does not support `luti2 z0.b,{z31.b},z0\[0\]' -.*: Error: selected processor does not support `luti2 z0.b,{z0.b},z31\[0\]' -.*: Error: selected processor does not support `luti2 z0.b,{z0.b},z0\[3\]' -.*: Error: selected processor does not support `luti2 z4.b,{z9.b},z15\[2\]' -.*: Error: selected processor does not support `luti2 z0.h,{z0.h},z0\[0\]' -.*: Error: selected processor does not support `luti2 z31.h,{z0.h},z0\[0\]' -.*: Error: selected processor does not support `luti2 z0.h,{z31.h},z0\[0\]' -.*: Error: selected processor does not support `luti2 z0.h,{z0.h},z31\[0\]' -.*: Error: selected processor does not support `luti2 z0.h,{z0.h},z0\[7\]' -.*: Error: selected processor does not support `luti2 z4.h,{z9.h},z15\[2\]' -.*: Error: selected processor does not support `luti2 z4.h,{z9.h},z15\[1\]' -.*: Error: selected processor does not support `luti2 z4.h,{z9.h},z15\[4\]' -.*: Error: selected processor does not support `luti4 z0.b,{z0.b},z0\[0\]' -.*: Error: selected processor does not support `luti4 z31.b,{z0.b},z0\[0\]' -.*: Error: selected processor does not support `luti4 z0.b,{z31.b},z0\[0\]' -.*: Error: selected processor does not support `luti4 z0.b,{z0.b},z31\[0\]' -.*: Error: selected processor does not support `luti4 z0.b,{z0.b},z0\[1\]' -.*: Error: selected processor does not support `luti4 z4.b,{z9.b},z15\[1\]' -.*: Error: selected processor does not support `luti4 z0.h,{z0.h},z0\[0\]' -.*: Error: selected processor does not support `luti4 z31.h,{z0.h},z0\[0\]' -.*: Error: selected processor does not support `luti4 z0.h,{z30.h},z0\[0\]' -.*: Error: selected processor does not support `luti4 z0.h,{z0.h},z31\[0\]' -.*: Error: selected processor does not support `luti4 z0.h,{z0.h},z0\[3\]' -.*: Error: selected processor does not support `luti4 z4.h,{z9.h},z15\[2\]' -.*: Error: selected processor does not support `luti4 z0.h,{z0.h,z1.h},z0\[0\]' -.*: Error: selected processor does not support `luti4 z31.h,{z0.h,z1.h},z0\[0\]' -.*: Error: selected processor does not support `luti4 z0.h,{z30.h,z31.h},z0\[0\]' -.*: Error: selected processor does not support `luti4 z0.h,{z31.h,z0.h},z0\[0\]' -.*: Error: selected processor does not support `luti4 z0.h,{z0.h,z1.h},z31\[0\]' -.*: Error: selected processor does not support `luti4 z0.h,{z0.h,z1.h},z0\[3\]' -.*: Error: selected processor does not support `luti4 z4.h,{z9.h,z10.h},z15\[2\]' +.*: Error: selected processor does not support `luti2 z0.b,{ ?z0.b ?},z0\[0\]' +.*: Error: selected processor does not support `luti2 z31.b,{ ?z0.b ?},z0\[0\]' +.*: Error: selected processor does not support `luti2 z0.b,{ ?z31.b ?},z0\[0\]' +.*: Error: selected processor does not support `luti2 z0.b,{ ?z0.b ?},z31\[0\]' +.*: Error: selected processor does not support `luti2 z0.b,{ ?z0.b ?},z0\[3\]' +.*: Error: selected processor does not support `luti2 z4.b,{ ?z9.b ?},z15\[2\]' +.*: Error: selected processor does not support `luti2 z0.h,{ ?z0.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti2 z31.h,{ ?z0.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti2 z0.h,{ ?z31.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti2 z0.h,{ ?z0.h ?},z31\[0\]' +.*: Error: selected processor does not support `luti2 z0.h,{ ?z0.h ?},z0\[7\]' +.*: Error: selected processor does not support `luti2 z4.h,{ ?z9.h ?},z15\[2\]' +.*: Error: selected processor does not support `luti2 z4.h,{ ?z9.h ?},z15\[1\]' +.*: Error: selected processor does not support `luti2 z4.h,{ ?z9.h ?},z15\[4\]' +.*: Error: selected processor does not support `luti4 z0.b,{ ?z0.b ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z31.b,{ ?z0.b ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z0.b,{ ?z31.b ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z0.b,{ ?z0.b ?},z31\[0\]' +.*: Error: selected processor does not support `luti4 z0.b,{ ?z0.b ?},z0\[1\]' +.*: Error: selected processor does not support `luti4 z4.b,{ ?z9.b ?},z15\[1\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z31.h,{ ?z0.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z30.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h ?},z31\[0\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h ?},z0\[3\]' +.*: Error: selected processor does not support `luti4 z4.h,{ ?z9.h ?},z15\[2\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h,z1.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z31.h,{ ?z0.h,z1.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z30.h,z31.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z31.h,z0.h ?},z0\[0\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h,z1.h ?},z31\[0\]' +.*: Error: selected processor does not support `luti4 z0.h,{ ?z0.h,z1.h ?},z0\[3\]' +.*: Error: selected processor does not support `luti4 z4.h,{ ?z9.h,z10.h ?},z15\[2\]' diff --git a/gas/testsuite/gas/aarch64/sve2-lut-illegal.l b/gas/testsuite/gas/aarch64/sve2-lut-illegal.l index bd6e419..500d323 100644 --- a/gas/testsuite/gas/aarch64/sve2-lut-illegal.l +++ b/gas/testsuite/gas/aarch64/sve2-lut-illegal.l @@ -1,212 +1,212 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.b,\{z5\.h\},z7\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.b,\{ ?z5\.h\ ?},z7\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 z2\.b, \{z5\.b\}, z7\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.h,\{z5\.b\},z7\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z2\.h,\{ ?z5\.b\ ?},z7\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 z2\.b, \{z5\.b\}, z7\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{z5\.h\},z7\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{ ?z5\.h\ ?},z7\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z2\.b, \{z5\.b\}, z7\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{z5\.b\},z7\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{ ?z5\.b\ ?},z7\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z2\.b, \{z5\.b\}, z7\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{z5\.h,z6\.h\},z12\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.b,\{ ?z5\.h,z6\.h\ ?},z12\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z2\.b, \{z5\.b-z6\.b\}, z12\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{z5\.b,z6\.b\},z12\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z2\.h,\{ ?z5\.b,z6\.b\ ?},z12\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z2\.b, \{z5\.b-z6\.b\}, z12\[1\] -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.b,\{z5\.b,z6\.h\},z12\[1\]' -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.h,\{z5\.h,z6\.b\},z12\[1\]' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.b,\{\},z7\[1\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.b,\{ ?z5\.b,z6\.h\ ?},z12\[1\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z2\.h,\{ ?z5\.h,z6\.b\ ?},z12\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.b,\{ ?\ ?},z7\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{z5\.b\},z6\.b,z7\[1\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{ ?z5\.b\ ?},z6\.b,z7\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.b,\{z7\.b,z8\.b\},z9\[1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.b,\{ ?z7\.b,z8\.b\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.h,\{\},z7\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5\.h,\{ ?\ ?},z7\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{z5\.h\},z6\.h,z7\[1\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti2 \{ ?z5\.h\ ?},z6\.h,z7\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.h,\{z7\.h,z8\.h\},z9\[1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti2 z5\.h,\{ ?z7\.h,z8\.h\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{\},z7\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{ ?\ ?},z7\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{z5\.b\},z6\.b,z7\[1\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{ ?z5\.b\ ?},z6\.b,z7\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 z5\.b,\{z7\.b,z8\.b\},z9\[1\]' +[^ :]+:[0-9]+: Error: expected a single-register list at operand 2 -- `luti4 z5\.b,\{ ?z7\.b,z8\.b\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{\},z7\[1\]' -[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{z5\.h\},z6\.h,z7\[1\]' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 z5\.h,\{z7\.h,z9\.h\},z3\[3\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.s,\{z7\.s\},z9\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{ ?\ ?},z7\[1\]' +[^ :]+:[0-9]+: Error: unexpected register type at operand 2 -- `luti4 \{ ?z5\.h\ ?},z6\.h,z7\[1\]' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 2 -- `luti4 z5\.h,\{ ?z7\.h,z9\.h\ ?},z3\[3\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.s,\{ ?z7\.s\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 z5\.b, \{z7\.b\}, z9\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{z7\.s\},z9\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{ ?z7\.s\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z5\.b, \{z7\.b\}, z9\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{z7\.s,z8\.s\},z9\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.s,\{ ?z7\.s,z8\.s\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z5\.b, \{z7\.b-z8\.b\}, z9\[1\] [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 z5\.b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.b,\{z7\.b\}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.b,\{ ?z7\.b\ ?}' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.b,\{z7\.b\},z9\[1\],z11\.b' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.b,\{ ?z7\.b\ ?},z9\[1\],z11\.b' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti2 z5\.h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.h,\{z7\.h\}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti2 z5\.h,\{ ?z7\.h\ ?}' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.h,\{z7\.h\},z9\[1\],z11\.h' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti2 z5\.h,\{ ?z7\.h\ ?},z9\[1\],z11\.h' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 z5\.b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.b,\{z7\.b\}' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.b,\{ ?z7\.b\ ?}' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.b,\{z7\.b\},z9\[1\],z11\.b' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.b,\{ ?z7\.b\ ?},z9\[1\],z11\.b' [^ :]+:[0-9]+: Info: macro invoked from here [^ :]+:[0-9]+: Error: comma expected between operands at operand 2 -- `luti4 z5\.h' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{z7\.h\}' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{z7\.h\},z9\[1\],z11\.h' -[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{z7\.h,z8\.h\}' -[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{z7\.h,z8\.h\},z9\[1\],z11\.h' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{z7\.b},z9\[1\]' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{ ?z7\.h\ ?}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{ ?z7\.h\ ?},z9\[1\],z11\.h' +[^ :]+:[0-9]+: Error: comma expected between operands at operand 3 -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?}' +[^ :]+:[0-9]+: Error: unexpected characters following instruction at operand 3 -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?},z9\[1\],z11\.h' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{ ?z7\.b ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.b,\{z7\.t},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.b,\{ ?z7\.t ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.b,\{z7\.b},z9\.b' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.b,\{ ?z7\.b ?},z9\.b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{z7\.h},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti2 z5\.t,\{ ?z7\.h ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.h,\{z7\.t},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti2 z5\.h,\{ ?z7\.t ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.h,\{z7\.h},z9\.h' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z5\.h,\{ ?z7\.h ?},z9\.h' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{z7\.b},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{ ?z7\.b ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.b,\{z7\.t},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.b,\{ ?z7\.t ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.b,\{z7\.b},z9\.b' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.b,\{ ?z7\.b ?},z9\.b' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{z7\.h,z8\.h},z9\[1\]' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{z7\.t,z8\.h},z9\[1\]' -[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{z7\.h,z8\.t},z9\[1\]' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.h,\{z7\.h,z8\.h},z9\.h' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.b,\{z7.b\},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 1 -- `luti4 z5\.t,\{ ?z7\.h,z8\.h ?},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{ ?z7\.t,z8\.h ?},z9\[1\]' +[^ :]+:[0-9]+: Error: unexpected character `t' in element size at operand 2 -- `luti4 z5\.h,\{ ?z7\.h,z8\.t ?},z9\[1\]' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z5\.h,\{ ?z7\.h,z8\.h ?},z9\.h' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.b,\{ ?z7.b\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.b,\{z7\},z9\[1\]' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.b,\{ ?z7\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.b,\{7.b\},z9\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.b,\{ ?7.b\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.b,\{z7.b\},9\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.b,\{ ?z7.b\ ?},9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.h,\{z7.h\},z9\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 5.h,\{ ?z7.h\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.h,\{z7\},z9\[1\]' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti2 z5.h,\{ ?z7\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.h,\{7.h\},z9\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti2 z5.h,\{ ?7.h\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.h,\{z7.h\},9\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z5.h,\{ ?z7.h\ ?},9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.b,\{z7.b},z9\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.b,\{ ?z7.b ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti4 z5\.b,\{z7\},z9\[1\]' +[^ :]+:[0-9]+: Error: missing type suffix at operand 2 -- `luti4 z5\.b,\{ ?z7\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{7\.b\},z9\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.b,\{ ?7\.b\ ?},z9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.b,\{z7\.b\},9\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.b,\{ ?z7\.b\ ?},9\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z5\.h,\{z7,z8\.h\},z9\[1\]' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.h,\{z7\.h,z8\.h},z9\[1\]' -[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{7\.h,z8\.h\},z9\[1\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.h,\{z7\.h,z8\.h\},9\[1\]' -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.b,\{z7\.b\},z9\.b\[2\]' +[^ :]+:[0-9]+: Error: type mismatch in vector register list at operand 2 -- `luti4 z5\.h,\{ ?z7,z8\.h\ ?},z9\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 5\.h,\{ ?z7\.h,z8\.h ?},z9\[1\]' +[^ :]+:[0-9]+: Error: syntax error in register list at operand 2 -- `luti4 z5\.h,\{ ?7\.h,z8\.h\ ?},z9\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?},9\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.b,\{ ?z7\.b\ ?},z9\.b\[2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 z5\.b, \{z7\.b\}, z9\[2\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.h,\{z7\.h\},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti2 z5\.h,\{ ?z7\.h\ ?},z9\.h\[2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti2 z5\.h, \{z7\.h\}, z9\[2\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.b,\{z7\.b\},z9\.b\[1\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.b,\{ ?z7\.b\ ?},z9\.b\[1\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z5\.b, \{z7\.b\}, z9\[1\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{z7\.h\},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{ ?z7\.h\ ?},z9\.h\[2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z5\.h, \{z7\.h\}, z9\[2\] -[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{z7\.h,z8\.h\},z9\.h\[2\]' +[^ :]+:[0-9]+: Error: operand mismatch -- `luti4 z5\.h,\{ ?z7\.h,z8\.h\ ?},z9\.h\[2\]' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: luti4 z5\.h, \{z7\.h-z8\.h\}, z9\[2\] -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.b\[2\],\{z9\.b\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.b\[2\],\{ ?z9\.b\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\.b\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\.b\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.b,\{z9.b\[2\]\},z15' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.b,\{ ?z9.b\[2\]\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\[2\]\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\[2\]\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.h\[2\],\{z9\.h\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\.h\[2\],\{ ?z9\.h\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\.h\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\.h\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.h,\{z9.h\[2\]\},z15' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti2 z4.h,\{ ?z9.h\[2\]\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{z9\[2\]\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti2 z4\[2\],\{ ?z9\[2\]\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.b\[2\],\{z9\.b\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.b\[2\],\{ ?z9\.b\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9\.b\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9\.b\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.b,\{z9.b\[2\]\},z15' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.b,\{ ?z9.b\[2\]\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9\[2\]\},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9\[2\]\ ?},z15' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.h\[2\],\{z9.h,z10.h\},z15' -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9.h,z10.h\},z15' -[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.h,\{z9.h,z10.h\[2\]\},z15' -[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{z9,z10\[2\]\},z15' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{z9.b\},z15.b' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{z9.b\},z15' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{z9.h\},z15.h' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{z9.h\},z15' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{z9.b\},z15.b' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{z9.b\},z15' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h\},z15.h' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h\},z15' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h,z10.h\},z15.h' -[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{z9.h,z10.h\},z15' -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.b,\{z9.b\},z15\[1\]' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\.h\[2\],\{ ?z9.h,z10.h\ ?},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9.h,z10.h\ ?},z15' +[^ :]+:[0-9]+: Error: index not allowed inside register list at operand 2 -- `luti4 z4.h,\{ ?z9.h,z10.h\[2\]\ ?},z15' +[^ :]+:[0-9]+: Error: missing braces at operand 1 -- `luti4 z4\[2\],\{ ?z9,z10\[2\]\ ?},z15' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{ ?z9.b\ ?},z15.b' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.b,\{ ?z9.b\ ?},z15' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{ ?z9.h\ ?},z15.h' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti2 z4.h,\{ ?z9.h\ ?},z15' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{ ?z9.b\ ?},z15.b' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.b,\{ ?z9.b\ ?},z15' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h\ ?},z15.h' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h\ ?},z15' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h,z10.h\ ?},z15.h' +[^ :]+:[0-9]+: Error: operand 3 must be an indexed SVE vector register -- `luti4 z4.h,\{ ?z9.h,z10.h\ ?},z15' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.b,\{ ?z9.b\ ?},z15\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.b,\{z32.b\},z4\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.b,\{ ?z32.b\ ?},z4\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.b,\{z9.b\},z32\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.b,\{ ?z9.b\ ?},z32\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z2.b,\{z9.b\},z4\[4\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z2.b,\{ ?z9.b\ ?},z4\[4\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z4.b,\{z9.b\},z15\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti2 z4.b,\{ ?z9.b\ ?},z15\[-1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.h,\{z9.h\},z15\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti2 z32.h,\{ ?z9.h\ ?},z15\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.h,\{z32.h\},z4\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti2 z4.h,\{ ?z32.h\ ?},z4\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.h,\{z9.h\},z32\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti2 z4.h,\{ ?z9.h\ ?},z32\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z2.h,\{z9.h\},z4\[8\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z2.h,\{ ?z9.h\ ?},z4\[8\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z4.h,\{z9.h\},z15\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 7 at operand 3 -- `luti2 z4.h,\{ ?z9.h\ ?},z15\[-1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.b,\{z9.b\},z15\[1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.b,\{ ?z9.b\ ?},z15\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.b,\{z32.b\},z4\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.b,\{ ?z32.b\ ?},z4\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.b,\{z9.b\},z32\[1\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.b,\{ ?z9.b\ ?},z32\[1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z2.b,\{z9.b\},z4\[2\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z2.b,\{ ?z9.b\ ?},z4\[2\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z4.b,\{z9.b\},z15\[-1\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 1 at operand 3 -- `luti4 z4.b,\{ ?z9.b\ ?},z15\[-1\]' [^ :]+:[0-9]+: Info: macro invoked from here -[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.h,\{z9.h\},z4\[2\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.h,\{z32.h\},z15\[2\]' -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.h,\{z9.h\},z32\[2\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z2.h,\{z9.h\},z15\[4\]' -[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z4.h,\{z9.h\},z15\[-1\]' +[^ :]+:[0-9]+: Error: expected a register or register list at operand 1 -- `luti4 z32.h,\{ ?z9.h\ ?},z4\[2\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `luti4 z4.h,\{ ?z32.h\ ?},z15\[2\]' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 3 -- `luti4 z4.h,\{ ?z9.h\ ?},z32\[2\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z2.h,\{ ?z9.h\ ?},z15\[4\]' +[^ :]+:[0-9]+: Error: register element index out of range 0 to 3 at operand 3 -- `luti4 z4.h,\{ ?z9.h\ ?},z15\[-1\]' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l index 161ea7a..9250190 100644 --- a/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l +++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-invalid.l @@ -1,25 +1,25 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b},x0,x0' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege {p1\.b-p2\.b},x0,x0' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b-p2\.b},x0,x0' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege {p0\.b-p3\.b},x0,x0' -[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege {p15\.b-p0\.b},x0,x0' -[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `whilege {p0\.b,p8\.b},x0,x0' -[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 1 -- `whilege {pn0\.b-pn1\.b},x0,x0' -[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `whilege {p0-p1},x0,x0' -[^ :]+:[0-9]+: Error: operand mismatch -- `whilege {p0\.q-p1\.q},x0,x0' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege { ?p0\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege { ?p1\.b ?- ?p2\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege { ?p0\.b ?- ?p2\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 1 -- `whilege { ?p0\.b ?- ?p3\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: start register out of range at operand 1 -- `whilege { ?p15\.b ?- ?p0\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: the register list must have a stride of 1 at operand 1 -- `whilege { ?p0\.b,p8\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: expected a predicate-as-mask rather than predicate-as-counter register at operand 1 -- `whilege { ?pn0\.b ?- ?pn1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: missing type suffix at operand 1 -- `whilege { ?p0 ?- ?p1 ?},x0,x0' +[^ :]+:[0-9]+: Error: operand mismatch -- `whilege { ?p0\.q ?- ?p1\.q ?},x0,x0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: whilege {p0\.b-p1\.b}, x0, x0 [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: whilege {p0\.h-p1\.h}, x0, x0 [^ :]+:[0-9]+: Info: whilege {p0\.s-p1\.s}, x0, x0 [^ :]+:[0-9]+: Info: whilege {p0\.d-p1\.d}, x0, x0 -[^ :]+:[0-9]+: Error: operand mismatch -- `whilege {p0\.b-p1\.b},w0,w0' +[^ :]+:[0-9]+: Error: operand mismatch -- `whilege { ?p0\.b ?- ?p1\.b ?},w0,w0' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: whilege {p0\.b-p1\.b}, x0, x0 [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: whilege {p0\.h-p1\.h}, x0, x0 [^ :]+:[0-9]+: Info: whilege {p0\.s-p1\.s}, x0, x0 [^ :]+:[0-9]+: Info: whilege {p0\.d-p1\.d}, x0, x0 -[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege {p0\.b-p1\.b},sp,x0' -[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege {p0\.b-p1\.b},x0,sp' +[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 2 -- `whilege { ?p0\.b ?- ?p1\.b ?},sp,x0' +[^ :]+:[0-9]+: Error: expected an integer or zero register at operand 3 -- `whilege { ?p0\.b ?- ?p1\.b ?},x0,sp' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l index 3152dd8..e5d7b43 100644 --- a/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l +++ b/gas/testsuite/gas/aarch64/sve2-sme2-2-noarch.l @@ -1,257 +1,257 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilege {p4\.d-p5\.d},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilegt {p4\.d-p5\.d},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehi {p4\.d-p5\.d},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilehs {p4\.d-p5\.d},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilele {p4\.d-p5\.d},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelo {p4\.d-p5\.d},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilels {p4\.d-p5\.d},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.B-P1\.B},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.b-p15\.b},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.b-p1\.b},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.b-p5\.b},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.h-P1\.h},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.h-p15\.h},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.h-p1\.h},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.h-p5\.h},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.s-P1\.s},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.s-p15\.s},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.s-p1\.s},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.s-p5\.s},x17,x19' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {P0\.d-P1\.d},X0,X0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p14\.d-p15\.d},x0,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x30,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},xzr,x0' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,x30' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p0\.d-p1\.d},x0,xzr' -[^ :]+:[0-9]+: Error: selected processor does not support `whilelt {p4\.d-p5\.d},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilege { ?p4\.d ?- ?p5\.d ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilegt { ?p4\.d ?- ?p5\.d ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehi { ?p4\.d ?- ?p5\.d ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilehs { ?p4\.d ?- ?p5\.d ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilele { ?p4\.d ?- ?p5\.d ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelo { ?p4\.d ?- ?p5\.d ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilels { ?p4\.d ?- ?p5\.d ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.B ?- ?P1\.B ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.b ?- ?p15\.b ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.b ?- ?p1\.b ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.b ?- ?p5\.b ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.h ?- ?P1\.h ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.h ?- ?p15\.h ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.h ?- ?p1\.h ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.h ?- ?p5\.h ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.s ?- ?P1\.s ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.s ?- ?p15\.s ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.s ?- ?p1\.s ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.s ?- ?p5\.s ?},x17,x19' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?P0\.d ?- ?P1\.d ?},X0,X0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p14\.d ?- ?p15\.d ?},x0,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x30,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},xzr,x0' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x0,x30' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p0\.d ?- ?p1\.d ?},x0,xzr' +[^ :]+:[0-9]+: Error: selected processor does not support `whilelt { ?p4\.d ?- ?p5\.d ?},x17,x19' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l index e08001c..4b5d0e5 100644 --- a/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l +++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-invalid.l @@ -1,27 +1,27 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{z0\.s-z1\.s}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 1 -- `sqcvtn 0,{ ?z0\.s ?- ?z1\.s ?}' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqcvtn z0\.h,0' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{z1\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtun z0\.h,{z0\.s-z2\.s}' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtn z0\.h,{z0\.s-z3\.s}' -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.s,{z0\.s-z3\.s}' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqcvtn z0\.h,{ ?z1\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtun z0\.h,{ ?z0\.s ?- ?z2\.s ?}' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqcvtn z0\.h,{ ?z0\.s ?- ?z3\.s ?}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.s,{ ?z0\.s ?- ?z3\.s ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvtun z0\.b, {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvtun z0\.h, {z0\.d-z3\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{z0\.h-z3\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{ ?z0\.h ?- ?z3\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvtn z0\.b, {z0\.s-z3\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvtn z0\.h, {z0\.d-z3\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.b,{z0\.h-z1\.h}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtun z0\.b,{ ?z0\.h ?- ?z1\.h ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvtun z0\.b, {z0\.s-z1\.s} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvtun z0\.h, {z0\.d-z1\.d} -[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{z0\.d-z1\.d}' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqcvtn z0\.s,{ ?z0\.d ?- ?z1\.d ?}' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqcvtn z0\.h, {z0\.d-z1\.d} [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqcvtn z0\.b, {z0\.s-z1\.s} -[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqcvtn z0\.h,{z2\.s-z3\.s}' +[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqcvtn z0\.h,{ ?z2\.s ?- ?z3\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l index de50d04..f1bf93a 100644 --- a/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l +++ b/gas/testsuite/gas/aarch64/sve2-sme2-5-noarch.l @@ -1,13 +1,13 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z14\.h,{z20\.s-z21\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z26\.h,{z14\.s-z15\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{z0\.s-z1\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{z30\.s-z31\.s}' -[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z29\.h,{z6\.s-z7\.s}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtn z14\.h,{ ?z20\.s ?- ?z21\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `sqcvtun z26\.h,{ ?z14\.s ?- ?z15\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z31\.h,{ ?z0\.s ?- ?z1\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z0\.h,{ ?z30\.s ?- ?z31\.s ?}' +[^ :]+:[0-9]+: Error: selected processor does not support `uqcvtn z29\.h,{ ?z6\.s ?- ?z7\.s ?}' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l index 0f70210..7792afa 100644 --- a/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-invalid.l @@ -1,20 +1,20 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{z0\.s-z1\.s},#1' +[^ :]+:[0-9]+: Error: expected a register at operand 1 -- `sqrshrn 0,{ ?z0\.s ?- ?z1\.s ?},#1' [^ :]+:[0-9]+: Error: expected '{' at operand 2 -- `sqrshrn z0\.h,0,#1' -[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.h,{z1\.s-z2\.s},#1' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z2\.s},#1' -[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{z0\.s-z3\.s},#1' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#0' -[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},#17' -[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshrn z0\.h,{z0\.s-z1\.s},x0' -[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{z0\.h-z1\.h},#1' +[^ :]+:[0-9]+: Error: start register out of range at operand 2 -- `sqrshrn z0\.h,{ ?z1\.s ?- ?z2\.s ?},#1' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z2\.s ?},#1' +[^ :]+:[0-9]+: Error: expected a list of 2 registers at operand 2 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z3\.s ?},#1' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#0' +[^ :]+:[0-9]+: Error: immediate value out of range 1 to 16 at operand 3 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#17' +[^ :]+:[0-9]+: Error: immediate operand required at operand 3 -- `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},x0' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.b,{ ?z0\.h ?- ?z1\.h ?},#1' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z1\.s}, #1 [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z1\.d}, #1 -[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.s,{z0\.d-z1\.d},#1' +[^ :]+:[0-9]+: Error: operand mismatch -- `sqrshrn z0\.s,{ ?z0\.d ?- ?z1\.d ?},#1' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: sqrshrn z0\.h, {z0\.d-z1\.d}, #1 [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: sqrshrn z0\.b, {z0\.s-z1\.s}, #1 -[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqrshrn z0\.h,{z2\.s-z3\.s},#1' +[^ :]+:[0-9]+: Warning: SVE `movprfx' compatible instruction expected -- `sqrshrn z0\.h,{ ?z2\.s ?- ?z3\.s ?},#1' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l index 07f95d9..ee01e80 100644 --- a/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l +++ b/gas/testsuite/gas/aarch64/sve2-sme2-6-noarch.l @@ -1,16 +1,16 @@ [^ :]+: Assembler messages: -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z30\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{z0\.s-z1\.s},#16' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z1\.h,{z26\.s-z27\.s},#14' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z30\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{z0\.s-z1\.s},#16' -[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z15\.h,{z6\.s-z7\.s},#9' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{z0\.s-z1\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z30\.s-z31\.s},#1' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{z0\.s-z1\.s},#16' -[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z18\.h,{z2\.s-z3\.s},#6' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrn z1\.h,{ ?z26\.s ?- ?z27\.s ?},#14' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `sqrshrun z15\.h,{ ?z6\.s ?- ?z7\.s ?},#9' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z31\.h,{ ?z0\.s ?- ?z1\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z30\.s ?- ?z31\.s ?},#1' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z0\.h,{ ?z0\.s ?- ?z1\.s ?},#16' +[^ :]+:[0-9]+: Error: selected processor does not support `uqrshrn z18\.h,{ ?z2\.s ?- ?z3\.s ?},#6' diff --git a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l index 69e7ac8..afe2a2b 100644 --- a/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l +++ b/gas/testsuite/gas/aarch64/sve2-sme2-7-invalid.l @@ -8,7 +8,7 @@ [^ :]+:[0-9]+: Info: other valid variant\(s\): [^ :]+:[0-9]+: Info: fclamp z0\.s, z0\.s, z0\.s [^ :]+:[0-9]+: Info: fclamp z0\.d, z0\.d, z0\.d -[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,{z0\.h,z0\.h}' +[^ :]+:[0-9]+: Error: expected an SVE vector register at operand 2 -- `fclamp z0\.h,{ ?z0\.h,z0\.h ?}' [^ :]+:[0-9]+: Error: operand mismatch -- `fclamp z0\.s,z0\.h,z0\.h' [^ :]+:[0-9]+: Info: did you mean this\? [^ :]+:[0-9]+: Info: fclamp z0\.h, z0\.h, z0\.h diff --git a/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l b/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l index c903664..6305000 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l +++ b/gas/testsuite/gas/aarch64/sve2p1-4-invalid.l @@ -1,8 +1,8 @@ .*: Assembler messages: -.*: Error: p0-p7 expected at operand 2 -- `ld1q {Z0.Q},P8/Z,\[Z0.D,x0\]' -.*: Error: invalid base register at operand 3 -- `ld1q {Z0.Q},P0/Z,\[Z31.Q,x0\]' -.*: Error: invalid addressing mode at operand 3 -- `ld1q {Z0.Q},P0/Z,\[Z0.D,x31\]' -.*: Error: operand mismatch -- `ld1q {Z31.D},P7/Z,\[Z31.D,x30\]' +.*: Error: p0-p7 expected at operand 2 -- `ld1q { ?Z0.Q ?},P8/Z,\[Z0.D,x0\]' +.*: Error: invalid base register at operand 3 -- `ld1q { ?Z0.Q ?},P0/Z,\[Z31.Q,x0\]' +.*: Error: invalid addressing mode at operand 3 -- `ld1q { ?Z0.Q ?},P0/Z,\[Z0.D,x31\]' +.*: Error: operand mismatch -- `ld1q { ?Z31.D ?},P7/Z,\[Z31.D,x30\]' .*: Info: did you mean this\? .*: Info: ld1q {z31.q}, p7/z, \[z31.d, x30\] .*: Error: invalid offset register at operand 3 -- `ld1q Z0.Q,P0/Z,\[Z0.D,sp\]' @@ -33,39 +33,39 @@ .*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7/Z,\[x30,#-4,MUL VL\]' .*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7/Z,\[x30,#-100,MUL VL\]' .*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7/Z,\[xzr,#-100,MUL VL\]' -.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x0,LSL#3\]' -.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[sp,x0,LSL#3\]' -.*: Error: invalid offset register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,sp,LSL#3\]' -.*: Error: invalid register list at operand 1 -- `ld2q {Z31.Q,Z31.Q},p0/Z,\[x0,x0,LSL#4\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld2q {Z31.Q,Z0.Q},p0/Z,\[x0,xzr,LSL#2\]' -.*: Error: p0-p7 expected at operand 2 -- `ld2q {Z0.Q,Z1.Q},p8/Z,\[x0,x0,LSL#4\]' -.*: Error: invalid base register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x31,x0,LSL#4\]' -.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x31,LSL#4\]' -.*: Error: invalid base register at operand 3 -- `ld2q {Z30.Q,Z31.Q},p7/Z,\[x31,x31,LSL#4\]' +.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x0,LSL ?#3\]' +.*: Error: invalid addressing mode at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[sp,x0,LSL ?#3\]' +.*: Error: invalid offset register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,sp,LSL ?#3\]' +.*: Error: invalid register list at operand 1 -- `ld2q {Z31.Q,Z31.Q},p0/Z,\[x0,x0,LSL ?#4\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld2q {Z31.Q,Z0.Q},p0/Z,\[x0,xzr,LSL ?#2\]' +.*: Error: p0-p7 expected at operand 2 -- `ld2q {Z0.Q,Z1.Q},p8/Z,\[x0,x0,LSL ?#4\]' +.*: Error: invalid base register at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x31,x0,LSL ?#4\]' +.*: Error: only 'MUL VL' is permitted at operand 3 -- `ld2q {Z0.Q,Z1.Q},p0/Z,\[x0,x31,LSL ?#4\]' +.*: Error: invalid base register at operand 3 -- `ld2q {Z30.Q,Z31.Q},p7/Z,\[x31,x31,LSL ?#4\]' .*: Error: shift expression expected at operand 3 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p0/Z,\[x0,x0,#4\]' .*: Error: shift expression expected at operand 3 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p0/Z,\[sp,x0,#4\]' .*: Error: invalid offset register at operand 3 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p0/Z,\[x0,sp,#4\]' -.*: Error: invalid addressing mode at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,x0,LSL#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,xzr,LSL#3\]' -.*: Error: operand mismatch -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p7/M,\[x0,x0,LSL#4\]' +.*: Error: invalid addressing mode at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,x0,LSL ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld3q {Z29.Q,Z30.Q,Z31.Q},p0/Z,\[x0,xzr,LSL ?#3\]' +.*: Error: operand mismatch -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p7/M,\[x0,x0,LSL ?#4\]' .*: Info: did you mean this\? .*: Info: ld3q {z0.q-z2.q}, p7/z, \[x0, x0, lsl #4\] -.*: Error: p0-p7 expected at operand 2 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p8/Z,\[x30,x0,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `ld3q {Z4.Q,Z1.Q,Z2.Q},p0/Z,\[x31,x30,LSL#4\]' -.*: Error: type mismatch in vector register list at operand 1 -- `ld3q {Z29.D,Z30.Q,Z31.Q},p7/Z,\[x31,x30,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,x0,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[sp,x0,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,sp,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `ld4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8/Z,\[x0,x0,LSL#4\]' -.*: Error: index register xzr is not allowed at operand 3 -- `ld4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x0,xzr,LSL#4\]' -.*: Error: invalid addressing mode at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7/Z,\[x0,x0,LSL#2\]' -.*: Error: invalid base register at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x31,x0,LSL#4\]' -.*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0/Z,\[x1,x30,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `ld4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x30,x30,LSL#4\]' -.*: Error: p0-p7 expected at operand 2 -- `st1q {Z0.Q},P8,\[Z0.D,x0\]' -.*: Error: invalid base register at operand 3 -- `st1q {Z0.Q},P0,\[Z31.Q,x0\]' -.*: Error: invalid addressing mode at operand 3 -- `st1q {Z0.Q},P0,\[Z0.D,x31\]' -.*: Error: operand mismatch -- `st1q {Z31.D},P7,\[Z31.D,x30\]' +.*: Error: p0-p7 expected at operand 2 -- `ld3q {Z0.Q,Z1.Q,Z2.Q},p8/Z,\[x30,x0,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `ld3q {Z4.Q,Z1.Q,Z2.Q},p0/Z,\[x31,x30,LSL ?#4\]' +.*: Error: type mismatch in vector register list at operand 1 -- `ld3q {Z29.D,Z30.Q,Z31.Q},p7/Z,\[x31,x30,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,x0,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[sp,x0,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `ld4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x0,sp,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `ld4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8/Z,\[x0,x0,LSL ?#4\]' +.*: Error: index register xzr is not allowed at operand 3 -- `ld4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x0,xzr,LSL ?#4\]' +.*: Error: invalid addressing mode at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7/Z,\[x0,x0,LSL ?#2\]' +.*: Error: invalid base register at operand 3 -- `ld4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0/Z,\[x31,x0,LSL ?#4\]' +.*: Error: type mismatch in vector register list at operand 1 -- `ld4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0/Z,\[x1,x30,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `ld4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7/Z,\[x30,x30,LSL ?#4\]' +.*: Error: p0-p7 expected at operand 2 -- `st1q { ?Z0.Q ?},P8,\[Z0.D,x0\]' +.*: Error: invalid base register at operand 3 -- `st1q { ?Z0.Q ?},P0,\[Z31.Q,x0\]' +.*: Error: invalid addressing mode at operand 3 -- `st1q { ?Z0.Q ?},P0,\[Z0.D,x31\]' +.*: Error: operand mismatch -- `st1q { ?Z31.D ?},P7,\[Z31.D,x30\]' .*: Info: did you mean this\? .*: Info: st1q {z31.q}, p7, \[z31.d, x30\] .*: Error: invalid offset register at operand 3 -- `st1q Z0.Q,P0,\[Z0.D,sp\]' @@ -94,29 +94,29 @@ .*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7,\[x30,#-4,MUL VL\]' .*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7,\[x30,#-100,MUL VL\]' .*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z28.Q,Z29.Q,Z30.D,Z31.Q},p7,\[xzr,#-100,MUL VL\]' -.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x0,LSL#3\]' -.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[sp,x0,LSL#3\]' -.*: Error: invalid offset register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,sp,LSL#3\]' -.*: Error: invalid register list at operand 1 -- `st2q {Z31.Q,Z31.Q},p0,\[x0,x0,LSL#4\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st2q {Z30.Q,Z31.Q},p0,\[x0,xzr,LSL#2\]' -.*: Error: p0-p7 expected at operand 2 -- `st2q {Z0.Q,Z1.Q},p8,\[x0,x0,LSL#4\]' -.*: Error: invalid base register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x31,x0,LSL#4\]' -.*: Error: only 'MUL VL' is permitted at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x31,LSL#4\]' -.*: Error: invalid base register at operand 3 -- `st2q {Z30.Q,Z31.Q},p7,\[x31,x31,LSL#4\]' +.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x0,LSL ?#3\]' +.*: Error: invalid addressing mode at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[sp,x0,LSL ?#3\]' +.*: Error: invalid offset register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,sp,LSL ?#3\]' +.*: Error: invalid register list at operand 1 -- `st2q {Z31.Q,Z31.Q},p0,\[x0,x0,LSL ?#4\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st2q {Z30.Q,Z31.Q},p0,\[x0,xzr,LSL ?#2\]' +.*: Error: p0-p7 expected at operand 2 -- `st2q {Z0.Q,Z1.Q},p8,\[x0,x0,LSL ?#4\]' +.*: Error: invalid base register at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x31,x0,LSL ?#4\]' +.*: Error: only 'MUL VL' is permitted at operand 3 -- `st2q {Z0.Q,Z1.Q},p0,\[x0,x31,LSL ?#4\]' +.*: Error: invalid base register at operand 3 -- `st2q {Z30.Q,Z31.Q},p7,\[x31,x31,LSL ?#4\]' .*: Error: shift expression expected at operand 3 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p0,\[x0,x0,#4\]' .*: Error: shift expression expected at operand 3 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p0,\[sp,x0,#4\]' .*: Error: invalid offset register at operand 3 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p0,\[x0,sp,#4\]' -.*: Error: invalid addressing mode at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,x0,LSL#2\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,xzr,LSL#3\]' -.*: Error: p0-p7 expected at operand 2 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p8,\[x30,x0,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `st3q {Z4.Q,Z1.Q,Z2.Q},p0,\[x31,x30,LSL#4\]' -.*: Error: type mismatch in vector register list at operand 1 -- `st3q {Z29.D,Z30.Q,Z31.Q},p7,\[x31,x30,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,x0,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[sp,x0,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,sp,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `st4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8,\[x0,x0,LSL#4\]' -.*: Error: index register xzr is not allowed at operand 3 -- `st4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x0,xzr,LSL#4\]' -.*: Error: invalid addressing mode at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7,\[x0,x0,LSL#2\]' -.*: Error: invalid base register at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x31,x0,LSL#4\]' -.*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0,\[x1,x30,LSL#4\]' -.*: Error: invalid register list at operand 1 -- `st4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x30,x30,LSL#4\]' +.*: Error: invalid addressing mode at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,x0,LSL ?#2\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st3q {Z29.Q,Z30.Q,Z31.Q},p0,\[x0,xzr,LSL ?#3\]' +.*: Error: p0-p7 expected at operand 2 -- `st3q {Z0.Q,Z1.Q,Z2.Q},p8,\[x30,x0,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `st3q {Z4.Q,Z1.Q,Z2.Q},p0,\[x31,x30,LSL ?#4\]' +.*: Error: type mismatch in vector register list at operand 1 -- `st3q {Z29.D,Z30.Q,Z31.Q},p7,\[x31,x30,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,x0,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[sp,x0,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `st4q {Z1.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x0,sp,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `st4q {Z30.Q,Z29.Q,Z30.Q,Z31.Q},p8,\[x0,x0,LSL ?#4\]' +.*: Error: index register xzr is not allowed at operand 3 -- `st4q {Z28.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x0,xzr,LSL ?#4\]' +.*: Error: invalid addressing mode at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p7,\[x0,x0,LSL ?#2\]' +.*: Error: invalid base register at operand 3 -- `st4q {Z0.Q,Z1.Q,Z2.Q,Z3.Q},p0,\[x31,x0,LSL ?#4\]' +.*: Error: type mismatch in vector register list at operand 1 -- `st4q {Z0.Q,Z1.Q,Z2.D,Z3.Q},p0,\[x1,x30,LSL ?#4\]' +.*: Error: invalid register list at operand 1 -- `st4q {Z2.Q,Z29.Q,Z30.Q,Z31.Q},p7,\[x30,x30,LSL ?#4\]' diff --git a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l index f37a3a0..249bcd4 100644 --- a/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l +++ b/gas/testsuite/gas/aarch64/sve2p1-6-invalid.l @@ -7,7 +7,7 @@ .*: Info: tblq z0.s, {z0.s}, z0.s .*: Info: tblq z0.d, {z0.d}, z0.d .*: Error: expected a single-register list at operand 2 -- `tblq z0.s,{z0.s,z1.s},z0.s' -.*: Error: expected a single-register list at operand 2 -- `tblq z0.s,{z0.s-z1.s},z0.s' +.*: Error: expected a single-register list at operand 2 -- `tblq z0.s,{z0.s ?- ?z1.s},z0.s' .*: Error: operand mismatch -- `tblq z0.s,{z31.s},z0.b' .*: Info: did you mean this\? .*: Info: tblq z0.s, {z31.s}, z0.s @@ -25,7 +25,7 @@ .*: Info: tbxq z31.s, z0.s, z0.s .*: Info: tbxq z31.d, z0.d, z0.d .*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.s,{z0.s,z1.s},z0.s' -.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.h,{z0.h-z1.h},z0.h' +.*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.h,{z0.h ?- ?z1.h},z0.h' .*: Error: expected an SVE vector register at operand 1 -- `tbxq {z0.s},z31.s,z0.b' .*: Error: expected an SVE vector register at operand 2 -- `tbxq z0.b,{z0.b},{z31.b}' .*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.s,{z0.b},z0.b' @@ -37,7 +37,7 @@ .*: Info: uzpq1 z31.s, z0.s, z0.s .*: Info: uzpq1 z31.d, z0.d, z0.d .*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.s,{z0.s,z1.s},z0.s' -.*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.h,{z0.h-z1.h},z0.h' +.*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.h,{z0.h ?- ?z1.h},z0.h' .*: Error: expected an SVE vector register at operand 1 -- `uzpq1 {z0.s},z31.s,z0.b' .*: Error: expected an SVE vector register at operand 2 -- `uzpq1 z0.b,{z0.b},{z31.b}' .*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.s,{z0.b},z0.b' @@ -49,7 +49,7 @@ .*: Info: uzpq2 z31.s, z0.s, z0.s .*: Info: uzpq2 z31.d, z0.d, z0.d .*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.s,{z0.s,z1.s},z0.s' -.*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.h,{z0.h-z1.h},z0.h' +.*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.h,{z0.h ?- ?z1.h},z0.h' .*: Error: expected an SVE vector register at operand 1 -- `uzpq2 {z0.s},z31.s,z0.b' .*: Error: expected an SVE vector register at operand 2 -- `uzpq2 z0.b,{z0.b},{z31.b}' .*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.s,{z0.b},z0.b' @@ -61,7 +61,7 @@ .*: Info: zipq1 z31.s, z0.s, z0.s .*: Info: zipq1 z31.d, z0.d, z0.d .*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.s,{z0.s,z1.s},z0.s' -.*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.h,{z0.b-z1.h},z0.h' +.*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.h,{z0.b ?- ?z1.h},z0.h' .*: Error: expected an SVE vector register at operand 1 -- `zipq1 {z0.s},z31.s,z0.b' .*: Error: expected an SVE vector register at operand 2 -- `zipq1 z0.b,{z0.b},{z31.b}' .*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.s,{z0.b},z0.b' @@ -73,6 +73,6 @@ .*: Info: zipq2 z31.s, z0.s, z0.s .*: Info: zipq2 z31.d, z0.d, z0.d .*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.s,{z0.s,z1.s},z0.s' -.*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.h,{z0.b-z1.h},z0.h' +.*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.h,{z0.b ?- ?z1.h},z0.h' .*: Error: expected an SVE vector register at operand 1 -- `zipq2 {z0.s},z31.s,z0.b' .*: Error: expected an SVE vector register at operand 2 -- `zipq2 z0.b,{z0.b},{z31.b}' diff --git a/gas/testsuite/gas/aarch64/verbose-error.l b/gas/testsuite/gas/aarch64/verbose-error.l index 188dadf..c5c7450 100644 --- a/gas/testsuite/gas/aarch64/verbose-error.l +++ b/gas/testsuite/gas/aarch64/verbose-error.l @@ -6,7 +6,7 @@ [^:]*:5: Info: other valid variant\(s\): [^:]*:5: Info: ubfm x0, x1, #8, #31 [^:]*:6: Error: immediate value out of range 0 to 31 at operand 4 -- `bfm w0,w1,8,43' -[^:]*:7: Error: invalid shift amount at operand 2 -- `strb w7,\[x30,x0,lsl#1\]' +[^:]*:7: Error: invalid shift amount at operand 2 -- `strb w7,\[x30,x0,lsl ?#1\]' [^:]*:8: Error: invalid addressing mode at operand 2 -- `st2 {v4.2d,v5.2d},\[x3,#3\]' [^:]*:9: Error: the top half of a 128-bit FP/SIMD register is expected at operand 1 -- `fmov v1.D\[0\],x0' [^:]*:10: Error: expected a single-register list at operand 1 -- `ld1r \{v1.4s,v2.4s,v3.4s\},\[x3\],x4' @@ -26,7 +26,7 @@ [^:]*:13: Info: urecpe v0.2s, v7.2s [^:]*:13: Info: other valid variant\(s\): [^:]*:13: Info: urecpe v0.4s, v7.4s -[^:]*:14: Error: operand mismatch -- `adds w0,wsp,x0,uxtx#1' +[^:]*:14: Error: operand mismatch -- `adds w0,wsp,x0,uxtx ?#1' [^:]*:14: Info: did you mean this\? [^:]*:14: Info: adds w0, wsp, w0, uxtx #1 [^:]*:14: Info: other valid variant\(s\): diff --git a/gas/testsuite/gas/all/end-no-dot.l b/gas/testsuite/gas/all/end-no-dot.l new file mode 100644 index 0000000..fa47ae3 --- /dev/null +++ b/gas/testsuite/gas/all/end-no-dot.l @@ -0,0 +1,3 @@ +# No diagnostics should appear for anything past "end". +>3< +>4< diff --git a/gas/testsuite/gas/all/end-no-dot.s b/gas/testsuite/gas/all/end-no-dot.s new file mode 100644 index 0000000..bee10c8 --- /dev/null +++ b/gas/testsuite/gas/all/end-no-dot.s @@ -0,0 +1,11 @@ + if 0 + end a b c + endif + + irpc n,34 + print ">\n<" + endr + + end q r, s + "\z" + äöü'\
\ No newline at end of file diff --git a/gas/testsuite/gas/all/end.l b/gas/testsuite/gas/all/end.l new file mode 100644 index 0000000..e18518d --- /dev/null +++ b/gas/testsuite/gas/all/end.l @@ -0,0 +1,3 @@ +# No diagnostics should appear for anything past .end. +>1< +>2< diff --git a/gas/testsuite/gas/all/end.s b/gas/testsuite/gas/all/end.s new file mode 100644 index 0000000..3090792 --- /dev/null +++ b/gas/testsuite/gas/all/end.s @@ -0,0 +1,11 @@ + .if 0 + .end a b c + .endif + + .irpc n,12 + .print ">\n<" + .endr + + .end q r, s + "\z" + äöü'\
\ No newline at end of file diff --git a/gas/testsuite/gas/all/gas.exp b/gas/testsuite/gas/all/gas.exp index d42d8df..5fff61f 100644 --- a/gas/testsuite/gas/all/gas.exp +++ b/gas/testsuite/gas/all/gas.exp @@ -464,6 +464,30 @@ switch -glob $target_triplet { run_dump_test weakref1w } } + +# .end works differently on some targets. Also make sure to test the dot-less +# form on targets setting NO_PSEUDO_DOT (and not overriding the directive). +switch -glob $target_triplet { + alpha*-*-* { } + hppa*-*-* { } + iq2000-*-* { } + microblaze-*-* { } + mips*-*-* { } + score*-*-* { } + xtensa*-*-* { } + m68hc1*-*-* - + s12z-*-* - + spu-*-* - + xgate-*-* - + z80-*-* { + run_list_test "end" + run_list_test "end-no-dot" + } + default { + run_list_test "end" + } +} + gas_test_error "weakref2.s" "" "e: would close weakref loop: e => a => b => c => d => e" gas_test_error "weakref3.s" "" "a: would close weakref loop: a => b => c => d => e => a" gas_test_error "weakref4.s" "" "is already defined" @@ -477,6 +501,7 @@ if [is_elf_format] { } run_dump_test quoted-sym-names +run_dump_test quoted-label-blank # Targets where # is not a line comment character don't transform # "# <line> <file>" into .linefile (PR gas/29120). diff --git a/gas/testsuite/gas/all/quoted-label-blank.d b/gas/testsuite/gas/all/quoted-label-blank.d new file mode 100644 index 0000000..92b5eca --- /dev/null +++ b/gas/testsuite/gas/all/quoted-label-blank.d @@ -0,0 +1,9 @@ +#nm: --extern-only --numeric-sort +#name: quoted label name followed by whitespace +# No quoted strings handling (TC_STRING_ESCAPES set to 0): +#notarget: powerpc*-*-aix* powerpc*-*-beos* powerpc-*-macos* rs6000-*-* +# Certain LABELS_WITHOUT_COLONS targets: +#notarget: mmix-*-* tic54*-*-* z80-*-* + +#... +0+00 D blank-after diff --git a/gas/testsuite/gas/all/quoted-label-blank.s b/gas/testsuite/gas/all/quoted-label-blank.s new file mode 100644 index 0000000..530b6fc --- /dev/null +++ b/gas/testsuite/gas/all/quoted-label-blank.s @@ -0,0 +1,4 @@ + .data + .globl "blank-after" +"blank-after" : + .byte 0 diff --git a/gas/testsuite/gas/arm/addthumb2err.l b/gas/testsuite/gas/arm/addthumb2err.l index c77d551..f8568a8 100644 --- a/gas/testsuite/gas/arm/addthumb2err.l +++ b/gas/testsuite/gas/arm/addthumb2err.l @@ -1,21 +1,21 @@ [^:]*: Assembler messages: -[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4' -[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR#3' -[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3' -[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR#3' +[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL ?#4' +[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR ?#3' +[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR ?#3' +[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR ?#3' [^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX' -[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL#4' -[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3' -[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR#3' -[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3' +[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL ?#4' +[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR ?#3' +[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR ?#3' +[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR ?#3' [^:]*:18: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,RRX' -[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4' -[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR#3' -[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3' -[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR#3' +[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL ?#4' +[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR ?#3' +[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR ?#3' +[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR ?#3' [^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX' -[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL#4' -[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3' -[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR#3' -[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3' +[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL ?#4' +[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR ?#3' +[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR ?#3' +[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR ?#3' [^:]*:28: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,RRX' diff --git a/gas/testsuite/gas/arm/arch7em-bad.l b/gas/testsuite/gas/arm/arch7em-bad.l index 5ae3b26..642eb60 100644 --- a/gas/testsuite/gas/arm/arch7em-bad.l +++ b/gas/testsuite/gas/arm/arch7em-bad.l @@ -3,10 +3,10 @@ [^:]*:9: Error: selected processor does not support `pkhbt r9,r0,r0' in Thumb mode [^:]*:10: Error: selected processor does not support `pkhbt r0,r9,r0' in Thumb mode [^:]*:11: Error: selected processor does not support `pkhbt r0,r0,r9' in Thumb mode -[^:]*:12: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#0x14' in Thumb mode -[^:]*:13: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#3' in Thumb mode +[^:]*:12: Error: selected processor does not support `pkhbt r0,r0,r0,lsl ?#0x14' in Thumb mode +[^:]*:13: Error: selected processor does not support `pkhbt r0,r0,r0,lsl ?#3' in Thumb mode [^:]*:14: Error: selected processor does not support `pkhtb r1,r2,r3' in Thumb mode -[^:]*:15: Error: selected processor does not support `pkhtb r1,r2,r3,asr#0x11' in Thumb mode +[^:]*:15: Error: selected processor does not support `pkhtb r1,r2,r3,asr ?#0x11' in Thumb mode [^:]*:18: Error: selected processor does not support `qadd r1,r2,r3' in Thumb mode [^:]*:19: Error: selected processor does not support `qadd16 r1,r2,r3' in Thumb mode [^:]*:20: Error: selected processor does not support `qadd8 r1,r2,r3' in Thumb mode @@ -121,10 +121,10 @@ [^:]*:143: Error: selected processor does not support `uxtb16 r1,r2' in Thumb mode [^:]*:144: Error: selected processor does not support `uxtb16 r8,r9' in Thumb mode [^:]*:147: Error: selected processor does not support `sxtab r0,r0,r0' in Thumb mode -[^:]*:148: Error: selected processor does not support `sxtab r0,r0,r0,ror#0' in Thumb mode -[^:]*:149: Error: selected processor does not support `sxtab r9,r0,r0,ror#8' in Thumb mode -[^:]*:150: Error: selected processor does not support `sxtab r0,r9,r0,ror#16' in Thumb mode -[^:]*:151: Error: selected processor does not support `sxtab r0,r0,r9,ror#24' in Thumb mode +[^:]*:148: Error: selected processor does not support `sxtab r0,r0,r0,ror ?#0' in Thumb mode +[^:]*:149: Error: selected processor does not support `sxtab r9,r0,r0,ror ?#8' in Thumb mode +[^:]*:150: Error: selected processor does not support `sxtab r0,r9,r0,ror ?#16' in Thumb mode +[^:]*:151: Error: selected processor does not support `sxtab r0,r0,r9,ror ?#24' in Thumb mode [^:]*:153: Error: selected processor does not support `sxtab16 r1,r2,r3' in Thumb mode [^:]*:154: Error: selected processor does not support `sxtah r1,r2,r3' in Thumb mode [^:]*:155: Error: selected processor does not support `uxtab r1,r2,r3' in Thumb mode diff --git a/gas/testsuite/gas/arm/armv2-mp-bad.l b/gas/testsuite/gas/arm/armv2-mp-bad.l index eb97135..d0159b0 100644 --- a/gas/testsuite/gas/arm/armv2-mp-bad.l +++ b/gas/testsuite/gas/arm/armv2-mp-bad.l @@ -1,3 +1,3 @@ Assembler messages: [^:]*: extension does not apply to the base architecture -[^:]*: unrecognized option -march=armv2\+mp +[^:]*: unrecognized option .*-march=armv2\+mp.* diff --git a/gas/testsuite/gas/arm/ccs-symver.d b/gas/testsuite/gas/arm/ccs-symver.d new file mode 100644 index 0000000..c1255ab --- /dev/null +++ b/gas/testsuite/gas/arm/ccs-symver.d @@ -0,0 +1,10 @@ +#name: .symver in CCS mode +#as: -mccs +#readelf: -sW +# This test is only valid on ELF based ports. +#notarget: *-*-pe *-*-wince + +#... + +[0-9]+: +0+ +1 +OBJECT +GLOBAL +DEFAULT +[0-9]+ +foo + +[0-9]+: +0+ +1 +OBJECT +GLOBAL +DEFAULT +[0-9]+ +foo@version1 +#pass diff --git a/gas/testsuite/gas/arm/ccs-symver.s b/gas/testsuite/gas/arm/ccs-symver.s new file mode 100644 index 0000000..00a96f5 --- /dev/null +++ b/gas/testsuite/gas/arm/ccs-symver.s @@ -0,0 +1,7 @@ + .data + .globl foo + .type foo,@object +foo: + .byte 0 + .size foo,.-foo + .symver foo,foo@version1;remove diff --git a/gas/testsuite/gas/arm/dotprod-legacy-arch.l b/gas/testsuite/gas/arm/dotprod-legacy-arch.l index a627a36..7bbdf63 100644 --- a/gas/testsuite/gas/arm/dotprod-legacy-arch.l +++ b/gas/testsuite/gas/arm/dotprod-legacy-arch.l @@ -1,3 +1,3 @@ Assembler messages: [^:]*: extension does not apply to the base architecture -[^:]*: unrecognized option -march=armv8.1-a\+dotprod +[^:]*: unrecognized option .*-march=armv8\.1-a\+dotprod.* diff --git a/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l b/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l index 76208d2..a6fc3dc 100644 --- a/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l +++ b/gas/testsuite/gas/arm/forbid-armv7-idiv-ext.l @@ -1,3 +1,3 @@ Assembler messages: [^:]*: extension does not apply to the base architecture -[^:]*: unrecognized option -march=armv7\+idiv +[^:]*: unrecognized option .*-march=armv7\+idiv.* diff --git a/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s b/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s index 7799bf1..ac7a90f 100644 --- a/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s +++ b/gas/testsuite/gas/arm/group-reloc-ldrs-encoding-bad.s @@ -14,7 +14,7 @@ .macro ldrtest load store sym offset - ldrtest2 \load \sym "\offset" + ldrtest2 \load \sym \offset \store r0, [r0, #:pc_g1:(\sym \offset)] \store r0, [r0, #:pc_g2:(\sym \offset)] diff --git a/gas/testsuite/gas/arm/group-reloc-ldrs.s b/gas/testsuite/gas/arm/group-reloc-ldrs.s index 96655e1..fa74e7e 100644 --- a/gas/testsuite/gas/arm/group-reloc-ldrs.s +++ b/gas/testsuite/gas/arm/group-reloc-ldrs.s @@ -14,7 +14,7 @@ .macro ldrtest load store sym offset - ldrtest2 \load \sym "\offset" + ldrtest2 \load \sym \offset \store r0, [r0, #:pc_g1:(\sym \offset)] \store r0, [r0, #:pc_g2:(\sym \offset)] diff --git a/gas/testsuite/gas/arm/mve-vldr-bad-1.l b/gas/testsuite/gas/arm/mve-vldr-bad-1.l index 34743bd..de665e9 100644 --- a/gas/testsuite/gas/arm/mve-vldr-bad-1.l +++ b/gas/testsuite/gas/arm/mve-vldr-bad-1.l @@ -103,20 +103,20 @@ [^:]*:88: Error: vector predicated instruction should be in VPT/VPST block -- `vldrdt.u64 q0,\[r0,q1\]' [^:]*:90: Error: instruction missing MVE vector predication code -- `vldrd.u64 q0,\[r0,q1\]' [^:]*:92: Error: shift expression expected -- `vldrb.u8 q0,\[r0,q1,#0\]' -[^:]*:93: Error: can not shift offsets when accessing less than half-word -- `vldrb.u8 q0,\[r0,q1,UXTW#1\]' -[^:]*:94: Error: can not shift offsets when accessing less than half-word -- `vldrb.u16 q0,\[r0,q1,UXTW#1\]' -[^:]*:95: Error: can not shift offsets when accessing less than half-word -- `vldrb.u32 q0,\[r0,q1,UXTW#1\]' +[^:]*:93: Error: can not shift offsets when accessing less than half-word -- `vldrb.u8 q0,\[r0,q1,UXTW ?#1\]' +[^:]*:94: Error: can not shift offsets when accessing less than half-word -- `vldrb.u16 q0,\[r0,q1,UXTW ?#1\]' +[^:]*:95: Error: can not shift offsets when accessing less than half-word -- `vldrb.u32 q0,\[r0,q1,UXTW ?#1\]' [^:]*:96: Error: shift expression expected -- `vldrh.u16 q0,\[r0,q1,#1\]' -[^:]*:97: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW#2\]' -[^:]*:98: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW#2\]' -[^:]*:99: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW#3\]' -[^:]*:100: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW#3\]' +[^:]*:97: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW ?#2\]' +[^:]*:98: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW ?#2\]' +[^:]*:99: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW ?#3\]' +[^:]*:100: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW ?#3\]' [^:]*:101: Error: shift expression expected -- `vldrw.u32 q0,\[r0,q1,#2\]' -[^:]*:102: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW#1\]' -[^:]*:103: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW#3\]' +[^:]*:102: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW ?#1\]' +[^:]*:103: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW ?#3\]' [^:]*:104: Error: shift expression expected -- `vldrd.u64 q0,\[r0,q1,#3\]' -[^:]*:105: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#1\]' -[^:]*:106: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#2\]' -[^:]*:107: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#4\]' +[^:]*:105: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#1\]' +[^:]*:106: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#2\]' +[^:]*:107: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#4\]' diff --git a/gas/testsuite/gas/arm/mve-vldr-bad-3.l b/gas/testsuite/gas/arm/mve-vldr-bad-3.l index cc759ad..bf513da 100644 --- a/gas/testsuite/gas/arm/mve-vldr-bad-3.l +++ b/gas/testsuite/gas/arm/mve-vldr-bad-3.l @@ -161,27 +161,27 @@ [^:]*:139: Error: bad element type for instruction -- `vldrb.p32 q0,\[r2,q3\]' [^:]*:139: Error: bad element type for instruction -- `vldrb.p64 q0,\[r2,q3\]' [^:]*:139: Error: bad element type for instruction -- `vldrb.s8 q0,\[r2,q3\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw#1\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw#1\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw#1\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw#1\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw#1\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw#1\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw#1\]' -[^:]*:142: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw#1\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw#2\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw#2\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw#2\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw#2\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw#2\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw#2\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw#2\]' -[^:]*:145: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw#2\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw#3\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw#3\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw#3\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw#3\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw#3\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw#3\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw#3\]' -[^:]*:148: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw#3\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:142: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw ?#1\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:145: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw ?#2\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw ?#3\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw ?#3\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw ?#3\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw ?#3\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw ?#3\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw ?#3\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw ?#3\]' +[^:]*:148: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw ?#3\]' diff --git a/gas/testsuite/gas/arm/mve-vstr-bad-1.l b/gas/testsuite/gas/arm/mve-vstr-bad-1.l index 3b0f97c..6d34c1e 100644 --- a/gas/testsuite/gas/arm/mve-vstr-bad-1.l +++ b/gas/testsuite/gas/arm/mve-vstr-bad-1.l @@ -45,7 +45,7 @@ [^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block [^:]*:36: *Info: macro .* [^:]*:39: Error: shift expression expected -- `vstrh.16 q0,\[r0,q1,#1\]' -[^:]*:40: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrh.16 q0,\[r0,q1,UXTW#2\]' +[^:]*:40: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrh.16 q0,\[r0,q1,UXTW ?#2\]' [^:]*:41: Error: bad element type for instruction -- `vstrw.8 q0,\[r0,q1\]' [^:]*:42: Error: bad element type for instruction -- `vstrw.u8 q0,\[r0,q1\]' [^:]*:43: Error: bad element type for instruction -- `vstrw.s8 q0,\[r0,q1\]' @@ -71,8 +71,8 @@ [^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block [^:]*:53: *Info: macro .* [^:]*:56: Error: shift expression expected -- `vstrw.32 q0,\[r0,q1,#2\]' -[^:]*:57: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW#1\]' -[^:]*:58: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW#3\]' +[^:]*:57: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW ?#1\]' +[^:]*:58: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW ?#3\]' [^:]*:59: Error: bad element type for instruction -- `vstrd.8 q0,\[r0,q1\]' [^:]*:60: Error: bad element type for instruction -- `vstrd.u8 q0,\[r0,q1\]' [^:]*:61: Error: bad element type for instruction -- `vstrd.s8 q0,\[r0,q1\]' @@ -100,9 +100,9 @@ [^:]*:77: Warning: instruction is UNPREDICTABLE in an IT block [^:]*:83: *Info: macro .* [^:]*:84: Error: shift expression expected -- `vstrd.64 q0,\[r0,q1,#3\]' -[^:]*:85: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#1\]' -[^:]*:86: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#2\]' -[^:]*:87: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#4\]' +[^:]*:85: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#1\]' +[^:]*:86: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#2\]' +[^:]*:87: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#4\]' [^:]*:90: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]' [^:]*:91: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]' [^:]*:93: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]' diff --git a/gas/testsuite/gas/arm/neon-ldst-align-bad.l b/gas/testsuite/gas/arm/neon-ldst-align-bad.l index 5d32ace..8deefdb1 100644 --- a/gas/testsuite/gas/arm/neon-ldst-align-bad.l +++ b/gas/testsuite/gas/arm/neon-ldst-align-bad.l @@ -1,3 +1,3 @@ [^:]*: Assembler messages: -[^:]*:1: Error: bad alignment -- `vld1.8 {d0},\[r0:128\]' -[^:]*:2: Error: bad alignment -- `vld1.8 {q0},\[r0:256\]' +[^:]*:1: Error: bad alignment -- `vld1.8 {d0},\[r0 ?:128\]' +[^:]*:2: Error: bad alignment -- `vld1.8 {q0},\[r0 ?:256\]' diff --git a/gas/testsuite/gas/arm/shift-bad.l b/gas/testsuite/gas/arm/shift-bad.l index 3c9fb6e..667f14b 100644 --- a/gas/testsuite/gas/arm/shift-bad.l +++ b/gas/testsuite/gas/arm/shift-bad.l @@ -1,9 +1,9 @@ .*shift-bad.s: Assembler messages: -.*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror#5' +.*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror ?#5' .*shift-bad.s:3: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl r3' -.*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl#1' -.*shift-bad.s:8: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,lsl#1' +.*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl ?#1' +.*shift-bad.s:8: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,lsl ?#1' .*shift-bad.s:9: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,asr r0' -.*shift-bad.s:13: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl#1' -.*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl#1' +.*shift-bad.s:13: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl ?#1' +.*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl ?#1' .*shift-bad.s:15: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,asr r0' diff --git a/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l b/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l index eb93970..7969ce5 100644 --- a/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l +++ b/gas/testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l @@ -131,7 +131,7 @@ [^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R [^:]*:21: *Info: macro .* [^:]*:45: *Info: macro .* -[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL#2\]' +[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL ?#2\]' [^:]*:21: *Info: macro .* [^:]*:45: *Info: macro .* [^:]*:48: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]' @@ -144,8 +144,8 @@ [^:]*:66: Error: r15 not allowed here -- `ldrb pc,\[r0,r1\]' [^:]*:67: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1\]' [^:]*:68: Error: r15 not allowed here -- `ldrb r0,\[r1,pc\]' -[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL#1\]' -[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL#2\]' +[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL ?#1\]' +[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL ?#2\]' [^:]*:75: Error: r15 not allowed here -- `ldrbt pc,\[r0,#4\]' [^:]*:79: Error: r15 not allowed here -- `ldrd pc,r0,\[r1\]' [^:]*:81: Error: r12 not allowed here -- `ldrd r12,\[r1\]' @@ -184,8 +184,8 @@ [^:]*:149: Error: r15 not allowed here -- `ldrh pc,\[r0,r1\]' [^:]*:150: Error: cannot use register index with PC-relative addressing -- `ldrh r0,\[pc,r1\]' [^:]*:151: Error: r15 not allowed here -- `ldrh r0,\[r1,pc\]' -[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL#1\]' -[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL#1\]' +[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL ?#1\]' +[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL ?#1\]' [^:]*:158: Error: r15 not allowed here -- `ldrht pc,\[r0,#4\]' [^:]*:162: Error: r15 not allowed here -- `ldrsb pc,\[r0,#4\]' [^:]*:165: Error: r15 not allowed here -- `ldrsb pc,\[r0,#-4\]' @@ -196,8 +196,8 @@ [^:]*:179: Error: r15 not allowed here -- `ldrsb pc,\[r0,r1\]' [^:]*:180: Error: cannot use register index with PC-relative addressing -- `ldrsb r0,\[pc,r1\]' [^:]*:181: Error: r15 not allowed here -- `ldrsb r0,\[r1,pc\]' -[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL#2\]' -[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL#2\]' +[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL ?#2\]' +[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL ?#2\]' [^:]*:190: Error: r15 not allowed here -- `ldrsbt pc,\[r0,#4\]' [^:]*:195: Error: r15 not allowed here -- `ldrsh pc,\[r0,#4\]' [^:]*:197: Error: r15 not allowed here -- `ldrsh pc,\[r0,#-4\]' @@ -207,8 +207,8 @@ [^:]*:210: Error: r15 not allowed here -- `ldrsh pc,\[r0,r1\]' [^:]*:211: Error: cannot use register index with PC-relative addressing -- `ldrsh r0,\[pc,r1\]' [^:]*:212: Error: r15 not allowed here -- `ldrsh r0,\[r1,pc\]' -[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL#3\]' -[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL#3\]' +[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL ?#3\]' +[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL ?#3\]' [^:]*:221: Error: r15 not allowed here -- `ldrsht pc,\[r0,#4\]' [^:]*:226: Error: r15 not allowed here -- `ldrt pc,\[r0,#4\]' [^:]*:232: Error: r15 not allowed here -- `str pc,\[r0,#4\]' @@ -217,7 +217,7 @@ [^:]*:235: Error: cannot use post-indexing with PC-relative addressing -- `str r0,\[pc\],#4' [^:]*:236: Error: cannot use writeback with PC-relative addressing -- `str r0,\[pc,#4\]!' [^:]*:239: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1\]' -[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL#2\]' +[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL ?#2\]' [^:]*:246: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,#4\]' [^:]*:247: Error: r15 not allowed here -- `strb.w pc,\[r0,#4\]' [^:]*:249: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,#-4\]' @@ -227,11 +227,11 @@ [^:]*:253: Error: r15 not allowed here -- `strb pc,\[r0\],#4' [^:]*:254: Error: r15 not allowed here -- `strb pc,\[r0,#4\]!' [^:]*:260: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1\]' -[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL#2\]' +[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL ?#2\]' [^:]*:262: Error: r15 not allowed here -- `strb.w pc,\[r0,r1\]' -[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL#2\]' +[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL ?#2\]' [^:]*:266: Error: r15 not allowed here -- `strb.w r0,\[r1,pc\]' -[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL#2\]' +[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL ?#2\]' [^:]*:272: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc,#4\]' [^:]*:273: Error: r15 not allowed here -- `strbt pc,\[r0,#4\]' [^:]*:277: Error: cannot use register index with PC-relative addressing -- `strd r0,r1,\[pc,#4\]' @@ -265,7 +265,7 @@ [^:]*:335: Error: cannot use post-indexing with PC-relative addressing -- `strh r0,\[pc\],#4' [^:]*:336: Error: cannot use writeback with PC-relative addressing -- `strh r0,\[pc,#4\]!' [^:]*:339: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1\]' -[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL#2\]' +[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL ?#2\]' [^:]*:341: Error: r15 not allowed here -- `strh.w pc,\[r0,#4\]' [^:]*:342: Error: r15 not allowed here -- `strh.w pc,\[r0\]' [^:]*:345: Error: r15 not allowed here -- `strh pc,\[r0,#-4\]' @@ -273,8 +273,8 @@ [^:]*:347: Error: r15 not allowed here -- `strh pc,\[r0,#4\]!' [^:]*:351: Error: r15 not allowed here -- `strh.w pc,\[r0,r1\]' [^:]*:353: Error: r15 not allowed here -- `strh.w r0,\[r1,pc\]' -[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL#2\]' -[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL#2\]' +[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL ?#2\]' +[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL ?#2\]' [^:]*:361: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc,#4\]' [^:]*:362: Error: r15 not allowed here -- `strht pc,\[r0,#4\]' [^:]*:363: Error: cannot use register index with PC-relative addressing -- `strht sp,\[pc,#4\]' diff --git a/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l b/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l index f5354b0..b804c8c 100644 --- a/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l +++ b/gas/testsuite/gas/arm/sp-pc-validations-bad-t.l @@ -41,7 +41,7 @@ [^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1\]' [^:]*:21: *Info: macro .* [^:]*:44: *Info: macro .* -[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL#2\]' +[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL ?#2\]' [^:]*:21: *Info: macro .* [^:]*:45: *Info: macro .* [^:]*:48: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]' @@ -59,10 +59,10 @@ [^:]*:66: Error: r15 not allowed here -- `ldrb pc,\[r0,r1\]' [^:]*:67: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1\]' [^:]*:68: Error: r15 not allowed here -- `ldrb r0,\[r1,pc\]' -[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL#1\]' +[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL ?#1\]' [^:]*:70: Error: r13 not allowed here -- `ldrb.w sp,\[r0,r1\]' -[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL#2\]' -[^:]*:72: Error: r13 not allowed here -- `ldrb.w r2,\[r0,sp,LSL#2\]' +[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL ?#2\]' +[^:]*:72: Error: r13 not allowed here -- `ldrb.w r2,\[r0,sp,LSL ?#2\]' [^:]*:75: Error: r15 not allowed here -- `ldrbt pc,\[r0,#4\]' [^:]*:76: Error: r13 not allowed here -- `ldrbt sp,\[r0,#4\]' [^:]*:79: Error: r15 not allowed here -- `ldrd pc,r0,\[r1\]' @@ -123,10 +123,10 @@ [^:]*:149: Error: r15 not allowed here -- `ldrh pc,\[r0,r1\]' [^:]*:150: Error: cannot use register index with PC-relative addressing -- `ldrh r0,\[pc,r1\]' [^:]*:151: Error: r15 not allowed here -- `ldrh r0,\[r1,pc\]' -[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL#1\]' -[^:]*:153: Error: r13 not allowed here -- `ldrh.w sp,\[r0,r1,LSL#1\]' -[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL#1\]' -[^:]*:155: Error: r13 not allowed here -- `ldrh.w r2,\[r0,sp,LSL#1\]' +[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL ?#1\]' +[^:]*:153: Error: r13 not allowed here -- `ldrh.w sp,\[r0,r1,LSL ?#1\]' +[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL ?#1\]' +[^:]*:155: Error: r13 not allowed here -- `ldrh.w r2,\[r0,sp,LSL ?#1\]' [^:]*:158: Error: r15 not allowed here -- `ldrht pc,\[r0,#4\]' [^:]*:159: Error: r13 not allowed here -- `ldrht sp,\[r0,#4\]' [^:]*:162: Error: r15 not allowed here -- `ldrsb pc,\[r0,#4\]' @@ -144,10 +144,10 @@ [^:]*:179: Error: r15 not allowed here -- `ldrsb pc,\[r0,r1\]' [^:]*:180: Error: cannot use register index with PC-relative addressing -- `ldrsb r0,\[pc,r1\]' [^:]*:181: Error: r15 not allowed here -- `ldrsb r0,\[r1,pc\]' -[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL#2\]' -[^:]*:184: Error: r13 not allowed here -- `ldrsb.w sp,\[r0,r1,LSL#2\]' -[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL#2\]' -[^:]*:186: Error: r13 not allowed here -- `ldrsb.w r2,\[r0,sp,LSL#2\]' +[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL ?#2\]' +[^:]*:184: Error: r13 not allowed here -- `ldrsb.w sp,\[r0,r1,LSL ?#2\]' +[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL ?#2\]' +[^:]*:186: Error: r13 not allowed here -- `ldrsb.w r2,\[r0,sp,LSL ?#2\]' [^:]*:190: Error: r15 not allowed here -- `ldrsbt pc,\[r0,#4\]' [^:]*:191: Error: r13 not allowed here -- `ldrsbt sp,\[r0,#4\]' [^:]*:195: Error: r15 not allowed here -- `ldrsh pc,\[r0,#4\]' @@ -164,10 +164,10 @@ [^:]*:210: Error: r15 not allowed here -- `ldrsh pc,\[r0,r1\]' [^:]*:211: Error: cannot use register index with PC-relative addressing -- `ldrsh r0,\[pc,r1\]' [^:]*:212: Error: r15 not allowed here -- `ldrsh r0,\[r1,pc\]' -[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL#3\]' -[^:]*:215: Error: r13 not allowed here -- `ldrsh.w sp,\[r0,r1,LSL#3\]' -[^:]*:216: Error: r13 not allowed here -- `ldrsh.w r0,\[r1,sp,LSL#3\]' -[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL#3\]' +[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL ?#3\]' +[^:]*:215: Error: r13 not allowed here -- `ldrsh.w sp,\[r0,r1,LSL ?#3\]' +[^:]*:216: Error: r13 not allowed here -- `ldrsh.w r0,\[r1,sp,LSL ?#3\]' +[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL ?#3\]' [^:]*:221: Error: r15 not allowed here -- `ldrsht pc,\[r0,#4\]' [^:]*:222: Error: r13 not allowed here -- `ldrsht sp,\[r0,#4\]' [^:]*:226: Error: r15 not allowed here -- `ldrt pc,\[r0,#4\]' @@ -178,7 +178,7 @@ [^:]*:235: Error: cannot use post-indexing with PC-relative addressing -- `str r0,\[pc\],#4' [^:]*:236: Error: cannot use writeback with PC-relative addressing -- `str r0,\[pc,#4\]!' [^:]*:239: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1\]' -[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL#2\]' +[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL ?#2\]' [^:]*:246: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,#4\]' [^:]*:247: Error: r15 not allowed here -- `strb.w pc,\[r0,#4\]' [^:]*:248: Error: r13 not allowed here -- `strb.w sp,\[r0,#4\]' @@ -192,15 +192,15 @@ [^:]*:256: Error: r13 not allowed here -- `strb sp,\[r0\],#4' [^:]*:257: Error: r13 not allowed here -- `strb sp,\[r0,#4\]!' [^:]*:260: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1\]' -[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL#2\]' +[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL ?#2\]' [^:]*:262: Error: r15 not allowed here -- `strb.w pc,\[r0,r1\]' -[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL#2\]' +[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL ?#2\]' [^:]*:264: Error: r13 not allowed here -- `strb.w sp,\[r0,r1\]' -[^:]*:265: Error: r13 not allowed here -- `strb.w sp,\[r0,r1,LSL#2\]' +[^:]*:265: Error: r13 not allowed here -- `strb.w sp,\[r0,r1,LSL ?#2\]' [^:]*:266: Error: r15 not allowed here -- `strb.w r0,\[r1,pc\]' -[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL#2\]' +[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL ?#2\]' [^:]*:268: Error: r13 not allowed here -- `strb.w r0,\[r1,sp\]' -[^:]*:269: Error: r13 not allowed here -- `strb.w r0,\[r1,sp,LSL#2\]' +[^:]*:269: Error: r13 not allowed here -- `strb.w r0,\[r1,sp,LSL ?#2\]' [^:]*:272: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc,#4\]' [^:]*:273: Error: r15 not allowed here -- `strbt pc,\[r0,#4\]' [^:]*:274: Error: r13 not allowed here -- `strbt sp,\[r0,#4\]' @@ -252,7 +252,7 @@ [^:]*:335: Error: cannot use post-indexing with PC-relative addressing -- `strh r0,\[pc\],#4' [^:]*:336: Error: cannot use writeback with PC-relative addressing -- `strh r0,\[pc,#4\]!' [^:]*:339: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1\]' -[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL#2\]' +[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL ?#2\]' [^:]*:341: Error: r15 not allowed here -- `strh.w pc,\[r0,#4\]' [^:]*:342: Error: r15 not allowed here -- `strh.w pc,\[r0\]' [^:]*:343: Error: r13 not allowed here -- `strh.w sp,\[r0,#4\]' @@ -267,10 +267,10 @@ [^:]*:352: Error: r13 not allowed here -- `strh.w sp,\[r0,r1\]' [^:]*:353: Error: r15 not allowed here -- `strh.w r0,\[r1,pc\]' [^:]*:354: Error: r13 not allowed here -- `strh.w r0,\[r1,sp\]' -[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL#2\]' -[^:]*:356: Error: r13 not allowed here -- `strh.w sp,\[r0,r1,LSL#2\]' -[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL#2\]' -[^:]*:358: Error: r13 not allowed here -- `strh.w r0,\[r1,sp,LSL#2\]' +[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL ?#2\]' +[^:]*:356: Error: r13 not allowed here -- `strh.w sp,\[r0,r1,LSL ?#2\]' +[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL ?#2\]' +[^:]*:358: Error: r13 not allowed here -- `strh.w r0,\[r1,sp,LSL ?#2\]' [^:]*:361: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc,#4\]' [^:]*:362: Error: r15 not allowed here -- `strht pc,\[r0,#4\]' [^:]*:363: Error: r13 not allowed here -- `strht sp,\[pc,#4\]' diff --git a/gas/testsuite/gas/arm/sp-pc-validations-bad.l b/gas/testsuite/gas/arm/sp-pc-validations-bad.l index 6e0a52b..26ae2de 100644 --- a/gas/testsuite/gas/arm/sp-pc-validations-bad.l +++ b/gas/testsuite/gas/arm/sp-pc-validations-bad.l @@ -1,27 +1,27 @@ [^:]*: Assembler messages: -[^:]*:11: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL#2\]' -[^:]*:12: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL#2\]!' -[^:]*:13: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1\],pc,LSL#2' -[^:]*:14: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc,r1,LSL#2\]!' -[^:]*:15: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc\],r1,LSL#2' +[^:]*:11: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL ?#2\]' +[^:]*:12: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL ?#2\]!' +[^:]*:13: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1\],pc,LSL ?#2' +[^:]*:14: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc,r1,LSL ?#2\]!' +[^:]*:15: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc\],r1,LSL ?#2' [^:]*:18: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]' [^:]*:19: Error: r15 not allowed here -- `ldrb pc,\[r0\],#4' [^:]*:20: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]!' [^:]*:23: Error: r15 not allowed here -- `ldrb pc,label' [^:]*:24: Error: r15 not allowed here -- `ldrb pc,\[pc,#-0\]' -[^:]*:27: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL#2\]' -[^:]*:28: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL#2\]!' -[^:]*:29: Error: r15 not allowed here -- `ldrb pc,\[r0\],r1,LSL#2' -[^:]*:30: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL#2\]' -[^:]*:31: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL#2\]!' -[^:]*:32: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1\],pc,LSL#2' -[^:]*:33: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1,LSL#2\]!' -[^:]*:34: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc\],r1,LSL#2' +[^:]*:27: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL ?#2\]' +[^:]*:28: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL ?#2\]!' +[^:]*:29: Error: r15 not allowed here -- `ldrb pc,\[r0\],r1,LSL ?#2' +[^:]*:30: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL ?#2\]' +[^:]*:31: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL ?#2\]!' +[^:]*:32: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1\],pc,LSL ?#2' +[^:]*:33: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1,LSL ?#2\]!' +[^:]*:34: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc\],r1,LSL ?#2' [^:]*:37: Error: r15 not allowed here -- `ldrbt pc,\[r0\],#4' [^:]*:38: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],#4' -[^:]*:39: Error: r15 not allowed here -- `ldrbt pc,\[r0\],r1,LSL#4' -[^:]*:40: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],r1,LSL#4' -[^:]*:41: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[r1\],pc,LSL#4' +[^:]*:39: Error: r15 not allowed here -- `ldrbt pc,\[r0\],r1,LSL ?#4' +[^:]*:40: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],r1,LSL ?#4' +[^:]*:41: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[r1\],pc,LSL ?#4' [^:]*:44: Error: r15 not allowed here -- `ldrd r0,pc,\[r1,#4\]' [^:]*:45: Error: r15 not allowed here -- `ldrd r0,pc,\[r1\],#4' [^:]*:46: Error: r15 not allowed here -- `ldrd r0,pc,\[r1,#4\]!' @@ -98,32 +98,32 @@ [^:]*:153: Error: cannot use register index with PC-relative addressing -- `ldrsht r0,\[r1\],pc' [^:]*:156: Error: r15 not allowed here -- `ldrt pc,\[r0\],#4' [^:]*:157: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],#4' -[^:]*:158: Error: r15 not allowed here -- `ldrt pc,\[r0\],r1,LSL#4' -[^:]*:159: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],r1,LSL#4' -[^:]*:160: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[r1\],pc,LSL#4' +[^:]*:158: Error: r15 not allowed here -- `ldrt pc,\[r0\],r1,LSL ?#4' +[^:]*:159: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],r1,LSL ?#4' +[^:]*:160: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[r1\],pc,LSL ?#4' [^:]*:166: Error: cannot use register index with PC-relative addressing -- `str r0,\[pc\],#4' [^:]*:167: Error: cannot use register index with PC-relative addressing -- `str r0,\[pc,#4\]!' -[^:]*:170: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL#4\]' -[^:]*:171: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL#4\]!' -[^:]*:172: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1\],pc,LSL#4' +[^:]*:170: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL ?#4\]' +[^:]*:171: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL ?#4\]!' +[^:]*:172: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1\],pc,LSL ?#4' [^:]*:175: Error: r15 not allowed here -- `strb pc,\[r0,#4\]' [^:]*:176: Error: r15 not allowed here -- `strb pc,\[r0\],#4' [^:]*:177: Error: r15 not allowed here -- `strb pc,\[r0,#4\]!' [^:]*:178: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],#4' [^:]*:179: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,#4\]!' -[^:]*:182: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL#4\]' -[^:]*:183: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL#4\]!' -[^:]*:184: Error: r15 not allowed here -- `strb pc,\[r0\],r1,LSL#4' -[^:]*:185: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL#4\]' -[^:]*:186: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL#4\]!' -[^:]*:187: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0\],pc,LSL#4' -[^:]*:188: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,r1,LSL#4\]!' -[^:]*:189: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],r1,LSL#4' +[^:]*:182: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL ?#4\]' +[^:]*:183: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL ?#4\]!' +[^:]*:184: Error: r15 not allowed here -- `strb pc,\[r0\],r1,LSL ?#4' +[^:]*:185: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL ?#4\]' +[^:]*:186: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL ?#4\]!' +[^:]*:187: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0\],pc,LSL ?#4' +[^:]*:188: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,r1,LSL ?#4\]!' +[^:]*:189: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],r1,LSL ?#4' [^:]*:192: Error: r15 not allowed here -- `strbt pc,\[r0\],#4' [^:]*:193: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],#4' -[^:]*:194: Error: r15 not allowed here -- `strbt pc,\[r0\],r1,LSL#4' -[^:]*:195: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],r1,LSL#4' -[^:]*:196: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[r1\],pc,LSL#4' +[^:]*:194: Error: r15 not allowed here -- `strbt pc,\[r0\],r1,LSL ?#4' +[^:]*:195: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],r1,LSL ?#4' +[^:]*:196: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[r1\],pc,LSL ?#4' [^:]*:199: Error: r15 not allowed here -- `strd r0,pc,\[r1,#4\]' [^:]*:200: Error: r15 not allowed here -- `strd r0,pc,\[r1\],#4' [^:]*:201: Error: r15 not allowed here -- `strd r0,pc,\[r1,#4\]!' @@ -167,5 +167,5 @@ [^:]*:255: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc\],r1' [^:]*:256: Error: cannot use register index with PC-relative addressing -- `strht r0,\[r1\],pc' [^:]*:259: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],#4' -[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],r1,LSL#4' -[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strt r0,\[r1\],pc,LSL#4' +[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],r1,LSL ?#4' +[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strt r0,\[r1\],pc,LSL ?#4' diff --git a/gas/testsuite/gas/arm/t16-bad.l b/gas/testsuite/gas/arm/t16-bad.l index 6222706..8d8a0db 100644 --- a/gas/testsuite/gas/arm/t16-bad.l +++ b/gas/testsuite/gas/arm/t16-bad.l @@ -7,7 +7,7 @@ [^:]*:36: *Info: macro .* [^:]*:16: Error: unshifted register required -- `tst r0,#12' [^:]*:36: *Info: macro .* -[^:]*:17: Error: unshifted register required -- `tst r0,r1,lsl#2' +[^:]*:17: Error: unshifted register required -- `tst r0,r1,lsl ?#2' [^:]*:36: *Info: macro .* [^:]*:18: Error: unshifted register required -- `tst r0,r1,lsl r3' [^:]*:36: *Info: macro .* @@ -19,7 +19,7 @@ [^:]*:37: *Info: macro .* [^:]*:16: Error: unshifted register required -- `cmn r0,#12' [^:]*:37: *Info: macro .* -[^:]*:17: Error: unshifted register required -- `cmn r0,r1,lsl#2' +[^:]*:17: Error: unshifted register required -- `cmn r0,r1,lsl ?#2' [^:]*:37: *Info: macro .* [^:]*:18: Error: unshifted register required -- `cmn r0,r1,lsl r3' [^:]*:37: *Info: macro .* @@ -31,7 +31,7 @@ [^:]*:38: *Info: macro .* [^:]*:16: Error: unshifted register required -- `mvn r0,#12' [^:]*:38: *Info: macro .* -[^:]*:17: Error: unshifted register required -- `mvn r0,r1,lsl#2' +[^:]*:17: Error: unshifted register required -- `mvn r0,r1,lsl ?#2' [^:]*:38: *Info: macro .* [^:]*:18: Error: unshifted register required -- `mvn r0,r1,lsl r3' [^:]*:38: *Info: macro .* @@ -57,7 +57,7 @@ [^:]*:12: Error: lo register required -- `sxtb r0,r8' [^:]*:21: *Info: macro .* [^:]*:43: *Info: macro .* -[^:]*:22: Error: Thumb encoding does not support rotation -- `sxtb r0,r1,ror#8' +[^:]*:22: Error: Thumb encoding does not support rotation -- `sxtb r0,r1,ror ?#8' [^:]*:43: *Info: macro .* [^:]*:11: Error: lo register required -- `sxth r8,r0' [^:]*:21: *Info: macro .* @@ -65,7 +65,7 @@ [^:]*:12: Error: lo register required -- `sxth r0,r8' [^:]*:21: *Info: macro .* [^:]*:44: *Info: macro .* -[^:]*:22: Error: Thumb encoding does not support rotation -- `sxth r0,r1,ror#8' +[^:]*:22: Error: Thumb encoding does not support rotation -- `sxth r0,r1,ror ?#8' [^:]*:44: *Info: macro .* [^:]*:11: Error: lo register required -- `uxtb r8,r0' [^:]*:21: *Info: macro .* @@ -73,7 +73,7 @@ [^:]*:12: Error: lo register required -- `uxtb r0,r8' [^:]*:21: *Info: macro .* [^:]*:45: *Info: macro .* -[^:]*:22: Error: Thumb encoding does not support rotation -- `uxtb r0,r1,ror#8' +[^:]*:22: Error: Thumb encoding does not support rotation -- `uxtb r0,r1,ror ?#8' [^:]*:45: *Info: macro .* [^:]*:11: Error: lo register required -- `uxth r8,r0' [^:]*:21: *Info: macro .* @@ -81,7 +81,7 @@ [^:]*:12: Error: lo register required -- `uxth r0,r8' [^:]*:21: *Info: macro .* [^:]*:46: *Info: macro .* -[^:]*:22: Error: Thumb encoding does not support rotation -- `uxth r0,r1,ror#8' +[^:]*:22: Error: Thumb encoding does not support rotation -- `uxth r0,r1,ror ?#8' [^:]*:46: *Info: macro .* [^:]*:25: Error: dest must overlap one source register -- `adc r1,r2,r3' [^:]*:30: *Info: macro .* @@ -94,7 +94,7 @@ [^:]*:48: *Info: macro .* [^:]*:31: Error: unshifted register required -- `adc r0,#12' [^:]*:48: *Info: macro .* -[^:]*:32: Error: unshifted register required -- `adc r0,r1,lsl#2' +[^:]*:32: Error: unshifted register required -- `adc r0,r1,lsl ?#2' [^:]*:48: *Info: macro .* [^:]*:33: Error: unshifted register required -- `adc r0,r1,lsl r3' [^:]*:48: *Info: macro .* @@ -109,7 +109,7 @@ [^:]*:49: *Info: macro .* [^:]*:31: Error: unshifted register required -- `and r0,#12' [^:]*:49: *Info: macro .* -[^:]*:32: Error: unshifted register required -- `and r0,r1,lsl#2' +[^:]*:32: Error: unshifted register required -- `and r0,r1,lsl ?#2' [^:]*:49: *Info: macro .* [^:]*:33: Error: unshifted register required -- `and r0,r1,lsl r3' [^:]*:49: *Info: macro .* @@ -124,7 +124,7 @@ [^:]*:50: *Info: macro .* [^:]*:31: Error: unshifted register required -- `bic r0,#12' [^:]*:50: *Info: macro .* -[^:]*:32: Error: unshifted register required -- `bic r0,r1,lsl#2' +[^:]*:32: Error: unshifted register required -- `bic r0,r1,lsl ?#2' [^:]*:50: *Info: macro .* [^:]*:33: Error: unshifted register required -- `bic r0,r1,lsl r3' [^:]*:50: *Info: macro .* @@ -139,7 +139,7 @@ [^:]*:51: *Info: macro .* [^:]*:31: Error: unshifted register required -- `eor r0,#12' [^:]*:51: *Info: macro .* -[^:]*:32: Error: unshifted register required -- `eor r0,r1,lsl#2' +[^:]*:32: Error: unshifted register required -- `eor r0,r1,lsl ?#2' [^:]*:51: *Info: macro .* [^:]*:33: Error: unshifted register required -- `eor r0,r1,lsl r3' [^:]*:51: *Info: macro .* @@ -154,7 +154,7 @@ [^:]*:52: *Info: macro .* [^:]*:31: Error: unshifted register required -- `orr r0,#12' [^:]*:52: *Info: macro .* -[^:]*:32: Error: unshifted register required -- `orr r0,r1,lsl#2' +[^:]*:32: Error: unshifted register required -- `orr r0,r1,lsl ?#2' [^:]*:52: *Info: macro .* [^:]*:33: Error: unshifted register required -- `orr r0,r1,lsl r3' [^:]*:52: *Info: macro .* @@ -169,7 +169,7 @@ [^:]*:53: *Info: macro .* [^:]*:31: Error: unshifted register required -- `sbc r0,#12' [^:]*:53: *Info: macro .* -[^:]*:32: Error: unshifted register required -- `sbc r0,r1,lsl#2' +[^:]*:32: Error: unshifted register required -- `sbc r0,r1,lsl ?#2' [^:]*:53: *Info: macro .* [^:]*:33: Error: unshifted register required -- `sbc r0,r1,lsl r3' [^:]*:53: *Info: macro .* @@ -220,7 +220,7 @@ [^:]*:60: *Info: macro .* [^:]*:65: *Info: macro .* [^:]*:66: Error: ror #imm not supported -- `ror r0,r1,#12' -[^:]*:69: Error: unshifted register required -- `add r0,r1,lsl#2' +[^:]*:69: Error: unshifted register required -- `add r0,r1,lsl ?#2' [^:]*:70: Error: unshifted register required -- `add r0,r1,lsl r3' [^:]*:71: Error: lo register required -- `add r8,r0,#1' [^:]*:72: Error: lo register required -- `add r0,r8,#1' @@ -236,7 +236,7 @@ [^:]*:27: Error: lo register required -- `sub r0,r8' [^:]*:30: *Info: macro .* [^:]*:80: *Info: macro .* -[^:]*:32: Error: unshifted register required -- `sub r0,r1,lsl#2' +[^:]*:32: Error: unshifted register required -- `sub r0,r1,lsl ?#2' [^:]*:80: *Info: macro .* [^:]*:33: Error: unshifted register required -- `sub r0,r1,lsl r3' [^:]*:80: *Info: macro .* @@ -246,10 +246,10 @@ [^:]*:84: Error: lo register required -- `sub r8,r1,r2' [^:]*:85: Error: lo register required -- `sub r1,r8,r2' [^:]*:86: Error: lo register required -- `sub r1,r2,r8' -[^:]*:88: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl#2' +[^:]*:88: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl ?#2' [^:]*:89: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl r3' [^:]*:90: Error: only lo regs allowed with immediate -- `cmp r8,#255' -[^:]*:92: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl#2' +[^:]*:92: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl ?#2' [^:]*:93: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl r3' [^:]*:94: Error: only lo regs allowed with immediate -- `mov r8,#255' [^:]*:98: Error: lo register required -- `ldr r8,\[r0\]' @@ -364,8 +364,8 @@ [^:]*:113: *Info: macro .* [^:]*:104: Error: Thumb does not support this addressing mode -- `strh r0,\[r1\],r2' [^:]*:113: *Info: macro .* -[^:]*:115: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,r2,lsl#1\]' -[^:]*:116: Error: Thumb does not support this addressing mode -- `str r0,\[r1,r2,lsl#1\]' +[^:]*:115: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,r2,lsl ?#1\]' +[^:]*:116: Error: Thumb does not support this addressing mode -- `str r0,\[r1,r2,lsl ?#1\]' [^:]*:119: Error: lo register required -- `ldmia r8!,{r1,r2}' [^:]*:120: Error: lo register required -- `ldmia r7!,{r8}' [^:]*:121: Warning: this instruction will write back the base register diff --git a/gas/testsuite/gas/arm/thumb2_bad_reg.l b/gas/testsuite/gas/arm/thumb2_bad_reg.l index 1bdc4ed..d47cd4f 100644 --- a/gas/testsuite/gas/arm/thumb2_bad_reg.l +++ b/gas/testsuite/gas/arm/thumb2_bad_reg.l @@ -514,7 +514,7 @@ [^:]*:[0-9]+: Error: r15 not allowed here -- `ssat r15,#1,r0' [^:]*:[0-9]+: Error: r13 not allowed here -- `ssat r0,#1,r13' [^:]*:[0-9]+: Error: r15 not allowed here -- `ssat r0,#1,r15' -[^:]*:[0-9]+: Error: shift expression is too large -- `ssat r1,#1,r3,asr#32' +[^:]*:[0-9]+: Error: shift expression is too large -- `ssat r1,#1,r3,asr ?#32' [^:]*:[0-9]+: Error: r13 not allowed here -- `ssat16 r13,#1,r0' [^:]*:[0-9]+: Error: r15 not allowed here -- `ssat16 r15,#1,r0' [^:]*:[0-9]+: Error: r13 not allowed here -- `ssat16 r0,#1,r13' @@ -742,7 +742,7 @@ [^:]*:[0-9]+: Error: r15 not allowed here -- `usat r15,#1,r0' [^:]*:[0-9]+: Error: r13 not allowed here -- `usat r0,#1,r13' [^:]*:[0-9]+: Error: r15 not allowed here -- `usat r0,#1,r15' -[^:]*:[0-9]+: Error: shift expression is too large -- `usat r1,#1,r3,asr#32' +[^:]*:[0-9]+: Error: shift expression is too large -- `usat r1,#1,r3,asr ?#32' [^:]*:[0-9]+: Error: r13 not allowed here -- `usat16 r13,#1,r0' [^:]*:[0-9]+: Error: r15 not allowed here -- `usat16 r15,#1,r0' [^:]*:[0-9]+: Error: r13 not allowed here -- `usat16 r0,#1,r13' diff --git a/gas/testsuite/gas/bfin/allinsn16.s b/gas/testsuite/gas/bfin/allinsn16.s index bf00cb5..4a1636d 100644 --- a/gas/testsuite/gas/bfin/allinsn16.s +++ b/gas/testsuite/gas/bfin/allinsn16.s @@ -12,16 +12,16 @@ # iterate 0x20 times .macro _dw b, i, e .if \i < \e - __dw \b, \i, (\i + 0x40) - _dw \b, (\i + 0x40), \e + __dw \b, \i, \i + 0x40 + _dw \b, \i + 0x40, \e .endif .endm # iterate 0x4 times .macro dw b, i, e .if \i < \e - _dw \b, \i, (\i + 0x800) - dw \b, (\i + 0x800), \e + _dw \b, \i, \i + 0x800 + dw \b, \i + 0x800, \e .endif .endm diff --git a/gas/testsuite/gas/i386/avx10_2-rounding-intel.d b/gas/testsuite/gas/i386/avx10_2-rounding-intel.d new file mode 100644 index 0000000..09535f6 --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-rounding-intel.d @@ -0,0 +1,452 @@ +#objdump: -dw -Mintel +#name: i386 AVX10.2 insns rounding (Intel disassembly) +#source: avx10_2-rounding.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +#... +\s*a83:\s*62 f1 d1 18 c2 ec 7b\s+vcmppd k5,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f1 d1 1f c2 ec 7b\s+vcmppd k5\{k7\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f2 f9 18 42 f5\s+vgetexppd ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f2 f9 1f 42 f5\s+vgetexppd ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f2 f9 9f 42 f5\s+vgetexppd ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 18 51 f5\s+vsqrtpd ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 3f 51 f5\s+vsqrtpd ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 51 f5\s+vsqrtpd ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f3 50 18 c2 ec 7b\s+vcmpph k5,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 50 1f c2 ec 7b\s+vcmpph k5\{k7\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f6 79 18 42 f5\s+vgetexpph ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f6 79 1f 42 f5\s+vgetexpph ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f6 79 9f 42 f5\s+vgetexpph ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 18 51 f5\s+vsqrtph ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 78 3f 51 f5\s+vsqrtph ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 78 ff 51 f5\s+vsqrtph ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 50 18 c2 ec 7b\s+vcmpps k5,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f1 50 1f c2 ec 7b\s+vcmpps k5\{k7\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f2 79 18 42 f5\s+vgetexpps ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f2 79 1f 42 f5\s+vgetexpps ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f2 79 9f 42 f5\s+vgetexpps ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 78 18 51 f5\s+vsqrtps ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 78 3f 51 f5\s+vsqrtps ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 78 ff 51 f5\s+vsqrtps ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 18 58 f4\s+vaddpd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 3f 58 f4\s+vaddpd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 58 f4\s+vaddpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 50 18 58 f4\s+vaddph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 50 3f 58 f4\s+vaddph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 50 ff 58 f4\s+vaddph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 50 18 58 f4\s+vaddps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 50 3f 58 f4\s+vaddps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 50 ff 58 f4\s+vaddps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5e f4\s+vdivpd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 3f 5e f4\s+vdivpd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 5e f4\s+vdivpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 50 18 5e f4\s+vdivph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 50 3f 5e f4\s+vdivph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 50 ff 5e f4\s+vdivph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 50 18 5e f4\s+vdivps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 50 3f 5e f4\s+vdivps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 50 ff 5e f4\s+vdivps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 18 59 f4\s+vmulpd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 3f 59 f4\s+vmulpd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 59 f4\s+vmulpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 50 18 59 f4\s+vmulph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 50 3f 59 f4\s+vmulph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 50 ff 59 f4\s+vmulph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 50 18 59 f4\s+vmulps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 50 3f 59 f4\s+vmulps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 50 ff 59 f4\s+vmulps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 2c f4\s+vscalefpd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f 2c f4\s+vscalefpd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 2c f4\s+vscalefpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 2c f4\s+vscalefph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f 2c f4\s+vscalefph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff 2c f4\s+vscalefph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 2c f4\s+vscalefps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f 2c f4\s+vscalefps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff 2c f4\s+vscalefps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5c f4\s+vsubpd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 3f 5c f4\s+vsubpd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 5c f4\s+vsubpd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 50 18 5c f4\s+vsubph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 50 3f 5c f4\s+vsubph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 50 ff 5c f4\s+vsubph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 50 18 5c f4\s+vsubps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 50 3f 5c f4\s+vsubps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 50 ff 5c f4\s+vsubps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5f f4\s+vmaxpd ymm6,ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 d1 1f 5f f4\s+vmaxpd ymm6\{k7\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 d1 9f 5f f4\s+vmaxpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f5 50 18 5f f4\s+vmaxph ymm6,ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f5 50 1f 5f f4\s+vmaxph ymm6\{k7\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f5 50 9f 5f f4\s+vmaxph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 50 18 5f f4\s+vmaxps ymm6,ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 50 1f 5f f4\s+vmaxps ymm6\{k7\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 50 9f 5f f4\s+vmaxps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5d f4\s+vminpd ymm6,ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 d1 1f 5d f4\s+vminpd ymm6\{k7\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 d1 9f 5d f4\s+vminpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f5 50 18 5d f4\s+vminph ymm6,ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f5 50 1f 5d f4\s+vminph ymm6\{k7\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f5 50 9f 5d f4\s+vminph ymm6\{k7\}\{z\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 50 18 5d f4\s+vminps ymm6,ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 50 1f 5d f4\s+vminps ymm6\{k7\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f1 50 9f 5d f4\s+vminps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\} +\s*[a-f0-9]+:\s*62 f3 f9 18 26 f5 7b\s+vgetmantpd ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 1f 26 f5 7b\s+vgetmantpd ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 9f 26 f5 7b\s+vgetmantpd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 18 26 f5 7b\s+vgetmantph ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 1f 26 f5 7b\s+vgetmantph ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 9f 26 f5 7b\s+vgetmantph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 18 26 f5 7b\s+vgetmantps ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 1f 26 f5 7b\s+vgetmantps ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 9f 26 f5 7b\s+vgetmantps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 18 56 f5 7b\s+vreducepd ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 1f 56 f5 7b\s+vreducepd ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 9f 56 f5 7b\s+vreducepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 18 56 f5 7b\s+vreduceph ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 1f 56 f5 7b\s+vreduceph ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 9f 56 f5 7b\s+vreduceph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 18 56 f5 7b\s+vreduceps ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 1f 56 f5 7b\s+vreduceps ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 9f 56 f5 7b\s+vreduceps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 18 09 f5 7b\s+vrndscalepd ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 1f 09 f5 7b\s+vrndscalepd ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 f9 9f 09 f5 7b\s+vrndscalepd ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 18 08 f5 7b\s+vrndscaleph ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 1f 08 f5 7b\s+vrndscaleph ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 78 9f 08 f5 7b\s+vrndscaleph ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 18 08 f5 7b\s+vrndscaleps ymm6,ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 1f 08 f5 7b\s+vrndscaleps ymm6\{k7\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 79 9f 08 f5 7b\s+vrndscaleps ymm6\{k7\}\{z\},ymm5\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f2 d1 18 98 f4\s+vfmadd132pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f 98 f4\s+vfmadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 98 f4\s+vfmadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 98 f4\s+vfmadd132ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f 98 f4\s+vfmadd132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff 98 f4\s+vfmadd132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 98 f4\s+vfmadd132ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f 98 f4\s+vfmadd132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff 98 f4\s+vfmadd132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 a8 f4\s+vfmadd213pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f a8 f4\s+vfmadd213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff a8 f4\s+vfmadd213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 a8 f4\s+vfmadd213ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f a8 f4\s+vfmadd213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff a8 f4\s+vfmadd213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 a8 f4\s+vfmadd213ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f a8 f4\s+vfmadd213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff a8 f4\s+vfmadd213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 b8 f4\s+vfmadd231pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f b8 f4\s+vfmadd231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff b8 f4\s+vfmadd231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 b8 f4\s+vfmadd231ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f b8 f4\s+vfmadd231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff b8 f4\s+vfmadd231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 b8 f4\s+vfmadd231ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f b8 f4\s+vfmadd231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff b8 f4\s+vfmadd231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 96 f4\s+vfmaddsub132pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f 96 f4\s+vfmaddsub132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 96 f4\s+vfmaddsub132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 96 f4\s+vfmaddsub132ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f 96 f4\s+vfmaddsub132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff 96 f4\s+vfmaddsub132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 96 f4\s+vfmaddsub132ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f 96 f4\s+vfmaddsub132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff 96 f4\s+vfmaddsub132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 a6 f4\s+vfmaddsub213pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f a6 f4\s+vfmaddsub213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff a6 f4\s+vfmaddsub213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 a6 f4\s+vfmaddsub213ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f a6 f4\s+vfmaddsub213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff a6 f4\s+vfmaddsub213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 a6 f4\s+vfmaddsub213ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f a6 f4\s+vfmaddsub213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff a6 f4\s+vfmaddsub213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 b6 f4\s+vfmaddsub231pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f b6 f4\s+vfmaddsub231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff b6 f4\s+vfmaddsub231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 b6 f4\s+vfmaddsub231ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f b6 f4\s+vfmaddsub231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff b6 f4\s+vfmaddsub231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 b6 f4\s+vfmaddsub231ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f b6 f4\s+vfmaddsub231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff b6 f4\s+vfmaddsub231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 9a f4\s+vfmsub132pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f 9a f4\s+vfmsub132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 9a f4\s+vfmsub132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 9a f4\s+vfmsub132ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f 9a f4\s+vfmsub132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff 9a f4\s+vfmsub132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 9a f4\s+vfmsub132ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f 9a f4\s+vfmsub132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff 9a f4\s+vfmsub132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 aa f4\s+vfmsub213pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f aa f4\s+vfmsub213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff aa f4\s+vfmsub213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 aa f4\s+vfmsub213ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f aa f4\s+vfmsub213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff aa f4\s+vfmsub213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 aa f4\s+vfmsub213ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f aa f4\s+vfmsub213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff aa f4\s+vfmsub213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 ba f4\s+vfmsub231pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f ba f4\s+vfmsub231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff ba f4\s+vfmsub231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 ba f4\s+vfmsub231ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f ba f4\s+vfmsub231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff ba f4\s+vfmsub231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 ba f4\s+vfmsub231ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f ba f4\s+vfmsub231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff ba f4\s+vfmsub231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 97 f4\s+vfmsubadd132pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f 97 f4\s+vfmsubadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 97 f4\s+vfmsubadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 97 f4\s+vfmsubadd132ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f 97 f4\s+vfmsubadd132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff 97 f4\s+vfmsubadd132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 97 f4\s+vfmsubadd132ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f 97 f4\s+vfmsubadd132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff 97 f4\s+vfmsubadd132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 a7 f4\s+vfmsubadd213pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f a7 f4\s+vfmsubadd213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff a7 f4\s+vfmsubadd213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 a7 f4\s+vfmsubadd213ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f a7 f4\s+vfmsubadd213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff a7 f4\s+vfmsubadd213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 a7 f4\s+vfmsubadd213ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f a7 f4\s+vfmsubadd213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff a7 f4\s+vfmsubadd213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 b7 f4\s+vfmsubadd231pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f b7 f4\s+vfmsubadd231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff b7 f4\s+vfmsubadd231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 b7 f4\s+vfmsubadd231ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f b7 f4\s+vfmsubadd231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff b7 f4\s+vfmsubadd231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 b7 f4\s+vfmsubadd231ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f b7 f4\s+vfmsubadd231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff b7 f4\s+vfmsubadd231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 9c f4\s+vfnmadd132pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f 9c f4\s+vfnmadd132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 9c f4\s+vfnmadd132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 9c f4\s+vfnmadd132ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f 9c f4\s+vfnmadd132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff 9c f4\s+vfnmadd132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 9c f4\s+vfnmadd132ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f 9c f4\s+vfnmadd132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff 9c f4\s+vfnmadd132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 ac f4\s+vfnmadd213pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f ac f4\s+vfnmadd213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff ac f4\s+vfnmadd213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 ac f4\s+vfnmadd213ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f ac f4\s+vfnmadd213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff ac f4\s+vfnmadd213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 ac f4\s+vfnmadd213ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f ac f4\s+vfnmadd213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff ac f4\s+vfnmadd213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 bc f4\s+vfnmadd231pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f bc f4\s+vfnmadd231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff bc f4\s+vfnmadd231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 bc f4\s+vfnmadd231ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f bc f4\s+vfnmadd231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff bc f4\s+vfnmadd231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 bc f4\s+vfnmadd231ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f bc f4\s+vfnmadd231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff bc f4\s+vfnmadd231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 9e f4\s+vfnmsub132pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f 9e f4\s+vfnmsub132pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 9e f4\s+vfnmsub132pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 9e f4\s+vfnmsub132ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f 9e f4\s+vfnmsub132ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff 9e f4\s+vfnmsub132ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 9e f4\s+vfnmsub132ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f 9e f4\s+vfnmsub132ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff 9e f4\s+vfnmsub132ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 ae f4\s+vfnmsub213pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f ae f4\s+vfnmsub213pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff ae f4\s+vfnmsub213pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 ae f4\s+vfnmsub213ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f ae f4\s+vfnmsub213ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff ae f4\s+vfnmsub213ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 ae f4\s+vfnmsub213ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f ae f4\s+vfnmsub213ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff ae f4\s+vfnmsub213ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 18 be f4\s+vfnmsub231pd ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 3f be f4\s+vfnmsub231pd ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 d1 ff be f4\s+vfnmsub231pd ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 51 18 be f4\s+vfnmsub231ph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 51 3f be f4\s+vfnmsub231ph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 51 ff be f4\s+vfnmsub231ph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f2 51 18 be f4\s+vfnmsub231ps ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f2 51 3f be f4\s+vfnmsub231ps ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f2 51 ff be f4\s+vfnmsub231ps ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f3 d1 18 54 f4 7b\s+vfixupimmpd ymm6,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d1 1f 54 f4 7b\s+vfixupimmpd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d1 9f 54 f4 7b\s+vfixupimmpd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 51 18 54 f4 7b\s+vfixupimmps ymm6,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 51 1f 54 f4 7b\s+vfixupimmps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 51 9f 54 f4 7b\s+vfixupimmps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d1 18 50 f4 7b\s+vrangepd ymm6,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d1 1f 50 f4 7b\s+vrangepd ymm6\{k7\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 d1 9f 50 f4 7b\s+vrangepd ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 51 18 50 f4 7b\s+vrangeps ymm6,ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 51 1f 50 f4 7b\s+vrangeps ymm6\{k7\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f3 51 9f 50 f4 7b\s+vrangeps ymm6\{k7\}\{z\},ymm5,ymm4\{sae\},0x7b +\s*[a-f0-9]+:\s*62 f6 53 18 56 f4\s+vfcmaddcph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 53 3f 56 f4\s+vfcmaddcph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 53 ff 56 f4\s+vfcmaddcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 53 18 d6 f4\s+vfcmulcph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 53 3f d6 f4\s+vfcmulcph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 53 ff d6 f4\s+vfcmulcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 52 18 56 f4\s+vfmaddcph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 52 3f 56 f4\s+vfmaddcph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 52 ff 56 f4\s+vfmaddcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f6 52 18 d6 f4\s+vfmulcph ymm6,ymm5,ymm4\{rn-sae\} +\s*[a-f0-9]+:\s*62 f6 52 3f d6 f4\s+vfmulcph ymm6\{k7\},ymm5,ymm4\{rd-sae\} +\s*[a-f0-9]+:\s*62 f6 52 ff d6 f4\s+vfmulcph ymm6\{k7\}\{z\},ymm5,ymm4\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 78 18 5b f5\s+vcvtdq2ph xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 78 3f 5b f5\s+vcvtdq2ph xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 78 ff 5b f5\s+vcvtdq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 78 18 5b f5\s+vcvtdq2ps ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 78 3f 5b f5\s+vcvtdq2ps ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 78 ff 5b f5\s+vcvtdq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 7b 18 7a f5\s+vcvtudq2ph xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 7b 3f 7a f5\s+vcvtudq2ph xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 7b ff 7a f5\s+vcvtudq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 7b 18 7a f5\s+vcvtudq2ps ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 7b 3f 7a f5\s+vcvtudq2ps ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 7b ff 7a f5\s+vcvtudq2ps ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 fb 18 e6 f5\s+vcvtpd2dq xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 fb 3f e6 f5\s+vcvtpd2dq xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 fb ff e6 f5\s+vcvtpd2dq xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 f9 18 5a f5\s+vcvtpd2ph xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 f9 3f 5a f5\s+vcvtpd2ph xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 f9 ff 5a f5\s+vcvtpd2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 18 5a f5\s+vcvtpd2ps xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 3f 5a f5\s+vcvtpd2ps xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 5a f5\s+vcvtpd2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 f8 18 79 f5\s+vcvtpd2udq xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 f8 3f 79 f5\s+vcvtpd2udq xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 f8 ff 79 f5\s+vcvtpd2udq xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 18 7b f5\s+vcvtpd2qq ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 3f 7b f5\s+vcvtpd2qq ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 7b f5\s+vcvtpd2qq ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 18 79 f5\s+vcvtpd2uqq ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 3f 79 f5\s+vcvtpd2uqq ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 79 f5\s+vcvtpd2uqq ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 5b f5\s+vcvtph2dq ymm6,xmm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 79 3f 5b f5\s+vcvtph2dq ymm6\{k7\},xmm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 79 ff 5b f5\s+vcvtph2dq ymm6\{k7\}\{z\},xmm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 7b f5\s+vcvtph2qq ymm6,xmm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 79 3f 7b f5\s+vcvtph2qq ymm6\{k7\},xmm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 79 ff 7b f5\s+vcvtph2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 78 18 79 f5\s+vcvtph2udq ymm6,xmm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 78 3f 79 f5\s+vcvtph2udq ymm6\{k7\},xmm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 78 ff 79 f5\s+vcvtph2udq ymm6\{k7\}\{z\},xmm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 79 f5\s+vcvtph2uqq ymm6,xmm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 79 3f 79 f5\s+vcvtph2uqq ymm6\{k7\},xmm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 79 ff 79 f5\s+vcvtph2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 78 18 5a f5\s+vcvtph2pd ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 1f 5a f5\s+vcvtph2pd ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 9f 5a f5\s+vcvtph2pd ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f2 79 18 13 f5\s+vcvtph2ps ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f2 79 1f 13 f5\s+vcvtph2ps ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f2 79 9f 13 f5\s+vcvtph2ps ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f6 79 18 13 f5\s+vcvtph2psx ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f6 79 1f 13 f5\s+vcvtph2psx ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f6 79 9f 13 f5\s+vcvtph2psx ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 18 7d f5\s+vcvtph2uw ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 78 3f 7d f5\s+vcvtph2uw ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 78 ff 7d f5\s+vcvtph2uw ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 7d f5\s+vcvtph2w ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 79 3f 7d f5\s+vcvtph2w ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 79 ff 7d f5\s+vcvtph2w ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 79 18 5b f5\s+vcvtps2dq ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 79 3f 5b f5\s+vcvtps2dq ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 79 ff 5b f5\s+vcvtps2dq ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 78 18 79 f5\s+vcvtps2udq ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 78 3f 79 f5\s+vcvtps2udq ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 78 ff 79 f5\s+vcvtps2udq ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 78 18 5a f5\s+vcvtps2pd ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 78 1f 5a f5\s+vcvtps2pd ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 78 9f 5a f5\s+vcvtps2pd ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 1d f5\s+vcvtps2phx xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 79 3f 1d f5\s+vcvtps2phx xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 79 ff 1d f5\s+vcvtps2phx xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 79 18 7b f5\s+vcvtps2qq ymm6,xmm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 79 3f 7b f5\s+vcvtps2qq ymm6\{k7\},xmm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 79 ff 7b f5\s+vcvtps2qq ymm6\{k7\}\{z\},xmm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 79 18 79 f5\s+vcvtps2uqq ymm6,xmm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 79 3f 79 f5\s+vcvtps2uqq ymm6\{k7\},xmm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 79 ff 79 f5\s+vcvtps2uqq ymm6\{k7\}\{z\},xmm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 fa 18 e6 f5\s+vcvtqq2pd ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 fa 3f e6 f5\s+vcvtqq2pd ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 fa ff e6 f5\s+vcvtqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 f8 18 5b f5\s+vcvtqq2ph xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 f8 3f 5b f5\s+vcvtqq2ph xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 f8 ff 5b f5\s+vcvtqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 f8 18 5b f5\s+vcvtqq2ps xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 f8 3f 5b f5\s+vcvtqq2ps xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 f8 ff 5b f5\s+vcvtqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 fa 18 7a f5\s+vcvtuqq2pd ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 fa 3f 7a f5\s+vcvtuqq2pd ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 fa ff 7a f5\s+vcvtuqq2pd ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 fb 18 7a f5\s+vcvtuqq2ph xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 fb 3f 7a f5\s+vcvtuqq2ph xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 fb ff 7a f5\s+vcvtuqq2ph xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 fb 18 7a f5\s+vcvtuqq2ps xmm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f1 fb 3f 7a f5\s+vcvtuqq2ps xmm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f1 fb ff 7a f5\s+vcvtuqq2ps xmm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f1 f9 18 e6 f5\s+vcvttpd2dq xmm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 1f e6 f5\s+vcvttpd2dq xmm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 9f e6 f5\s+vcvttpd2dq xmm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f8 18 78 f5\s+vcvttpd2udq xmm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f8 1f 78 f5\s+vcvttpd2udq xmm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f8 9f 78 f5\s+vcvttpd2udq xmm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 18 7a f5\s+vcvttpd2qq ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 1f 7a f5\s+vcvttpd2qq ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 9f 7a f5\s+vcvttpd2qq ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 18 78 f5\s+vcvttpd2uqq ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 1f 78 f5\s+vcvttpd2uqq ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 f9 9f 78 f5\s+vcvttpd2uqq ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 7a 18 5b f5\s+vcvttph2dq ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 7a 1f 5b f5\s+vcvttph2dq ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 7a 9f 5b f5\s+vcvttph2dq ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 7a f5\s+vcvttph2qq ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 1f 7a f5\s+vcvttph2qq ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 9f 7a f5\s+vcvttph2qq ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 18 78 f5\s+vcvttph2udq ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 1f 78 f5\s+vcvttph2udq ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 9f 78 f5\s+vcvttph2udq ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 78 f5\s+vcvttph2uqq ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 1f 78 f5\s+vcvttph2uqq ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 9f 78 f5\s+vcvttph2uqq ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 18 7c f5\s+vcvttph2uw ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 1f 7c f5\s+vcvttph2uw ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 78 9f 7c f5\s+vcvttph2uw ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 18 7c f5\s+vcvttph2w ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 1f 7c f5\s+vcvttph2w ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 79 9f 7c f5\s+vcvttph2w ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 7a 18 5b f5\s+vcvttps2dq ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 7a 1f 5b f5\s+vcvttps2dq ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 7a 9f 5b f5\s+vcvttps2dq ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 78 18 78 f5\s+vcvttps2udq ymm6,ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 78 1f 78 f5\s+vcvttps2udq ymm6\{k7\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 78 9f 78 f5\s+vcvttps2udq ymm6\{k7\}\{z\},ymm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 79 18 7a f5\s+vcvttps2qq ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 79 1f 7a f5\s+vcvttps2qq ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 79 9f 7a f5\s+vcvttps2qq ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 79 18 78 f5\s+vcvttps2uqq ymm6,xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 79 1f 78 f5\s+vcvttps2uqq ymm6\{k7\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f1 79 9f 78 f5\s+vcvttps2uqq ymm6\{k7\}\{z\},xmm5\{sae\} +\s*[a-f0-9]+:\s*62 f5 7b 18 7d f5\s+vcvtuw2ph ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 7b 3f 7d f5\s+vcvtuw2ph ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 7b ff 7d f5\s+vcvtuw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\} +\s*[a-f0-9]+:\s*62 f5 7a 18 7d f5\s+vcvtw2ph ymm6,ymm5\{rn-sae\} +\s*[a-f0-9]+:\s*62 f5 7a 3f 7d f5\s+vcvtw2ph ymm6\{k7\},ymm5\{rd-sae\} +\s*[a-f0-9]+:\s*62 f5 7a ff 7d f5\s+vcvtw2ph ymm6\{k7\}\{z\},ymm5\{rz-sae\} +#pass diff --git a/gas/testsuite/gas/i386/avx10_2-rounding-inval.l b/gas/testsuite/gas/i386/avx10_2-rounding-inval.l new file mode 100644 index 0000000..924353b --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-rounding-inval.l @@ -0,0 +1,35 @@ +.* Assembler messages: +.*:6: Error: operand size mismatch for `vcmppd' +.*:7: Error: operand size mismatch for `vgetexppd' +.*:8: Error: operand size mismatch for `vsqrtpd' +.*:9: Error: operand size mismatch for `vaddpd' +.*:10: Error: operand size mismatch for `vmaxpd' +.*:11: Error: operand size mismatch for `vreducepd' +.*:12: Error: operand size mismatch for `vfmadd132pd' +.*:13: Error: operand size mismatch for `vrangepd' +.*:14: Error: operand size mismatch for `vfcmaddcph' +.*:15: Error: operand size mismatch for `vcvtdq2ph' +.*:16: Error: operand size mismatch for `vcvtdq2ps' +.*:17: Error: operand size mismatch for `vcvtpd2dq' +.*:18: Error: operand size mismatch for `vcvtpd2ph' +.*:19: Error: operand size mismatch for `vcvtpd2qq' +.*:20: Error: operand size mismatch for `vcvtph2dq' +.*:21: Error: operand size mismatch for `vcvtph2qq' +.*:22: Error: operand size mismatch for `vcvtph2pd' +.*:23: Error: operand size mismatch for `vcvtph2ps' +.*:24: Error: operand size mismatch for `vcvtph2uw' +.*:25: Error: operand size mismatch for `vcvtps2dq' +.*:26: Error: operand size mismatch for `vcvtps2pd' +.*:27: Error: operand size mismatch for `vcvtps2phx' +.*:28: Error: operand size mismatch for `vcvtps2qq' +.*:29: Error: operand size mismatch for `vcvtqq2pd' +.*:30: Error: operand size mismatch for `vcvtqq2ph' +.*:31: Error: operand size mismatch for `vcvtqq2ps' +.*:32: Error: operand size mismatch for `vcvttpd2dq' +.*:33: Error: operand size mismatch for `vcvttpd2qq' +.*:34: Error: operand size mismatch for `vcvttph2dq' +.*:35: Error: operand size mismatch for `vcvttph2qq' +.*:36: Error: operand size mismatch for `vcvttph2uw' +.*:37: Error: operand size mismatch for `vcvttps2dq' +.*:38: Error: operand size mismatch for `vcvttps2qq' +.*:39: Error: operand size mismatch for `vcvtuw2ph' diff --git a/gas/testsuite/gas/i386/avx10_2-rounding-inval.s b/gas/testsuite/gas/i386/avx10_2-rounding-inval.s new file mode 100644 index 0000000..fbde553 --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-rounding-inval.s @@ -0,0 +1,39 @@ +# Check invalid AVX10.2 instructions + + .text + .arch .noavx10.2 +_start: + vcmppd $123, {sae}, %ymm4, %ymm5, %k5 + vgetexppd {sae}, %ymm5, %ymm6 + vsqrtpd {rn-sae}, %ymm5, %ymm6 + vaddpd {rn-sae}, %ymm4, %ymm5, %ymm6 + vmaxpd {sae}, %ymm4, %ymm5, %ymm6 + vreducepd $123, {sae}, %ymm5, %ymm6 + vfmadd132pd {rn-sae}, %ymm4, %ymm5, %ymm6 + vrangepd $123, {sae}, %ymm4, %ymm5, %ymm6 + vfcmaddcph {rn-sae}, %ymm4, %ymm5, %ymm6 + vcvtdq2ph {rn-sae}, %ymm5, %xmm6 + vcvtdq2ps {rn-sae}, %ymm5, %ymm6 + vcvtpd2dq {rn-sae}, %ymm5, %xmm6 + vcvtpd2ph {rn-sae}, %ymm5, %xmm6 + vcvtpd2qq {rn-sae}, %ymm5, %ymm6 + vcvtph2dq {rn-sae}, %xmm5, %ymm6 + vcvtph2qq {rn-sae}, %xmm5, %ymm6 + vcvtph2pd {sae}, %xmm5, %ymm6 + vcvtph2ps {sae}, %xmm5, %ymm6 + vcvtph2uw {rn-sae}, %ymm5, %ymm6 + vcvtps2dq {rn-sae}, %ymm5, %ymm6 + vcvtps2pd {sae}, %xmm5, %ymm6 + vcvtps2phx {rn-sae}, %ymm5, %xmm6 + vcvtps2qq {rn-sae}, %xmm5, %ymm6 + vcvtqq2pd {rn-sae}, %ymm5, %ymm6 + vcvtqq2ph {rn-sae}, %ymm5, %xmm6 + vcvtqq2ps {rn-sae}, %ymm5, %xmm6 + vcvttpd2dq {sae}, %ymm5, %xmm6 + vcvttpd2qq {sae}, %ymm5, %ymm6 + vcvttph2dq {sae}, %xmm5, %ymm6 + vcvttph2qq {sae}, %xmm5, %ymm6 + vcvttph2uw {sae}, %ymm5, %ymm6 + vcvttps2dq {sae}, %ymm5, %ymm6 + vcvttps2qq {sae}, %xmm5, %ymm6 + vcvtuw2ph {rn-sae}, %ymm5, %ymm6 diff --git a/gas/testsuite/gas/i386/avx10_2-rounding.d b/gas/testsuite/gas/i386/avx10_2-rounding.d new file mode 100644 index 0000000..30d4624 --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-rounding.d @@ -0,0 +1,450 @@ +#objdump: -dw +#name: i386 AVX10.2 rounding insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 f1 d1 18 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm4,%ymm5,%k5 +\s*[a-f0-9]+:\s*62 f1 d1 1f c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\} +\s*[a-f0-9]+:\s*62 f2 f9 18 42 f5\s+vgetexppd \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 f9 1f 42 f5\s+vgetexppd \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 f9 9f 42 f5\s+vgetexppd \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f9 18 51 f5\s+vsqrtpd \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 f9 3f 51 f5\s+vsqrtpd \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 51 f5\s+vsqrtpd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 50 18 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm4,%ymm5,%k5 +\s*[a-f0-9]+:\s*62 f3 50 1f c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\} +\s*[a-f0-9]+:\s*62 f6 79 18 42 f5\s+vgetexpph \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 79 1f 42 f5\s+vgetexpph \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 79 9f 42 f5\s+vgetexpph \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 78 18 51 f5\s+vsqrtph \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 78 3f 51 f5\s+vsqrtph \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 78 ff 51 f5\s+vsqrtph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 50 18 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm4,%ymm5,%k5 +\s*[a-f0-9]+:\s*62 f1 50 1f c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm4,%ymm5,%k5\{%k7\} +\s*[a-f0-9]+:\s*62 f2 79 18 42 f5\s+vgetexpps \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 79 1f 42 f5\s+vgetexpps \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 79 9f 42 f5\s+vgetexpps \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 78 18 51 f5\s+vsqrtps \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 78 3f 51 f5\s+vsqrtps \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 78 ff 51 f5\s+vsqrtps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 d1 18 58 f4\s+vaddpd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 d1 3f 58 f4\s+vaddpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 58 f4\s+vaddpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 50 18 58 f4\s+vaddph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 50 3f 58 f4\s+vaddph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 50 ff 58 f4\s+vaddph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 50 18 58 f4\s+vaddps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 50 3f 58 f4\s+vaddps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 50 ff 58 f4\s+vaddps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5e f4\s+vdivpd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 d1 3f 5e f4\s+vdivpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 5e f4\s+vdivpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 50 18 5e f4\s+vdivph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 50 3f 5e f4\s+vdivph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 50 ff 5e f4\s+vdivph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 50 18 5e f4\s+vdivps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 50 3f 5e f4\s+vdivps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 50 ff 5e f4\s+vdivps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 d1 18 59 f4\s+vmulpd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 d1 3f 59 f4\s+vmulpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 59 f4\s+vmulpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 50 18 59 f4\s+vmulph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 50 3f 59 f4\s+vmulph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 50 ff 59 f4\s+vmulph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 50 18 59 f4\s+vmulps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 50 3f 59 f4\s+vmulps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 50 ff 59 f4\s+vmulps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 2c f4\s+vscalefpd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f 2c f4\s+vscalefpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 2c f4\s+vscalefpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 2c f4\s+vscalefph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f 2c f4\s+vscalefph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff 2c f4\s+vscalefph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 2c f4\s+vscalefps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f 2c f4\s+vscalefps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff 2c f4\s+vscalefps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5c f4\s+vsubpd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 d1 3f 5c f4\s+vsubpd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 d1 ff 5c f4\s+vsubpd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 50 18 5c f4\s+vsubph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 50 3f 5c f4\s+vsubph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 50 ff 5c f4\s+vsubph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 50 18 5c f4\s+vsubps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 50 3f 5c f4\s+vsubps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 50 ff 5c f4\s+vsubps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 d1 1f 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 d1 9f 5f f4\s+vmaxpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 50 18 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 50 1f 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 50 9f 5f f4\s+vmaxph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 50 18 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 50 1f 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 50 9f 5f f4\s+vmaxps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 d1 18 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 d1 1f 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 d1 9f 5d f4\s+vminpd \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 50 18 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 50 1f 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 50 9f 5d f4\s+vminph \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 50 18 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 50 1f 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 50 9f 5d f4\s+vminps \{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 f9 18 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 f9 1f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 f9 9f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 78 18 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 78 1f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 78 9f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 79 18 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 79 1f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 79 9f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 f9 18 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 f9 1f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 f9 9f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 78 18 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 78 1f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 78 9f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 79 18 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 79 1f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 79 9f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 f9 18 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 f9 1f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 f9 9f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 78 18 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 78 1f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 78 9f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 79 18 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 79 1f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 79 9f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 98 f4\s+vfmadd132pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f 98 f4\s+vfmadd132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 98 f4\s+vfmadd132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 98 f4\s+vfmadd132ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f 98 f4\s+vfmadd132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff 98 f4\s+vfmadd132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 98 f4\s+vfmadd132ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f 98 f4\s+vfmadd132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff 98 f4\s+vfmadd132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 a8 f4\s+vfmadd213pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f a8 f4\s+vfmadd213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff a8 f4\s+vfmadd213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 a8 f4\s+vfmadd213ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f a8 f4\s+vfmadd213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff a8 f4\s+vfmadd213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 a8 f4\s+vfmadd213ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f a8 f4\s+vfmadd213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff a8 f4\s+vfmadd213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 b8 f4\s+vfmadd231pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f b8 f4\s+vfmadd231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff b8 f4\s+vfmadd231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 b8 f4\s+vfmadd231ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f b8 f4\s+vfmadd231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff b8 f4\s+vfmadd231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 b8 f4\s+vfmadd231ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f b8 f4\s+vfmadd231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff b8 f4\s+vfmadd231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 96 f4\s+vfmaddsub132pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f 96 f4\s+vfmaddsub132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 96 f4\s+vfmaddsub132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 96 f4\s+vfmaddsub132ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f 96 f4\s+vfmaddsub132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff 96 f4\s+vfmaddsub132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 96 f4\s+vfmaddsub132ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f 96 f4\s+vfmaddsub132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff 96 f4\s+vfmaddsub132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 a6 f4\s+vfmaddsub213pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f a6 f4\s+vfmaddsub213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff a6 f4\s+vfmaddsub213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 a6 f4\s+vfmaddsub213ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f a6 f4\s+vfmaddsub213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff a6 f4\s+vfmaddsub213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 a6 f4\s+vfmaddsub213ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f a6 f4\s+vfmaddsub213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff a6 f4\s+vfmaddsub213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 b6 f4\s+vfmaddsub231pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f b6 f4\s+vfmaddsub231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff b6 f4\s+vfmaddsub231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 b6 f4\s+vfmaddsub231ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f b6 f4\s+vfmaddsub231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff b6 f4\s+vfmaddsub231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 b6 f4\s+vfmaddsub231ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f b6 f4\s+vfmaddsub231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff b6 f4\s+vfmaddsub231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 9a f4\s+vfmsub132pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f 9a f4\s+vfmsub132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 9a f4\s+vfmsub132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 9a f4\s+vfmsub132ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f 9a f4\s+vfmsub132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff 9a f4\s+vfmsub132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 9a f4\s+vfmsub132ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f 9a f4\s+vfmsub132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff 9a f4\s+vfmsub132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 aa f4\s+vfmsub213pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f aa f4\s+vfmsub213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff aa f4\s+vfmsub213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 aa f4\s+vfmsub213ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f aa f4\s+vfmsub213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff aa f4\s+vfmsub213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 aa f4\s+vfmsub213ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f aa f4\s+vfmsub213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff aa f4\s+vfmsub213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 ba f4\s+vfmsub231pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f ba f4\s+vfmsub231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff ba f4\s+vfmsub231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 ba f4\s+vfmsub231ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f ba f4\s+vfmsub231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff ba f4\s+vfmsub231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 ba f4\s+vfmsub231ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f ba f4\s+vfmsub231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff ba f4\s+vfmsub231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 97 f4\s+vfmsubadd132pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f 97 f4\s+vfmsubadd132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 97 f4\s+vfmsubadd132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 97 f4\s+vfmsubadd132ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f 97 f4\s+vfmsubadd132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff 97 f4\s+vfmsubadd132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 97 f4\s+vfmsubadd132ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f 97 f4\s+vfmsubadd132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff 97 f4\s+vfmsubadd132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 a7 f4\s+vfmsubadd213pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f a7 f4\s+vfmsubadd213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff a7 f4\s+vfmsubadd213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 a7 f4\s+vfmsubadd213ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f a7 f4\s+vfmsubadd213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff a7 f4\s+vfmsubadd213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 a7 f4\s+vfmsubadd213ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f a7 f4\s+vfmsubadd213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff a7 f4\s+vfmsubadd213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 b7 f4\s+vfmsubadd231pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f b7 f4\s+vfmsubadd231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff b7 f4\s+vfmsubadd231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 b7 f4\s+vfmsubadd231ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f b7 f4\s+vfmsubadd231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff b7 f4\s+vfmsubadd231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 b7 f4\s+vfmsubadd231ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f b7 f4\s+vfmsubadd231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff b7 f4\s+vfmsubadd231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 9c f4\s+vfnmadd132pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f 9c f4\s+vfnmadd132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 9c f4\s+vfnmadd132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 9c f4\s+vfnmadd132ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f 9c f4\s+vfnmadd132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff 9c f4\s+vfnmadd132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 9c f4\s+vfnmadd132ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f 9c f4\s+vfnmadd132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff 9c f4\s+vfnmadd132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 ac f4\s+vfnmadd213pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f ac f4\s+vfnmadd213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff ac f4\s+vfnmadd213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 ac f4\s+vfnmadd213ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f ac f4\s+vfnmadd213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff ac f4\s+vfnmadd213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 ac f4\s+vfnmadd213ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f ac f4\s+vfnmadd213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff ac f4\s+vfnmadd213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 bc f4\s+vfnmadd231pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f bc f4\s+vfnmadd231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff bc f4\s+vfnmadd231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 bc f4\s+vfnmadd231ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f bc f4\s+vfnmadd231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff bc f4\s+vfnmadd231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 bc f4\s+vfnmadd231ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f bc f4\s+vfnmadd231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff bc f4\s+vfnmadd231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 9e f4\s+vfnmsub132pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f 9e f4\s+vfnmsub132pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff 9e f4\s+vfnmsub132pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 9e f4\s+vfnmsub132ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f 9e f4\s+vfnmsub132ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff 9e f4\s+vfnmsub132ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 9e f4\s+vfnmsub132ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f 9e f4\s+vfnmsub132ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff 9e f4\s+vfnmsub132ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 ae f4\s+vfnmsub213pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f ae f4\s+vfnmsub213pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff ae f4\s+vfnmsub213pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 ae f4\s+vfnmsub213ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f ae f4\s+vfnmsub213ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff ae f4\s+vfnmsub213ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 ae f4\s+vfnmsub213ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f ae f4\s+vfnmsub213ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff ae f4\s+vfnmsub213ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 d1 18 be f4\s+vfnmsub231pd \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 d1 3f be f4\s+vfnmsub231pd \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 d1 ff be f4\s+vfnmsub231pd \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 51 18 be f4\s+vfnmsub231ph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 51 3f be f4\s+vfnmsub231ph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 51 ff be f4\s+vfnmsub231ph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 51 18 be f4\s+vfnmsub231ps \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 51 3f be f4\s+vfnmsub231ps \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 51 ff be f4\s+vfnmsub231ps \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 d1 18 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 d1 1f 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 d1 9f 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 51 18 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 51 1f 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 51 9f 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 d1 18 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 d1 1f 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 d1 9f 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f3 51 18 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f3 51 1f 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f3 51 9f 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 53 18 56 f4\s+vfcmaddcph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 53 3f 56 f4\s+vfcmaddcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 53 ff 56 f4\s+vfcmaddcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 53 18 d6 f4\s+vfcmulcph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 53 3f d6 f4\s+vfcmulcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 53 ff d6 f4\s+vfcmulcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 52 18 56 f4\s+vfmaddcph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 52 3f 56 f4\s+vfmaddcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 52 ff 56 f4\s+vfmaddcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 52 18 d6 f4\s+vfmulcph \{rn-sae\},%ymm4,%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 52 3f d6 f4\s+vfmulcph \{rd-sae\},%ymm4,%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 52 ff d6 f4\s+vfmulcph \{rz-sae\},%ymm4,%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 78 18 5b f5\s+vcvtdq2ph \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 78 3f 5b f5\s+vcvtdq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 78 ff 5b f5\s+vcvtdq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 78 18 5b f5\s+vcvtdq2ps \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 78 3f 5b f5\s+vcvtdq2ps \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 78 ff 5b f5\s+vcvtdq2ps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 7b 18 7a f5\s+vcvtudq2ph \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 7b 3f 7a f5\s+vcvtudq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 7b ff 7a f5\s+vcvtudq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 7b 18 7a f5\s+vcvtudq2ps \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 7b 3f 7a f5\s+vcvtudq2ps \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 7b ff 7a f5\s+vcvtudq2ps \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 fb 18 e6 f5\s+vcvtpd2dq \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 fb 3f e6 f5\s+vcvtpd2dq \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 fb ff e6 f5\s+vcvtpd2dq \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 f9 18 5a f5\s+vcvtpd2ph \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 f9 3f 5a f5\s+vcvtpd2ph \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 f9 ff 5a f5\s+vcvtpd2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f9 18 5a f5\s+vcvtpd2ps \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 f9 3f 5a f5\s+vcvtpd2ps \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 5a f5\s+vcvtpd2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f8 18 79 f5\s+vcvtpd2udq \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 f8 3f 79 f5\s+vcvtpd2udq \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f8 ff 79 f5\s+vcvtpd2udq \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f9 18 7b f5\s+vcvtpd2qq \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 f9 3f 7b f5\s+vcvtpd2qq \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 7b f5\s+vcvtpd2qq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f9 18 79 f5\s+vcvtpd2uqq \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 f9 3f 79 f5\s+vcvtpd2uqq \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f9 ff 79 f5\s+vcvtpd2uqq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 5b f5\s+vcvtph2dq \{rn-sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 79 3f 5b f5\s+vcvtph2dq \{rd-sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 ff 5b f5\s+vcvtph2dq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 7b f5\s+vcvtph2qq \{rn-sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 79 3f 7b f5\s+vcvtph2qq \{rd-sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 ff 7b f5\s+vcvtph2qq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 78 18 79 f5\s+vcvtph2udq \{rn-sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 78 3f 79 f5\s+vcvtph2udq \{rd-sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 78 ff 79 f5\s+vcvtph2udq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 79 f5\s+vcvtph2uqq \{rn-sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 79 3f 79 f5\s+vcvtph2uqq \{rd-sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 ff 79 f5\s+vcvtph2uqq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 78 18 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 78 1f 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 78 9f 5a f5\s+vcvtph2pd \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f2 79 18 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f2 79 1f 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f2 79 9f 13 f5\s+vcvtph2ps \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f6 79 18 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f6 79 1f 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f6 79 9f 13 f5\s+vcvtph2psx \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 78 18 7d f5\s+vcvtph2uw \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 78 3f 7d f5\s+vcvtph2uw \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 78 ff 7d f5\s+vcvtph2uw \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 7d f5\s+vcvtph2w \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 79 3f 7d f5\s+vcvtph2w \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 ff 7d f5\s+vcvtph2w \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 79 18 5b f5\s+vcvtps2dq \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 79 3f 5b f5\s+vcvtps2dq \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 79 ff 5b f5\s+vcvtps2dq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 78 18 79 f5\s+vcvtps2udq \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 78 3f 79 f5\s+vcvtps2udq \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 78 ff 79 f5\s+vcvtps2udq \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 78 18 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 78 1f 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 78 9f 5a f5\s+vcvtps2pd \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 1d f5\s+vcvtps2phx \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 79 3f 1d f5\s+vcvtps2phx \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 ff 1d f5\s+vcvtps2phx \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 79 18 7b f5\s+vcvtps2qq \{rn-sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 79 3f 7b f5\s+vcvtps2qq \{rd-sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 79 ff 7b f5\s+vcvtps2qq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 79 18 79 f5\s+vcvtps2uqq \{rn-sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 79 3f 79 f5\s+vcvtps2uqq \{rd-sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 79 ff 79 f5\s+vcvtps2uqq \{rz-sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 fa 18 e6 f5\s+vcvtqq2pd \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 fa 3f e6 f5\s+vcvtqq2pd \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 fa ff e6 f5\s+vcvtqq2pd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 f8 18 5b f5\s+vcvtqq2ph \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 f8 3f 5b f5\s+vcvtqq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 f8 ff 5b f5\s+vcvtqq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f8 18 5b f5\s+vcvtqq2ps \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 f8 3f 5b f5\s+vcvtqq2ps \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f8 ff 5b f5\s+vcvtqq2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 fa 18 7a f5\s+vcvtuqq2pd \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 fa 3f 7a f5\s+vcvtuqq2pd \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 fa ff 7a f5\s+vcvtuqq2pd \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 fb 18 7a f5\s+vcvtuqq2ph \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f5 fb 3f 7a f5\s+vcvtuqq2ph \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 fb ff 7a f5\s+vcvtuqq2ph \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 fb 18 7a f5\s+vcvtuqq2ps \{rn-sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 fb 3f 7a f5\s+vcvtuqq2ps \{rd-sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 fb ff 7a f5\s+vcvtuqq2ps \{rz-sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f9 18 e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 f9 1f e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f9 9f e6 f5\s+vcvttpd2dq \{sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f8 18 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6 +\s*[a-f0-9]+:\s*62 f1 f8 1f 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f8 9f 78 f5\s+vcvttpd2udq \{sae\},%ymm5,%xmm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f9 18 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 f9 1f 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f9 9f 7a f5\s+vcvttpd2qq \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 f9 18 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 f9 1f 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 f9 9f 78 f5\s+vcvttpd2uqq \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 7a 18 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 7a 1f 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 7a 9f 5b f5\s+vcvttph2dq \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 79 1f 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 9f 7a f5\s+vcvttph2qq \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 78 18 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 78 1f 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 78 9f 78 f5\s+vcvttph2udq \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 79 1f 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 9f 78 f5\s+vcvttph2uqq \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 78 18 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 78 1f 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 78 9f 7c f5\s+vcvttph2uw \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 79 18 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 79 1f 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 79 9f 7c f5\s+vcvttph2w \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 7a 18 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 7a 1f 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 7a 9f 5b f5\s+vcvttps2dq \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 78 18 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 78 1f 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 78 9f 78 f5\s+vcvttps2udq \{sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 79 18 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 79 1f 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 79 9f 7a f5\s+vcvttps2qq \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f1 79 18 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6 +\s*[a-f0-9]+:\s*62 f1 79 1f 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f1 79 9f 78 f5\s+vcvttps2uqq \{sae\},%xmm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 7b 18 7d f5\s+vcvtuw2ph \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 7b 3f 7d f5\s+vcvtuw2ph \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 7b ff 7d f5\s+vcvtuw2ph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 f5 7a 18 7d f5\s+vcvtw2ph \{rn-sae\},%ymm5,%ymm6 +\s*[a-f0-9]+:\s*62 f5 7a 3f 7d f5\s+vcvtw2ph \{rd-sae\},%ymm5,%ymm6\{%k7\} +\s*[a-f0-9]+:\s*62 f5 7a ff 7d f5\s+vcvtw2ph \{rz-sae\},%ymm5,%ymm6\{%k7\}\{z\} +#pass diff --git a/gas/testsuite/gas/i386/avx10_2-rounding.s b/gas/testsuite/gas/i386/avx10_2-rounding.s new file mode 100644 index 0000000..cb0a6b9 --- /dev/null +++ b/gas/testsuite/gas/i386/avx10_2-rounding.s @@ -0,0 +1,350 @@ +# Check 32bit AVX10.2 instructions + + .text +_start: + .irp m, pd, ph, ps + vcmp\m $123, {sae}, %ymm4, %ymm5, %k5 + vcmp\m $123, {sae}, %ymm4, %ymm5, %k5{%k7} + vgetexp\m {sae}, %ymm5, %ymm6 + vgetexp\m {sae}, %ymm5, %ymm6{%k7} + vgetexp\m {sae}, %ymm5, %ymm6{%k7}{z} + vsqrt\m {rn-sae}, %ymm5, %ymm6 + vsqrt\m {rd-sae}, %ymm5, %ymm6{%k7} + vsqrt\m {rz-sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .irp a, add, div, mul, scalef, sub + .irp m, pd, ph, ps + v\a\m {rn-sae}, %ymm4, %ymm5, %ymm6 + v\a\m {rd-sae}, %ymm4, %ymm5, %ymm6{%k7} + v\a\m {rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z} + .endr + .endr + + .irp a, max, min + .irp m, pd, ph, ps + v\a\m {sae}, %ymm4, %ymm5, %ymm6 + v\a\m {sae}, %ymm4, %ymm5, %ymm6{%k7} + v\a\m {sae}, %ymm4, %ymm5, %ymm6{%k7}{z} + .endr + .endr + + .irp a, getmant, reduce, rndscale + .irp m, pd, ph, ps + v\a\m $123, {sae}, %ymm5, %ymm6 + v\a\m $123, {sae}, %ymm5, %ymm6{%k7} + v\a\m $123, {sae}, %ymm5, %ymm6{%k7}{z} + .endr + .endr + + .irp a, madd, maddsub, msub, msubadd, nmadd, nmsub + .irp n, 132, 213, 231 + .irp m, pd, ph, ps + vf\a\n\m {rn-sae}, %ymm4, %ymm5, %ymm6 + vf\a\n\m {rd-sae}, %ymm4, %ymm5, %ymm6{%k7} + vf\a\n\m {rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z} + .endr + .endr + .endr + + .irp a, fixupimm, range + .irp m, pd, ps + v\a\m $123, {sae}, %ymm4, %ymm5, %ymm6 + v\a\m $123, {sae}, %ymm4, %ymm5, %ymm6{%k7} + v\a\m $123, {sae}, %ymm4, %ymm5, %ymm6{%k7}{z} + .endr + .endr + + .irp a, cmadd, cmul, madd, mul + vf\a\()cph {rn-sae}, %ymm4, %ymm5, %ymm6 + vf\a\()cph {rd-sae}, %ymm4, %ymm5, %ymm6{%k7} + vf\a\()cph {rz-sae}, %ymm4, %ymm5, %ymm6{%k7}{z} + .endr + + .irp n, dq, udq + vcvt\n\()2ph {rn-sae}, %ymm5, %xmm6 + vcvt\n\()2ph {rd-sae}, %ymm5, %xmm6{%k7} + vcvt\n\()2ph {rz-sae}, %ymm5, %xmm6{%k7}{z} + + vcvt\n\()2ps {rn-sae}, %ymm5, %ymm6 + vcvt\n\()2ps {rd-sae}, %ymm5, %ymm6{%k7} + vcvt\n\()2ps {rz-sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .irp m, dq, ph, ps, udq + vcvtpd2\m {rn-sae}, %ymm5, %xmm6 + vcvtpd2\m {rd-sae}, %ymm5, %xmm6{%k7} + vcvtpd2\m {rz-sae}, %ymm5, %xmm6{%k7}{z} + .endr + + .irp m, qq, uqq + vcvtpd2\m {rn-sae}, %ymm5, %ymm6 + vcvtpd2\m {rd-sae}, %ymm5, %ymm6{%k7} + vcvtpd2\m {rz-sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .irp m, dq, qq, udq, uqq + vcvtph2\m {rn-sae}, %xmm5, %ymm6 + vcvtph2\m {rd-sae}, %xmm5, %ymm6{%k7} + vcvtph2\m {rz-sae}, %xmm5, %ymm6{%k7}{z} + .endr + + .irp m, pd, ps, psx + vcvtph2\m {sae}, %xmm5, %ymm6 + vcvtph2\m {sae}, %xmm5, %ymm6{%k7} + vcvtph2\m {sae}, %xmm5, %ymm6{%k7}{z} + .endr + + .irp m, uw, w + vcvtph2\m {rn-sae}, %ymm5, %ymm6 + vcvtph2\m {rd-sae}, %ymm5, %ymm6{%k7} + vcvtph2\m {rz-sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .irp m, dq, udq + vcvtps2\m {rn-sae}, %ymm5, %ymm6 + vcvtps2\m {rd-sae}, %ymm5, %ymm6{%k7} + vcvtps2\m {rz-sae}, %ymm5, %ymm6{%k7}{z} + .endr + + vcvtps2pd {sae}, %xmm5, %ymm6 + vcvtps2pd {sae}, %xmm5, %ymm6{%k7} + vcvtps2pd {sae}, %xmm5, %ymm6{%k7}{z} + + vcvtps2phx {rn-sae}, %ymm5, %xmm6 + vcvtps2phx {rd-sae}, %ymm5, %xmm6{%k7} + vcvtps2phx {rz-sae}, %ymm5, %xmm6{%k7}{z} + + .irp m, qq, uqq + vcvtps2\m {rn-sae}, %xmm5, %ymm6 + vcvtps2\m {rd-sae}, %xmm5, %ymm6{%k7} + vcvtps2\m {rz-sae}, %xmm5, %ymm6{%k7}{z} + .endr + + .irp n, qq, uqq + vcvt\n\()2pd {rn-sae}, %ymm5, %ymm6 + vcvt\n\()2pd {rd-sae}, %ymm5, %ymm6{%k7} + vcvt\n\()2pd {rz-sae}, %ymm5, %ymm6{%k7}{z} + + .irp m, ph, ps + vcvt\n\()2\m {rn-sae}, %ymm5, %xmm6 + vcvt\n\()2\m {rd-sae}, %ymm5, %xmm6{%k7} + vcvt\n\()2\m {rz-sae}, %ymm5, %xmm6{%k7}{z} + .endr + .endr + + .irp m, dq, udq + vcvttpd2\m {sae}, %ymm5, %xmm6 + vcvttpd2\m {sae}, %ymm5, %xmm6{%k7} + vcvttpd2\m {sae}, %ymm5, %xmm6{%k7}{z} + .endr + + .irp m, qq, uqq + vcvttpd2\m {sae}, %ymm5, %ymm6 + vcvttpd2\m {sae}, %ymm5, %ymm6{%k7} + vcvttpd2\m {sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .irp m, dq, qq, udq, uqq + vcvttph2\m {sae}, %xmm5, %ymm6 + vcvttph2\m {sae}, %xmm5, %ymm6{%k7} + vcvttph2\m {sae}, %xmm5, %ymm6{%k7}{z} + .endr + + .irp m, uw, w + vcvttph2\m {sae}, %ymm5, %ymm6 + vcvttph2\m {sae}, %ymm5, %ymm6{%k7} + vcvttph2\m {sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .irp m, dq, udq + vcvttps2\m {sae}, %ymm5, %ymm6 + vcvttps2\m {sae}, %ymm5, %ymm6{%k7} + vcvttps2\m {sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .irp m, qq, uqq + vcvttps2\m {sae}, %xmm5, %ymm6 + vcvttps2\m {sae}, %xmm5, %ymm6{%k7} + vcvttps2\m {sae}, %xmm5, %ymm6{%k7}{z} + .endr + + .irp n, uw, w + vcvt\n\()2ph {rn-sae}, %ymm5, %ymm6 + vcvt\n\()2ph {rd-sae}, %ymm5, %ymm6{%k7} + vcvt\n\()2ph {rz-sae}, %ymm5, %ymm6{%k7}{z} + .endr + + .intel_syntax noprefix + .irp m, pd, ph, ps + vcmp\m k5, ymm5, ymm4{sae}, 123 + vcmp\m k5{k7}, ymm5, ymm4{sae}, 123 + vgetexp\m ymm6, ymm5{sae} + vgetexp\m ymm6{k7}, ymm5{sae} + vgetexp\m ymm6{k7}{z}, ymm5{sae} + vsqrt\m ymm6, ymm5{rn-sae} + vsqrt\m ymm6{k7}, ymm5{rd-sae} + vsqrt\m ymm6{k7}{z}, ymm5{rz-sae} + .endr + + .irp a, add, div, mul, scalef, sub + .irp m, pd, ph, ps + v\a\m ymm6, ymm5, ymm4{rn-sae} + v\a\m ymm6{k7}, ymm5, ymm4{rd-sae} + v\a\m ymm6{k7}{z}, ymm5, ymm4{rz-sae} + .endr + .endr + + .irp a, max, min + .irp m, pd, ph, ps + v\a\m ymm6, ymm5, ymm4{sae} + v\a\m ymm6{k7}, ymm5, ymm4{sae} + v\a\m ymm6{k7}{z}, ymm5, ymm4{sae} + .endr + .endr + + .irp a, getmant, reduce, rndscale + .irp m, pd, ph, ps + v\a\m ymm6, ymm5{sae}, 123 + v\a\m ymm6{k7}, ymm5{sae}, 123 + v\a\m ymm6{k7}{z}, ymm5{sae}, 123 + .endr + .endr + + .irp a, madd, maddsub, msub, msubadd, nmadd, nmsub + .irp n, 132, 213, 231 + .irp m, pd, ph, ps + vf\a\n\m ymm6, ymm5, ymm4{rn-sae} + vf\a\n\m ymm6{k7}, ymm5, ymm4{rd-sae} + vf\a\n\m ymm6{k7}{z}, ymm5, ymm4{rz-sae} + .endr + .endr + .endr + + .irp a, fixupimm, range + .irp m, pd, ps + v\a\m ymm6, ymm5, ymm4{sae}, 123 + v\a\m ymm6{k7}, ymm5, ymm4{sae}, 123 + v\a\m ymm6{k7}{z}, ymm5, ymm4{sae}, 123 + .endr + .endr + + .irp a, cmadd, cmul, madd, mul + vf\a\()cph ymm6, ymm5, ymm4{rn-sae} + vf\a\()cph ymm6{k7}, ymm5, ymm4{rd-sae} + vf\a\()cph ymm6{k7}{z}, ymm5, ymm4{rz-sae} + .endr + + .irp n, dq, udq + vcvt\n\()2ph xmm6, ymm5{rn-sae} + vcvt\n\()2ph xmm6{k7}, ymm5{rd-sae} + vcvt\n\()2ph xmm6{k7}{z}, ymm5{rz-sae} + + vcvt\n\()2ps ymm6, ymm5{rn-sae} + vcvt\n\()2ps ymm6{k7}, ymm5{rd-sae} + vcvt\n\()2ps ymm6{k7}{z}, ymm5{rz-sae} + .endr + + .irp m, dq, ph, ps, udq + vcvtpd2\m xmm6, ymm5{rn-sae} + vcvtpd2\m xmm6{k7}, ymm5{rd-sae} + vcvtpd2\m xmm6{k7}{z}, ymm5{rz-sae} + .endr + + .irp m, qq, uqq + vcvtpd2\m ymm6, ymm5{rn-sae} + vcvtpd2\m ymm6{k7}, ymm5{rd-sae} + vcvtpd2\m ymm6{k7}{z}, ymm5{rz-sae} + .endr + + .irp m, dq, qq, udq, uqq + vcvtph2\m ymm6, xmm5{rn-sae} + vcvtph2\m ymm6{k7}, xmm5{rd-sae} + vcvtph2\m ymm6{k7}{z}, xmm5{rz-sae} + .endr + + .irp m, pd, ps, psx + vcvtph2\m ymm6, xmm5{sae} + vcvtph2\m ymm6{k7}, xmm5{sae} + vcvtph2\m ymm6{k7}{z}, xmm5{sae} + .endr + + .irp m, uw, w + vcvtph2\m ymm6, ymm5{rn-sae} + vcvtph2\m ymm6{k7}, ymm5{rd-sae} + vcvtph2\m ymm6{k7}{z}, ymm5{rz-sae} + .endr + + .irp m, dq, udq + vcvtps2\m ymm6, ymm5{rn-sae} + vcvtps2\m ymm6{k7}, ymm5{rd-sae} + vcvtps2\m ymm6{k7}{z}, ymm5{rz-sae} + .endr + + vcvtps2pd ymm6, xmm5{sae} + vcvtps2pd ymm6{k7}, xmm5{sae} + vcvtps2pd ymm6{k7}{z}, xmm5{sae} + + vcvtps2phx xmm6, ymm5{rn-sae} + vcvtps2phx xmm6{k7}, ymm5{rd-sae} + vcvtps2phx xmm6{k7}{z}, ymm5{rz-sae} + + .irp m, qq, uqq + vcvtps2\m ymm6, xmm5{rn-sae} + vcvtps2\m ymm6{k7}, xmm5{rd-sae} + vcvtps2\m ymm6{k7}{z}, xmm5{rz-sae} + .endr + + .irp n, qq, uqq + vcvt\n\()2pd ymm6, ymm5{rn-sae} + vcvt\n\()2pd ymm6{k7}, ymm5{rd-sae} + vcvt\n\()2pd ymm6{k7}{z}, ymm5{rz-sae} + + .irp m, ph, ps + vcvt\n\()2\m xmm6, ymm5{rn-sae} + vcvt\n\()2\m xmm6{k7}, ymm5{rd-sae} + vcvt\n\()2\m xmm6{k7}{z}, ymm5{rz-sae} + .endr + .endr + + .irp m, dq, udq + vcvttpd2\m xmm6, ymm5{sae} + vcvttpd2\m xmm6{k7}, ymm5{sae} + vcvttpd2\m xmm6{k7}{z}, ymm5{sae} + .endr + + .irp m, qq, uqq + vcvttpd2\m ymm6, ymm5{sae} + vcvttpd2\m ymm6{k7}, ymm5{sae} + vcvttpd2\m ymm6{k7}{z}, ymm5{sae} + .endr + + .irp m, dq, qq, udq, uqq + vcvttph2\m ymm6, xmm5{sae} + vcvttph2\m ymm6{k7}, xmm5{sae} + vcvttph2\m ymm6{k7}{z}, xmm5{sae} + .endr + + .irp m, uw, w + vcvttph2\m ymm6, ymm5{sae} + vcvttph2\m ymm6{k7}, ymm5{sae} + vcvttph2\m ymm6{k7}{z}, ymm5{sae} + .endr + + .irp m, dq, udq + vcvttps2\m ymm6, ymm5{sae} + vcvttps2\m ymm6{k7}, ymm5{sae} + vcvttps2\m ymm6{k7}{z}, ymm5{sae} + .endr + + .irp m, qq, uqq + vcvttps2\m ymm6, xmm5{sae} + vcvttps2\m ymm6{k7}, xmm5{sae} + vcvttps2\m ymm6{k7}{z}, xmm5{sae} + .endr + + .irp n, uw, w + vcvt\n\()2ph ymm6, ymm5{rn-sae} + vcvt\n\()2ph ymm6{k7}, ymm5{rd-sae} + vcvt\n\()2ph ymm6{k7}{z}, ymm5{rz-sae} + .endr diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 3e707b3..75ad061 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -519,6 +519,9 @@ if [gas_32_check] then { run_list_test "pbndkb-inval" run_list_test "user_msr-inval" run_list_test "apx-push2pop2-inval" + run_dump_test "avx10_2-rounding" + run_dump_test "avx10_2-rounding-intel" + run_list_test "avx10_2-rounding-inval" run_list_test "sg" run_dump_test "clzero" run_dump_test "invlpgb" diff --git a/gas/testsuite/gas/i386/inval-tls.l b/gas/testsuite/gas/i386/inval-tls.l index 59e7c30..98f7a29 100644 --- a/gas/testsuite/gas/i386/inval-tls.l +++ b/gas/testsuite/gas/i386/inval-tls.l @@ -1,3 +1,2 @@ .*: Assembler messages: -.*:3: Error: .* `kmovd' -.*:4: Error: .* `kmovd' +.*:3: Error: @GOTNTPOFF operator cannot be used with `kmovd' diff --git a/gas/testsuite/gas/i386/inval-tls.s b/gas/testsuite/gas/i386/inval-tls.s index 3fe85c3..ba0e1b8 100644 --- a/gas/testsuite/gas/i386/inval-tls.s +++ b/gas/testsuite/gas/i386/inval-tls.s @@ -1,4 +1,3 @@ .text # All the following should be illegal kmovd foo@gotntpoff(%eax), %k0 - kmovd foo@tpoff(%eax), %k0 diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d index 7c2efb0..667e6f2 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d @@ -34,9 +34,12 @@ Disassembly of section .text: [ ]*[a-f0-9]+:[ ]+04 08[ ]+.* [ ]*[a-f0-9]+:[ ]+62 f4 3c 08 8f[ ]+\(bad\) [ ]*[a-f0-9]+:[ ]+c7[ ]+.* -[ ]*[a-f0-9]+:[ ]+62 74 7c 18 8f c0[ ]+pop2 %rax,\(bad\) +[ ]*[a-f0-9]+:[ ]+62 f4 7c 18 8f c0[ ]+pop2 %rax,\(bad\) [ ]*[a-f0-9]+:[ ]+62 d4 24 18 8f[ ]+\(bad\) [ ]*[a-f0-9]+:[ ]+c3[ ]+.* +[ ]*[a-f0-9]+:[ ]+62 f4 5c 18 8f[ ]+\(bad\) +[ ]*[a-f0-9]+:[ ]+c3[ ]+.* +[ ]*[a-f0-9]+:[ ]+62 f4 7c 18 8f c4[ ]+pop2 %rsp,\(bad\) [ ]*[a-f0-9]+:[ ]+62 fc 7d 0c 60 c7[ ]+movbe \{bad-nf\},%r23w,%ax [ ]*[a-f0-9]+:[ ]+62 fc 79 08 60[ ]+\(bad\) [ ]*[a-f0-9]+:[ ]+c7[ ]+.* diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s index 959e4e1..7b2df4b 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s @@ -44,11 +44,17 @@ _start: # pop2 %rdi, %r8 set EVEX.ND=0. .byte 0x62, 0xf4, 0x3c, 0x08, 0x8f, 0xc7 - # pop2 %rax, %r8 set EVEX.vvvv = 1111. - .insn EVEX.L0.M4.W0 0x8f, %rax, {rn-sae},%r8 + # pop2 %rax, %rax + .insn EVEX.L0.NP.M4.W0 0x8f/0, %rax, {sae}, %rax # pop2 %r11, %r11 - .insn EVEX.L0.NP.M4.W0 0x8f/0, {sae}, %xmm11, %xmm11 + .insn EVEX.L0.NP.M4.W0 0x8f/0, %r11, {sae}, %r11 + + # pop2 %rbx, %rsp + .insn EVEX.L0.NP.M4.W0 0x8f/0, %rbx, {sae}, %rsp + + # pop2 %rsp, %rax + .insn EVEX.L0.NP.M4.W0 0x8f/0, %rsp, {sae}, %rax #EVEX_MAP4 movbe %r18w,%ax set EVEX.nf = 1. .insn EVEX.L0.66.M12.W0 0x60, %di, %ax {%k4} diff --git a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d index 7932b0e..0036ccc 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d +++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d @@ -134,6 +134,16 @@ Disassembly of section .text: \s*[a-f0-9]+:\s*0f 4c d1 cmovl %ecx,%edx \s*[a-f0-9]+:\s*0f 4f d1 cmovg %ecx,%edx \s*[a-f0-9]+:\s*0f 4e d1 cmovle %ecx,%edx +\s*[a-f0-9]+:\s*0f 40 ca cmovo %edx,%ecx +\s*[a-f0-9]+:\s*0f 40 ca cmovo %edx,%ecx +\s*[a-f0-9]+:\s*49 0f 42 ca cmovb %r10,%rcx +\s*[a-f0-9]+:\s*49 0f 42 ca cmovb %r10,%rcx +\s*[a-f0-9]+:\s*44 0f 44 ca cmove %edx,%r9d +\s*[a-f0-9]+:\s*44 0f 44 ca cmove %edx,%r9d +\s*[a-f0-9]+:\s*d5 90 4a ca cmovp %r18d,%ecx +\s*[a-f0-9]+:\s*d5 90 4a ca cmovp %r18d,%ecx +\s*[a-f0-9]+:\s*d5 c8 4f ca cmovg %rdx,%r17 +\s*[a-f0-9]+:\s*d5 c8 4f ca cmovg %rdx,%r17 \s*[a-f0-9]+:\s*62 f4 7d 08 60 c0 movbe %ax,%ax \s*[a-f0-9]+:\s*49 0f c8 bswap %r8 \s*[a-f0-9]+:\s*d5 98 c8 bswap %r16 diff --git a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s index 7a2766a..aa7a9f8 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s +++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s @@ -128,6 +128,16 @@ cmovnge %edx,%ecx,%edx cmovnl %edx,%ecx,%edx cmovng %edx,%ecx,%edx cmovnle %edx,%ecx,%edx +cfcmovo %edx,%ecx,%ecx +cfcmovno %ecx,%edx,%ecx +cfcmovc %r10,%rcx,%rcx +cfcmovnc %rcx,%r10,%rcx +cfcmove %edx,%r9d,%r9d +cfcmovne %r9d,%edx,%r9d +cfcmovp %r18d,%ecx,%ecx +cfcmovnp %ecx,%r18d,%ecx +cfcmovg %rdx,%r17,%r17 +cfcmovng %r17,%rdx,%r17 movbe %ax,%ax movbe %r8,%r8 movbe %r16,%r16 diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d new file mode 100644 index 0000000..d5e17c2 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d @@ -0,0 +1,452 @@ +#objdump: -dw -Mintel +#name: x86_64 AVX10.2 rounding insns (Intel disassembly) +#source: x86-64-avx10_2-rounding.s + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +#... +\s*a83:\s*62 91 91 10 c2 ec 7b\s+vcmppd k5,ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 91 91 17 c2 ec 7b\s+vcmppd k5\{k7\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 02 f9 18 42 f5\s+vgetexppd ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 02 f9 1f 42 f5\s+vgetexppd ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 02 f9 9f 42 f5\s+vgetexppd ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 18 51 f5\s+vsqrtpd ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 f9 3f 51 f5\s+vsqrtpd ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 f9 ff 51 f5\s+vsqrtpd ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 93 10 10 c2 ec 7b\s+vcmpph k5,ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 93 10 17 c2 ec 7b\s+vcmpph k5\{k7\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 06 79 18 42 f5\s+vgetexpph ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 06 79 1f 42 f5\s+vgetexpph ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 06 79 9f 42 f5\s+vgetexpph ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 18 51 f5\s+vsqrtph ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 78 3f 51 f5\s+vsqrtph ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 78 ff 51 f5\s+vsqrtph ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 91 10 10 c2 ec 7b\s+vcmpps k5,ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 91 10 17 c2 ec 7b\s+vcmpps k5\{k7\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 02 79 18 42 f5\s+vgetexpps ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 02 79 1f 42 f5\s+vgetexpps ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 02 79 9f 42 f5\s+vgetexpps ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 78 18 51 f5\s+vsqrtps ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 78 3f 51 f5\s+vsqrtps ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 78 ff 51 f5\s+vsqrtps ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 91 10 58 f4\s+vaddpd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 91 37 58 f4\s+vaddpd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 91 f7 58 f4\s+vaddpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 10 10 58 f4\s+vaddph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 10 37 58 f4\s+vaddph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 10 f7 58 f4\s+vaddph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 10 10 58 f4\s+vaddps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 10 37 58 f4\s+vaddps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 10 f7 58 f4\s+vaddps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 91 10 5e f4\s+vdivpd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 91 37 5e f4\s+vdivpd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 91 f7 5e f4\s+vdivpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 10 10 5e f4\s+vdivph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 10 37 5e f4\s+vdivph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 10 f7 5e f4\s+vdivph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 10 10 5e f4\s+vdivps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 10 37 5e f4\s+vdivps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 10 f7 5e f4\s+vdivps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 91 10 59 f4\s+vmulpd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 91 37 59 f4\s+vmulpd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 91 f7 59 f4\s+vmulpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 10 10 59 f4\s+vmulph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 10 37 59 f4\s+vmulph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 10 f7 59 f4\s+vmulph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 10 10 59 f4\s+vmulps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 10 37 59 f4\s+vmulps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 10 f7 59 f4\s+vmulps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 2c f4\s+vscalefpd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 2c f4\s+vscalefpd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 2c f4\s+vscalefpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 2c f4\s+vscalefph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 2c f4\s+vscalefph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 2c f4\s+vscalefph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 2c f4\s+vscalefps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 2c f4\s+vscalefps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 2c f4\s+vscalefps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 91 10 5c f4\s+vsubpd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 91 37 5c f4\s+vsubpd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 91 f7 5c f4\s+vsubpd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 10 10 5c f4\s+vsubph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 10 37 5c f4\s+vsubph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 10 f7 5c f4\s+vsubph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 10 10 5c f4\s+vsubps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 10 37 5c f4\s+vsubps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 10 f7 5c f4\s+vsubps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 91 10 5f f4\s+vmaxpd ymm30,ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 91 17 5f f4\s+vmaxpd ymm30\{k7\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 91 97 5f f4\s+vmaxpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 05 10 10 5f f4\s+vmaxph ymm30,ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 05 10 17 5f f4\s+vmaxph ymm30\{k7\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 05 10 97 5f f4\s+vmaxph ymm30\{k7\}\{z\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 10 10 5f f4\s+vmaxps ymm30,ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 10 17 5f f4\s+vmaxps ymm30\{k7\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 10 97 5f f4\s+vmaxps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 91 10 5d f4\s+vminpd ymm30,ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 91 17 5d f4\s+vminpd ymm30\{k7\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 91 97 5d f4\s+vminpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 05 10 10 5d f4\s+vminph ymm30,ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 05 10 17 5d f4\s+vminph ymm30\{k7\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 05 10 97 5d f4\s+vminph ymm30\{k7\}\{z\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 10 10 5d f4\s+vminps ymm30,ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 10 17 5d f4\s+vminps ymm30\{k7\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 01 10 97 5d f4\s+vminps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\} +\s*[a-f0-9]+:\s*62 03 f9 18 26 f5 7b\s+vgetmantpd ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 1f 26 f5 7b\s+vgetmantpd ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 9f 26 f5 7b\s+vgetmantpd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 18 26 f5 7b\s+vgetmantph ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 1f 26 f5 7b\s+vgetmantph ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 9f 26 f5 7b\s+vgetmantph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 18 26 f5 7b\s+vgetmantps ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 1f 26 f5 7b\s+vgetmantps ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 9f 26 f5 7b\s+vgetmantps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 18 56 f5 7b\s+vreducepd ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 1f 56 f5 7b\s+vreducepd ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 9f 56 f5 7b\s+vreducepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 18 56 f5 7b\s+vreduceph ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 1f 56 f5 7b\s+vreduceph ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 9f 56 f5 7b\s+vreduceph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 18 56 f5 7b\s+vreduceps ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 1f 56 f5 7b\s+vreduceps ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 9f 56 f5 7b\s+vreduceps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 18 09 f5 7b\s+vrndscalepd ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 1f 09 f5 7b\s+vrndscalepd ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 f9 9f 09 f5 7b\s+vrndscalepd ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 18 08 f5 7b\s+vrndscaleph ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 1f 08 f5 7b\s+vrndscaleph ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 78 9f 08 f5 7b\s+vrndscaleph ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 18 08 f5 7b\s+vrndscaleps ymm30,ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 1f 08 f5 7b\s+vrndscaleps ymm30\{k7\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 79 9f 08 f5 7b\s+vrndscaleps ymm30\{k7\}\{z\},ymm29\{sae\},0x7b +\s*[a-f0-9]+:\s*62 02 91 10 98 f4\s+vfmadd132pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 98 f4\s+vfmadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 98 f4\s+vfmadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 98 f4\s+vfmadd132ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 98 f4\s+vfmadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 98 f4\s+vfmadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 98 f4\s+vfmadd132ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 98 f4\s+vfmadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 98 f4\s+vfmadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 a8 f4\s+vfmadd213pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 a8 f4\s+vfmadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 a8 f4\s+vfmadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 a8 f4\s+vfmadd213ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 a8 f4\s+vfmadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 a8 f4\s+vfmadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 a8 f4\s+vfmadd213ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 a8 f4\s+vfmadd213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 a8 f4\s+vfmadd213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 b8 f4\s+vfmadd231pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 b8 f4\s+vfmadd231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 b8 f4\s+vfmadd231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 b8 f4\s+vfmadd231ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 b8 f4\s+vfmadd231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 b8 f4\s+vfmadd231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 b8 f4\s+vfmadd231ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 b8 f4\s+vfmadd231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 b8 f4\s+vfmadd231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 96 f4\s+vfmaddsub132pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 96 f4\s+vfmaddsub132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 96 f4\s+vfmaddsub132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 96 f4\s+vfmaddsub132ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 96 f4\s+vfmaddsub132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 96 f4\s+vfmaddsub132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 96 f4\s+vfmaddsub132ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 96 f4\s+vfmaddsub132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 96 f4\s+vfmaddsub132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 a6 f4\s+vfmaddsub213pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 a6 f4\s+vfmaddsub213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 a6 f4\s+vfmaddsub213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 a6 f4\s+vfmaddsub213ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 a6 f4\s+vfmaddsub213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 a6 f4\s+vfmaddsub213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 a6 f4\s+vfmaddsub213ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 a6 f4\s+vfmaddsub213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 a6 f4\s+vfmaddsub213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 b6 f4\s+vfmaddsub231pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 b6 f4\s+vfmaddsub231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 b6 f4\s+vfmaddsub231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 b6 f4\s+vfmaddsub231ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 b6 f4\s+vfmaddsub231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 b6 f4\s+vfmaddsub231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 b6 f4\s+vfmaddsub231ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 b6 f4\s+vfmaddsub231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 b6 f4\s+vfmaddsub231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 9a f4\s+vfmsub132pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 9a f4\s+vfmsub132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 9a f4\s+vfmsub132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 9a f4\s+vfmsub132ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 9a f4\s+vfmsub132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 9a f4\s+vfmsub132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 9a f4\s+vfmsub132ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 9a f4\s+vfmsub132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 9a f4\s+vfmsub132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 aa f4\s+vfmsub213pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 aa f4\s+vfmsub213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 aa f4\s+vfmsub213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 aa f4\s+vfmsub213ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 aa f4\s+vfmsub213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 aa f4\s+vfmsub213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 aa f4\s+vfmsub213ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 aa f4\s+vfmsub213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 aa f4\s+vfmsub213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 ba f4\s+vfmsub231pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 ba f4\s+vfmsub231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 ba f4\s+vfmsub231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 ba f4\s+vfmsub231ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 ba f4\s+vfmsub231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 ba f4\s+vfmsub231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 ba f4\s+vfmsub231ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 ba f4\s+vfmsub231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 ba f4\s+vfmsub231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 97 f4\s+vfmsubadd132pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 97 f4\s+vfmsubadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 97 f4\s+vfmsubadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 97 f4\s+vfmsubadd132ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 97 f4\s+vfmsubadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 97 f4\s+vfmsubadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 97 f4\s+vfmsubadd132ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 97 f4\s+vfmsubadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 97 f4\s+vfmsubadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 a7 f4\s+vfmsubadd213pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 a7 f4\s+vfmsubadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 a7 f4\s+vfmsubadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 a7 f4\s+vfmsubadd213ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 a7 f4\s+vfmsubadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 a7 f4\s+vfmsubadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 a7 f4\s+vfmsubadd213ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 a7 f4\s+vfmsubadd213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 a7 f4\s+vfmsubadd213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 b7 f4\s+vfmsubadd231pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 b7 f4\s+vfmsubadd231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 b7 f4\s+vfmsubadd231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 b7 f4\s+vfmsubadd231ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 b7 f4\s+vfmsubadd231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 b7 f4\s+vfmsubadd231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 b7 f4\s+vfmsubadd231ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 b7 f4\s+vfmsubadd231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 b7 f4\s+vfmsubadd231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 9c f4\s+vfnmadd132pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 9c f4\s+vfnmadd132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 9c f4\s+vfnmadd132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 9c f4\s+vfnmadd132ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 9c f4\s+vfnmadd132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 9c f4\s+vfnmadd132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 9c f4\s+vfnmadd132ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 9c f4\s+vfnmadd132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 9c f4\s+vfnmadd132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 ac f4\s+vfnmadd213pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 ac f4\s+vfnmadd213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 ac f4\s+vfnmadd213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 ac f4\s+vfnmadd213ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 ac f4\s+vfnmadd213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 ac f4\s+vfnmadd213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 ac f4\s+vfnmadd213ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 ac f4\s+vfnmadd213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 ac f4\s+vfnmadd213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 bc f4\s+vfnmadd231pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 bc f4\s+vfnmadd231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 bc f4\s+vfnmadd231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 bc f4\s+vfnmadd231ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 bc f4\s+vfnmadd231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 bc f4\s+vfnmadd231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 bc f4\s+vfnmadd231ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 bc f4\s+vfnmadd231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 bc f4\s+vfnmadd231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 9e f4\s+vfnmsub132pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 9e f4\s+vfnmsub132pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 9e f4\s+vfnmsub132pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 9e f4\s+vfnmsub132ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 9e f4\s+vfnmsub132ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 9e f4\s+vfnmsub132ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 9e f4\s+vfnmsub132ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 9e f4\s+vfnmsub132ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 9e f4\s+vfnmsub132ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 ae f4\s+vfnmsub213pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 ae f4\s+vfnmsub213pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 ae f4\s+vfnmsub213pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 ae f4\s+vfnmsub213ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 ae f4\s+vfnmsub213ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 ae f4\s+vfnmsub213ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 ae f4\s+vfnmsub213ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 ae f4\s+vfnmsub213ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 ae f4\s+vfnmsub213ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 91 10 be f4\s+vfnmsub231pd ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 91 37 be f4\s+vfnmsub231pd ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 91 f7 be f4\s+vfnmsub231pd ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 11 10 be f4\s+vfnmsub231ph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 11 37 be f4\s+vfnmsub231ph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 11 f7 be f4\s+vfnmsub231ph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 02 11 10 be f4\s+vfnmsub231ps ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 02 11 37 be f4\s+vfnmsub231ps ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 02 11 f7 be f4\s+vfnmsub231ps ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 03 91 10 54 f4 7b\s+vfixupimmpd ymm30,ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 91 17 54 f4 7b\s+vfixupimmpd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 91 97 54 f4 7b\s+vfixupimmpd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 11 10 54 f4 7b\s+vfixupimmps ymm30,ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 11 17 54 f4 7b\s+vfixupimmps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 11 97 54 f4 7b\s+vfixupimmps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 91 10 50 f4 7b\s+vrangepd ymm30,ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 91 17 50 f4 7b\s+vrangepd ymm30\{k7\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 91 97 50 f4 7b\s+vrangepd ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 11 10 50 f4 7b\s+vrangeps ymm30,ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 11 17 50 f4 7b\s+vrangeps ymm30\{k7\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 03 11 97 50 f4 7b\s+vrangeps ymm30\{k7\}\{z\},ymm29,ymm28\{sae\},0x7b +\s*[a-f0-9]+:\s*62 06 13 10 56 f4\s+vfcmaddcph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 13 37 56 f4\s+vfcmaddcph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 13 f7 56 f4\s+vfcmaddcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 13 10 d6 f4\s+vfcmulcph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 13 37 d6 f4\s+vfcmulcph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 13 f7 d6 f4\s+vfcmulcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 12 10 56 f4\s+vfmaddcph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 12 37 56 f4\s+vfmaddcph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 12 f7 56 f4\s+vfmaddcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 06 12 10 d6 f4\s+vfmulcph ymm30,ymm29,ymm28\{rn-sae\} +\s*[a-f0-9]+:\s*62 06 12 37 d6 f4\s+vfmulcph ymm30\{k7\},ymm29,ymm28\{rd-sae\} +\s*[a-f0-9]+:\s*62 06 12 f7 d6 f4\s+vfmulcph ymm30\{k7\}\{z\},ymm29,ymm28\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 78 18 5b f5\s+vcvtdq2ph xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 78 3f 5b f5\s+vcvtdq2ph xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 78 ff 5b f5\s+vcvtdq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 78 18 5b f5\s+vcvtdq2ps ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 78 3f 5b f5\s+vcvtdq2ps ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 78 ff 5b f5\s+vcvtdq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 7b 18 7a f5\s+vcvtudq2ph xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 7b 3f 7a f5\s+vcvtudq2ph xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 7b ff 7a f5\s+vcvtudq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 7b 18 7a f5\s+vcvtudq2ps ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 7b 3f 7a f5\s+vcvtudq2ps ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 7b ff 7a f5\s+vcvtudq2ps ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 fb 18 e6 f5\s+vcvtpd2dq xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 fb 3f e6 f5\s+vcvtpd2dq xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 fb ff e6 f5\s+vcvtpd2dq xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 f9 18 5a f5\s+vcvtpd2ph xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 f9 3f 5a f5\s+vcvtpd2ph xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 f9 ff 5a f5\s+vcvtpd2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 f9 18 5a f5\s+vcvtpd2ps xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 f9 3f 5a f5\s+vcvtpd2ps xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 f9 ff 5a f5\s+vcvtpd2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 f8 18 79 f5\s+vcvtpd2udq xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 f8 3f 79 f5\s+vcvtpd2udq xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 f8 ff 79 f5\s+vcvtpd2udq xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 f9 18 7b f5\s+vcvtpd2qq ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 f9 3f 7b f5\s+vcvtpd2qq ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 f9 ff 7b f5\s+vcvtpd2qq ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 f9 18 79 f5\s+vcvtpd2uqq ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 f9 3f 79 f5\s+vcvtpd2uqq ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 f9 ff 79 f5\s+vcvtpd2uqq ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 79 18 5b f5\s+vcvtph2dq ymm30,xmm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 79 3f 5b f5\s+vcvtph2dq ymm30\{k7\},xmm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 79 ff 5b f5\s+vcvtph2dq ymm30\{k7\}\{z\},xmm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 79 18 7b f5\s+vcvtph2qq ymm30,xmm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 79 3f 7b f5\s+vcvtph2qq ymm30\{k7\},xmm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 79 ff 7b f5\s+vcvtph2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 78 18 79 f5\s+vcvtph2udq ymm30,xmm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 78 3f 79 f5\s+vcvtph2udq ymm30\{k7\},xmm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 78 ff 79 f5\s+vcvtph2udq ymm30\{k7\}\{z\},xmm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 79 18 79 f5\s+vcvtph2uqq ymm30,xmm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 79 3f 79 f5\s+vcvtph2uqq ymm30\{k7\},xmm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 79 ff 79 f5\s+vcvtph2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 78 18 5a f5\s+vcvtph2pd ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 1f 5a f5\s+vcvtph2pd ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 9f 5a f5\s+vcvtph2pd ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 02 79 18 13 f5\s+vcvtph2ps ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 02 79 1f 13 f5\s+vcvtph2ps ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 02 79 9f 13 f5\s+vcvtph2ps ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 06 79 18 13 f5\s+vcvtph2psx ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 06 79 1f 13 f5\s+vcvtph2psx ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 06 79 9f 13 f5\s+vcvtph2psx ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 18 7d f5\s+vcvtph2uw ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 78 3f 7d f5\s+vcvtph2uw ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 78 ff 7d f5\s+vcvtph2uw ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 79 18 7d f5\s+vcvtph2w ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 79 3f 7d f5\s+vcvtph2w ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 79 ff 7d f5\s+vcvtph2w ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 79 18 5b f5\s+vcvtps2dq ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 79 3f 5b f5\s+vcvtps2dq ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 79 ff 5b f5\s+vcvtps2dq ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 78 18 79 f5\s+vcvtps2udq ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 78 3f 79 f5\s+vcvtps2udq ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 78 ff 79 f5\s+vcvtps2udq ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 78 18 5a f5\s+vcvtps2pd ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 01 78 1f 5a f5\s+vcvtps2pd ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 01 78 9f 5a f5\s+vcvtps2pd ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 18 1d f5\s+vcvtps2phx xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 79 3f 1d f5\s+vcvtps2phx xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 79 ff 1d f5\s+vcvtps2phx xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 79 18 7b f5\s+vcvtps2qq ymm30,xmm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 79 3f 7b f5\s+vcvtps2qq ymm30\{k7\},xmm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 79 ff 7b f5\s+vcvtps2qq ymm30\{k7\}\{z\},xmm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 79 18 79 f5\s+vcvtps2uqq ymm30,xmm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 79 3f 79 f5\s+vcvtps2uqq ymm30\{k7\},xmm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 79 ff 79 f5\s+vcvtps2uqq ymm30\{k7\}\{z\},xmm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 fa 18 e6 f5\s+vcvtqq2pd ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 fa 3f e6 f5\s+vcvtqq2pd ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 fa ff e6 f5\s+vcvtqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 f8 18 5b f5\s+vcvtqq2ph xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 f8 3f 5b f5\s+vcvtqq2ph xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 f8 ff 5b f5\s+vcvtqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 f8 18 5b f5\s+vcvtqq2ps xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 f8 3f 5b f5\s+vcvtqq2ps xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 f8 ff 5b f5\s+vcvtqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 fa 18 7a f5\s+vcvtuqq2pd ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 fa 3f 7a f5\s+vcvtuqq2pd ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 fa ff 7a f5\s+vcvtuqq2pd ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 fb 18 7a f5\s+vcvtuqq2ph xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 fb 3f 7a f5\s+vcvtuqq2ph xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 fb ff 7a f5\s+vcvtuqq2ph xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 fb 18 7a f5\s+vcvtuqq2ps xmm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 01 fb 3f 7a f5\s+vcvtuqq2ps xmm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 01 fb ff 7a f5\s+vcvtuqq2ps xmm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 01 f9 18 e6 f5\s+vcvttpd2dq xmm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 1f e6 f5\s+vcvttpd2dq xmm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 9f e6 f5\s+vcvttpd2dq xmm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f8 18 78 f5\s+vcvttpd2udq xmm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f8 1f 78 f5\s+vcvttpd2udq xmm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f8 9f 78 f5\s+vcvttpd2udq xmm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 18 7a f5\s+vcvttpd2qq ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 1f 7a f5\s+vcvttpd2qq ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 9f 7a f5\s+vcvttpd2qq ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 18 78 f5\s+vcvttpd2uqq ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 1f 78 f5\s+vcvttpd2uqq ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 f9 9f 78 f5\s+vcvttpd2uqq ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 05 7a 18 5b f5\s+vcvttph2dq ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 7a 1f 5b f5\s+vcvttph2dq ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 7a 9f 5b f5\s+vcvttph2dq ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 18 7a f5\s+vcvttph2qq ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 1f 7a f5\s+vcvttph2qq ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 9f 7a f5\s+vcvttph2qq ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 18 78 f5\s+vcvttph2udq ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 1f 78 f5\s+vcvttph2udq ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 9f 78 f5\s+vcvttph2udq ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 18 78 f5\s+vcvttph2uqq ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 1f 78 f5\s+vcvttph2uqq ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 9f 78 f5\s+vcvttph2uqq ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 18 7c f5\s+vcvttph2uw ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 1f 7c f5\s+vcvttph2uw ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 05 78 9f 7c f5\s+vcvttph2uw ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 18 7c f5\s+vcvttph2w ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 1f 7c f5\s+vcvttph2w ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 05 79 9f 7c f5\s+vcvttph2w ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 7a 18 5b f5\s+vcvttps2dq ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 7a 1f 5b f5\s+vcvttps2dq ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 7a 9f 5b f5\s+vcvttps2dq ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 78 18 78 f5\s+vcvttps2udq ymm30,ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 78 1f 78 f5\s+vcvttps2udq ymm30\{k7\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 78 9f 78 f5\s+vcvttps2udq ymm30\{k7\}\{z\},ymm29\{sae\} +\s*[a-f0-9]+:\s*62 01 79 18 7a f5\s+vcvttps2qq ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 01 79 1f 7a f5\s+vcvttps2qq ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 01 79 9f 7a f5\s+vcvttps2qq ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 01 79 18 78 f5\s+vcvttps2uqq ymm30,xmm29\{sae\} +\s*[a-f0-9]+:\s*62 01 79 1f 78 f5\s+vcvttps2uqq ymm30\{k7\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 01 79 9f 78 f5\s+vcvttps2uqq ymm30\{k7\}\{z\},xmm29\{sae\} +\s*[a-f0-9]+:\s*62 05 7b 18 7d f5\s+vcvtuw2ph ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 7b 3f 7d f5\s+vcvtuw2ph ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 7b ff 7d f5\s+vcvtuw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\} +\s*[a-f0-9]+:\s*62 05 7a 18 7d f5\s+vcvtw2ph ymm30,ymm29\{rn-sae\} +\s*[a-f0-9]+:\s*62 05 7a 3f 7d f5\s+vcvtw2ph ymm30\{k7\},ymm29\{rd-sae\} +\s*[a-f0-9]+:\s*62 05 7a ff 7d f5\s+vcvtw2ph ymm30\{k7\}\{z\},ymm29\{rz-sae\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d new file mode 100644 index 0000000..2bdfbf3 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.d @@ -0,0 +1,450 @@ +#objdump: -dw +#name: x86_64 AVX10.2 rounding insns + +.*: +file format .* + +Disassembly of section \.text: + +0+ <_start>: +\s*[a-f0-9]+:\s*62 91 91 10 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm28,%ymm29,%k5 +\s*[a-f0-9]+:\s*62 91 91 17 c2 ec 7b\s+vcmppd \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\} +\s*[a-f0-9]+:\s*62 02 f9 18 42 f5\s+vgetexppd \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 f9 1f 42 f5\s+vgetexppd \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 f9 9f 42 f5\s+vgetexppd \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f9 18 51 f5\s+vsqrtpd \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 f9 3f 51 f5\s+vsqrtpd \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f9 ff 51 f5\s+vsqrtpd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 93 10 10 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm28,%ymm29,%k5 +\s*[a-f0-9]+:\s*62 93 10 17 c2 ec 7b\s+vcmpph \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\} +\s*[a-f0-9]+:\s*62 06 79 18 42 f5\s+vgetexpph \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 79 1f 42 f5\s+vgetexpph \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 79 9f 42 f5\s+vgetexpph \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 78 18 51 f5\s+vsqrtph \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 78 3f 51 f5\s+vsqrtph \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 78 ff 51 f5\s+vsqrtph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 91 10 10 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm28,%ymm29,%k5 +\s*[a-f0-9]+:\s*62 91 10 17 c2 ec 7b\s+vcmpps \$0x7b,\{sae\},%ymm28,%ymm29,%k5\{%k7\} +\s*[a-f0-9]+:\s*62 02 79 18 42 f5\s+vgetexpps \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 79 1f 42 f5\s+vgetexpps \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 79 9f 42 f5\s+vgetexpps \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 78 18 51 f5\s+vsqrtps \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 78 3f 51 f5\s+vsqrtps \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 78 ff 51 f5\s+vsqrtps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 91 10 58 f4\s+vaddpd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 91 37 58 f4\s+vaddpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 91 f7 58 f4\s+vaddpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 10 10 58 f4\s+vaddph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 10 37 58 f4\s+vaddph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 10 f7 58 f4\s+vaddph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 10 10 58 f4\s+vaddps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 10 37 58 f4\s+vaddps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 10 f7 58 f4\s+vaddps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 91 10 5e f4\s+vdivpd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 91 37 5e f4\s+vdivpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 91 f7 5e f4\s+vdivpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 10 10 5e f4\s+vdivph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 10 37 5e f4\s+vdivph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 10 f7 5e f4\s+vdivph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 10 10 5e f4\s+vdivps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 10 37 5e f4\s+vdivps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 10 f7 5e f4\s+vdivps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 91 10 59 f4\s+vmulpd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 91 37 59 f4\s+vmulpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 91 f7 59 f4\s+vmulpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 10 10 59 f4\s+vmulph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 10 37 59 f4\s+vmulph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 10 f7 59 f4\s+vmulph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 10 10 59 f4\s+vmulps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 10 37 59 f4\s+vmulps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 10 f7 59 f4\s+vmulps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 2c f4\s+vscalefpd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 2c f4\s+vscalefpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 2c f4\s+vscalefpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 2c f4\s+vscalefph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 2c f4\s+vscalefph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 2c f4\s+vscalefph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 2c f4\s+vscalefps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 2c f4\s+vscalefps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 2c f4\s+vscalefps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 91 10 5c f4\s+vsubpd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 91 37 5c f4\s+vsubpd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 91 f7 5c f4\s+vsubpd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 10 10 5c f4\s+vsubph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 10 37 5c f4\s+vsubph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 10 f7 5c f4\s+vsubph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 10 10 5c f4\s+vsubps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 10 37 5c f4\s+vsubps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 10 f7 5c f4\s+vsubps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 91 10 5f f4\s+vmaxpd \{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 91 17 5f f4\s+vmaxpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 91 97 5f f4\s+vmaxpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 10 10 5f f4\s+vmaxph \{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 10 17 5f f4\s+vmaxph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 10 97 5f f4\s+vmaxph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 10 10 5f f4\s+vmaxps \{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 10 17 5f f4\s+vmaxps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 10 97 5f f4\s+vmaxps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 91 10 5d f4\s+vminpd \{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 91 17 5d f4\s+vminpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 91 97 5d f4\s+vminpd \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 10 10 5d f4\s+vminph \{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 10 17 5d f4\s+vminph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 10 97 5d f4\s+vminph \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 10 10 5d f4\s+vminps \{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 10 17 5d f4\s+vminps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 10 97 5d f4\s+vminps \{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 f9 18 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 f9 1f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 f9 9f 26 f5 7b\s+vgetmantpd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 78 18 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 78 1f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 78 9f 26 f5 7b\s+vgetmantph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 79 18 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 79 1f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 79 9f 26 f5 7b\s+vgetmantps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 f9 18 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 f9 1f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 f9 9f 56 f5 7b\s+vreducepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 78 18 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 78 1f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 78 9f 56 f5 7b\s+vreduceph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 79 18 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 79 1f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 79 9f 56 f5 7b\s+vreduceps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 f9 18 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 f9 1f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 f9 9f 09 f5 7b\s+vrndscalepd \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 78 18 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 78 1f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 78 9f 08 f5 7b\s+vrndscaleph \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 79 18 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 79 1f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 79 9f 08 f5 7b\s+vrndscaleps \$0x7b,\{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 98 f4\s+vfmadd132pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 98 f4\s+vfmadd132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 98 f4\s+vfmadd132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 98 f4\s+vfmadd132ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 98 f4\s+vfmadd132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 98 f4\s+vfmadd132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 98 f4\s+vfmadd132ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 98 f4\s+vfmadd132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 98 f4\s+vfmadd132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 a8 f4\s+vfmadd213pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 a8 f4\s+vfmadd213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 a8 f4\s+vfmadd213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 a8 f4\s+vfmadd213ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 a8 f4\s+vfmadd213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 a8 f4\s+vfmadd213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 a8 f4\s+vfmadd213ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 a8 f4\s+vfmadd213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 a8 f4\s+vfmadd213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 b8 f4\s+vfmadd231pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 b8 f4\s+vfmadd231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 b8 f4\s+vfmadd231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 b8 f4\s+vfmadd231ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 b8 f4\s+vfmadd231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 b8 f4\s+vfmadd231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 b8 f4\s+vfmadd231ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 b8 f4\s+vfmadd231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 b8 f4\s+vfmadd231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 96 f4\s+vfmaddsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 96 f4\s+vfmaddsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 96 f4\s+vfmaddsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 96 f4\s+vfmaddsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 96 f4\s+vfmaddsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 96 f4\s+vfmaddsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 96 f4\s+vfmaddsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 96 f4\s+vfmaddsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 96 f4\s+vfmaddsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 a6 f4\s+vfmaddsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 a6 f4\s+vfmaddsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 a6 f4\s+vfmaddsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 a6 f4\s+vfmaddsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 a6 f4\s+vfmaddsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 a6 f4\s+vfmaddsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 a6 f4\s+vfmaddsub213ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 a6 f4\s+vfmaddsub213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 a6 f4\s+vfmaddsub213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 b6 f4\s+vfmaddsub231pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 b6 f4\s+vfmaddsub231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 b6 f4\s+vfmaddsub231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 b6 f4\s+vfmaddsub231ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 b6 f4\s+vfmaddsub231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 b6 f4\s+vfmaddsub231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 b6 f4\s+vfmaddsub231ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 b6 f4\s+vfmaddsub231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 b6 f4\s+vfmaddsub231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 9a f4\s+vfmsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 9a f4\s+vfmsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 9a f4\s+vfmsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 9a f4\s+vfmsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 9a f4\s+vfmsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 9a f4\s+vfmsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 9a f4\s+vfmsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 9a f4\s+vfmsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 9a f4\s+vfmsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 aa f4\s+vfmsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 aa f4\s+vfmsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 aa f4\s+vfmsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 aa f4\s+vfmsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 aa f4\s+vfmsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 aa f4\s+vfmsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 aa f4\s+vfmsub213ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 aa f4\s+vfmsub213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 aa f4\s+vfmsub213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 ba f4\s+vfmsub231pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 ba f4\s+vfmsub231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 ba f4\s+vfmsub231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 ba f4\s+vfmsub231ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 ba f4\s+vfmsub231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 ba f4\s+vfmsub231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 ba f4\s+vfmsub231ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 ba f4\s+vfmsub231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 ba f4\s+vfmsub231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 97 f4\s+vfmsubadd132pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 97 f4\s+vfmsubadd132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 97 f4\s+vfmsubadd132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 97 f4\s+vfmsubadd132ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 97 f4\s+vfmsubadd132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 97 f4\s+vfmsubadd132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 97 f4\s+vfmsubadd132ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 97 f4\s+vfmsubadd132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 97 f4\s+vfmsubadd132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 a7 f4\s+vfmsubadd213pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 a7 f4\s+vfmsubadd213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 a7 f4\s+vfmsubadd213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 a7 f4\s+vfmsubadd213ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 a7 f4\s+vfmsubadd213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 a7 f4\s+vfmsubadd213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 a7 f4\s+vfmsubadd213ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 a7 f4\s+vfmsubadd213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 a7 f4\s+vfmsubadd213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 b7 f4\s+vfmsubadd231pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 b7 f4\s+vfmsubadd231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 b7 f4\s+vfmsubadd231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 b7 f4\s+vfmsubadd231ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 b7 f4\s+vfmsubadd231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 b7 f4\s+vfmsubadd231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 b7 f4\s+vfmsubadd231ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 b7 f4\s+vfmsubadd231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 b7 f4\s+vfmsubadd231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 9c f4\s+vfnmadd132pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 9c f4\s+vfnmadd132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 9c f4\s+vfnmadd132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 9c f4\s+vfnmadd132ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 9c f4\s+vfnmadd132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 9c f4\s+vfnmadd132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 9c f4\s+vfnmadd132ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 9c f4\s+vfnmadd132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 9c f4\s+vfnmadd132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 ac f4\s+vfnmadd213pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 ac f4\s+vfnmadd213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 ac f4\s+vfnmadd213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 ac f4\s+vfnmadd213ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 ac f4\s+vfnmadd213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 ac f4\s+vfnmadd213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 ac f4\s+vfnmadd213ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 ac f4\s+vfnmadd213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 ac f4\s+vfnmadd213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 bc f4\s+vfnmadd231pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 bc f4\s+vfnmadd231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 bc f4\s+vfnmadd231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 bc f4\s+vfnmadd231ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 bc f4\s+vfnmadd231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 bc f4\s+vfnmadd231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 bc f4\s+vfnmadd231ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 bc f4\s+vfnmadd231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 bc f4\s+vfnmadd231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 9e f4\s+vfnmsub132pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 9e f4\s+vfnmsub132pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 9e f4\s+vfnmsub132pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 9e f4\s+vfnmsub132ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 9e f4\s+vfnmsub132ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 9e f4\s+vfnmsub132ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 9e f4\s+vfnmsub132ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 9e f4\s+vfnmsub132ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 9e f4\s+vfnmsub132ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 ae f4\s+vfnmsub213pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 ae f4\s+vfnmsub213pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 ae f4\s+vfnmsub213pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 ae f4\s+vfnmsub213ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 ae f4\s+vfnmsub213ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 ae f4\s+vfnmsub213ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 ae f4\s+vfnmsub213ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 ae f4\s+vfnmsub213ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 ae f4\s+vfnmsub213ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 91 10 be f4\s+vfnmsub231pd \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 91 37 be f4\s+vfnmsub231pd \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 91 f7 be f4\s+vfnmsub231pd \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 11 10 be f4\s+vfnmsub231ph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 11 37 be f4\s+vfnmsub231ph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 11 f7 be f4\s+vfnmsub231ph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 11 10 be f4\s+vfnmsub231ps \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 11 37 be f4\s+vfnmsub231ps \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 11 f7 be f4\s+vfnmsub231ps \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 91 10 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 91 17 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 91 97 54 f4 7b\s+vfixupimmpd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 11 10 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 11 17 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 11 97 54 f4 7b\s+vfixupimmps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 91 10 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 91 17 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 91 97 50 f4 7b\s+vrangepd \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 03 11 10 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 03 11 17 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 03 11 97 50 f4 7b\s+vrangeps \$0x7b,\{sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 13 10 56 f4\s+vfcmaddcph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 13 37 56 f4\s+vfcmaddcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 13 f7 56 f4\s+vfcmaddcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 13 10 d6 f4\s+vfcmulcph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 13 37 d6 f4\s+vfcmulcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 13 f7 d6 f4\s+vfcmulcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 12 10 56 f4\s+vfmaddcph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 12 37 56 f4\s+vfmaddcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 12 f7 56 f4\s+vfmaddcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 12 10 d6 f4\s+vfmulcph \{rn-sae\},%ymm28,%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 12 37 d6 f4\s+vfmulcph \{rd-sae\},%ymm28,%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 12 f7 d6 f4\s+vfmulcph \{rz-sae\},%ymm28,%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 78 18 5b f5\s+vcvtdq2ph \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 78 3f 5b f5\s+vcvtdq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 78 ff 5b f5\s+vcvtdq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 78 18 5b f5\s+vcvtdq2ps \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 78 3f 5b f5\s+vcvtdq2ps \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 78 ff 5b f5\s+vcvtdq2ps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 7b 18 7a f5\s+vcvtudq2ph \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 7b 3f 7a f5\s+vcvtudq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 7b ff 7a f5\s+vcvtudq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 7b 18 7a f5\s+vcvtudq2ps \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 7b 3f 7a f5\s+vcvtudq2ps \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 7b ff 7a f5\s+vcvtudq2ps \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 fb 18 e6 f5\s+vcvtpd2dq \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 fb 3f e6 f5\s+vcvtpd2dq \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 fb ff e6 f5\s+vcvtpd2dq \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 f9 18 5a f5\s+vcvtpd2ph \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 f9 3f 5a f5\s+vcvtpd2ph \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 f9 ff 5a f5\s+vcvtpd2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f9 18 5a f5\s+vcvtpd2ps \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 f9 3f 5a f5\s+vcvtpd2ps \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f9 ff 5a f5\s+vcvtpd2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f8 18 79 f5\s+vcvtpd2udq \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 f8 3f 79 f5\s+vcvtpd2udq \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f8 ff 79 f5\s+vcvtpd2udq \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f9 18 7b f5\s+vcvtpd2qq \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 f9 3f 7b f5\s+vcvtpd2qq \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f9 ff 7b f5\s+vcvtpd2qq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f9 18 79 f5\s+vcvtpd2uqq \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 f9 3f 79 f5\s+vcvtpd2uqq \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f9 ff 79 f5\s+vcvtpd2uqq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 5b f5\s+vcvtph2dq \{rn-sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 79 3f 5b f5\s+vcvtph2dq \{rd-sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 ff 5b f5\s+vcvtph2dq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 7b f5\s+vcvtph2qq \{rn-sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 79 3f 7b f5\s+vcvtph2qq \{rd-sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 ff 7b f5\s+vcvtph2qq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 78 18 79 f5\s+vcvtph2udq \{rn-sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 78 3f 79 f5\s+vcvtph2udq \{rd-sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 78 ff 79 f5\s+vcvtph2udq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 79 f5\s+vcvtph2uqq \{rn-sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 79 3f 79 f5\s+vcvtph2uqq \{rd-sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 ff 79 f5\s+vcvtph2uqq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 78 18 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 78 1f 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 78 9f 5a f5\s+vcvtph2pd \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 02 79 18 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 02 79 1f 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 02 79 9f 13 f5\s+vcvtph2ps \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 06 79 18 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 06 79 1f 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 06 79 9f 13 f5\s+vcvtph2psx \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 78 18 7d f5\s+vcvtph2uw \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 78 3f 7d f5\s+vcvtph2uw \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 78 ff 7d f5\s+vcvtph2uw \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 7d f5\s+vcvtph2w \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 79 3f 7d f5\s+vcvtph2w \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 ff 7d f5\s+vcvtph2w \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 79 18 5b f5\s+vcvtps2dq \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 79 3f 5b f5\s+vcvtps2dq \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 79 ff 5b f5\s+vcvtps2dq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 78 18 79 f5\s+vcvtps2udq \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 78 3f 79 f5\s+vcvtps2udq \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 78 ff 79 f5\s+vcvtps2udq \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 78 18 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 78 1f 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 78 9f 5a f5\s+vcvtps2pd \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 1d f5\s+vcvtps2phx \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 79 3f 1d f5\s+vcvtps2phx \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 ff 1d f5\s+vcvtps2phx \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 79 18 7b f5\s+vcvtps2qq \{rn-sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 79 3f 7b f5\s+vcvtps2qq \{rd-sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 79 ff 7b f5\s+vcvtps2qq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 79 18 79 f5\s+vcvtps2uqq \{rn-sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 79 3f 79 f5\s+vcvtps2uqq \{rd-sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 79 ff 79 f5\s+vcvtps2uqq \{rz-sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 fa 18 e6 f5\s+vcvtqq2pd \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 fa 3f e6 f5\s+vcvtqq2pd \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 fa ff e6 f5\s+vcvtqq2pd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 f8 18 5b f5\s+vcvtqq2ph \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 f8 3f 5b f5\s+vcvtqq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 f8 ff 5b f5\s+vcvtqq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f8 18 5b f5\s+vcvtqq2ps \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 f8 3f 5b f5\s+vcvtqq2ps \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f8 ff 5b f5\s+vcvtqq2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 fa 18 7a f5\s+vcvtuqq2pd \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 fa 3f 7a f5\s+vcvtuqq2pd \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 fa ff 7a f5\s+vcvtuqq2pd \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 fb 18 7a f5\s+vcvtuqq2ph \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 05 fb 3f 7a f5\s+vcvtuqq2ph \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 fb ff 7a f5\s+vcvtuqq2ph \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 fb 18 7a f5\s+vcvtuqq2ps \{rn-sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 fb 3f 7a f5\s+vcvtuqq2ps \{rd-sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 fb ff 7a f5\s+vcvtuqq2ps \{rz-sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f9 18 e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 f9 1f e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f9 9f e6 f5\s+vcvttpd2dq \{sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f8 18 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30 +\s*[a-f0-9]+:\s*62 01 f8 1f 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f8 9f 78 f5\s+vcvttpd2udq \{sae\},%ymm29,%xmm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f9 18 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 f9 1f 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f9 9f 7a f5\s+vcvttpd2qq \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 f9 18 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 f9 1f 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 f9 9f 78 f5\s+vcvttpd2uqq \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 7a 18 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 7a 1f 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 7a 9f 5b f5\s+vcvttph2dq \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 79 1f 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 9f 7a f5\s+vcvttph2qq \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 78 18 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 78 1f 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 78 9f 78 f5\s+vcvttph2udq \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 79 1f 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 9f 78 f5\s+vcvttph2uqq \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 78 18 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 78 1f 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 78 9f 7c f5\s+vcvttph2uw \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 79 18 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 79 1f 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 79 9f 7c f5\s+vcvttph2w \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 7a 18 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 7a 1f 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 7a 9f 5b f5\s+vcvttps2dq \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 78 18 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 78 1f 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 78 9f 78 f5\s+vcvttps2udq \{sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 79 18 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 79 1f 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 79 9f 7a f5\s+vcvttps2qq \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 01 79 18 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30 +\s*[a-f0-9]+:\s*62 01 79 1f 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 01 79 9f 78 f5\s+vcvttps2uqq \{sae\},%xmm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 7b 18 7d f5\s+vcvtuw2ph \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 7b 3f 7d f5\s+vcvtuw2ph \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 7b ff 7d f5\s+vcvtuw2ph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +\s*[a-f0-9]+:\s*62 05 7a 18 7d f5\s+vcvtw2ph \{rn-sae\},%ymm29,%ymm30 +\s*[a-f0-9]+:\s*62 05 7a 3f 7d f5\s+vcvtw2ph \{rd-sae\},%ymm29,%ymm30\{%k7\} +\s*[a-f0-9]+:\s*62 05 7a ff 7d f5\s+vcvtw2ph \{rz-sae\},%ymm29,%ymm30\{%k7\}\{z\} +#pass diff --git a/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s new file mode 100644 index 0000000..eee5eab --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-avx10_2-rounding.s @@ -0,0 +1,350 @@ +# Check 64bit AVX10.2 instructions + + .text +_start: + .irp m, pd, ph, ps + vcmp\m $123, {sae}, %ymm28, %ymm29, %k5 + vcmp\m $123, {sae}, %ymm28, %ymm29, %k5{%k7} + vgetexp\m {sae}, %ymm29, %ymm30 + vgetexp\m {sae}, %ymm29, %ymm30{%k7} + vgetexp\m {sae}, %ymm29, %ymm30{%k7}{z} + vsqrt\m {rn-sae}, %ymm29, %ymm30 + vsqrt\m {rd-sae}, %ymm29, %ymm30{%k7} + vsqrt\m {rz-sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .irp a, add, div, mul, scalef, sub + .irp m, pd, ph, ps + v\a\m {rn-sae}, %ymm28, %ymm29, %ymm30 + v\a\m {rd-sae}, %ymm28, %ymm29, %ymm30{%k7} + v\a\m {rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z} + .endr + .endr + + .irp a, max, min + .irp m, pd, ph, ps + v\a\m {sae}, %ymm28, %ymm29, %ymm30 + v\a\m {sae}, %ymm28, %ymm29, %ymm30{%k7} + v\a\m {sae}, %ymm28, %ymm29, %ymm30{%k7}{z} + .endr + .endr + + .irp a, getmant, reduce, rndscale + .irp m, pd, ph, ps + v\a\m $123, {sae}, %ymm29, %ymm30 + v\a\m $123, {sae}, %ymm29, %ymm30{%k7} + v\a\m $123, {sae}, %ymm29, %ymm30{%k7}{z} + .endr + .endr + + .irp a, madd, maddsub, msub, msubadd, nmadd, nmsub + .irp n, 132, 213, 231 + .irp m, pd, ph, ps + vf\a\n\m {rn-sae}, %ymm28, %ymm29, %ymm30 + vf\a\n\m {rd-sae}, %ymm28, %ymm29, %ymm30{%k7} + vf\a\n\m {rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z} + .endr + .endr + .endr + + .irp a, fixupimm, range + .irp m, pd, ps + v\a\m $123, {sae}, %ymm28, %ymm29, %ymm30 + v\a\m $123, {sae}, %ymm28, %ymm29, %ymm30{%k7} + v\a\m $123, {sae}, %ymm28, %ymm29, %ymm30{%k7}{z} + .endr + .endr + + .irp a, cmadd, cmul, madd, mul + vf\a\()cph {rn-sae}, %ymm28, %ymm29, %ymm30 + vf\a\()cph {rd-sae}, %ymm28, %ymm29, %ymm30{%k7} + vf\a\()cph {rz-sae}, %ymm28, %ymm29, %ymm30{%k7}{z} + .endr + + .irp n, dq, udq + vcvt\n\()2ph {rn-sae}, %ymm29, %xmm30 + vcvt\n\()2ph {rd-sae}, %ymm29, %xmm30{%k7} + vcvt\n\()2ph {rz-sae}, %ymm29, %xmm30{%k7}{z} + + vcvt\n\()2ps {rn-sae}, %ymm29, %ymm30 + vcvt\n\()2ps {rd-sae}, %ymm29, %ymm30{%k7} + vcvt\n\()2ps {rz-sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .irp m, dq, ph, ps, udq + vcvtpd2\m {rn-sae}, %ymm29, %xmm30 + vcvtpd2\m {rd-sae}, %ymm29, %xmm30{%k7} + vcvtpd2\m {rz-sae}, %ymm29, %xmm30{%k7}{z} + .endr + + .irp m, qq, uqq + vcvtpd2\m {rn-sae}, %ymm29, %ymm30 + vcvtpd2\m {rd-sae}, %ymm29, %ymm30{%k7} + vcvtpd2\m {rz-sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .irp m, dq, qq, udq, uqq + vcvtph2\m {rn-sae}, %xmm29, %ymm30 + vcvtph2\m {rd-sae}, %xmm29, %ymm30{%k7} + vcvtph2\m {rz-sae}, %xmm29, %ymm30{%k7}{z} + .endr + + .irp m, pd, ps, psx + vcvtph2\m {sae}, %xmm29, %ymm30 + vcvtph2\m {sae}, %xmm29, %ymm30{%k7} + vcvtph2\m {sae}, %xmm29, %ymm30{%k7}{z} + .endr + + .irp m, uw, w + vcvtph2\m {rn-sae}, %ymm29, %ymm30 + vcvtph2\m {rd-sae}, %ymm29, %ymm30{%k7} + vcvtph2\m {rz-sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .irp m, dq, udq + vcvtps2\m {rn-sae}, %ymm29, %ymm30 + vcvtps2\m {rd-sae}, %ymm29, %ymm30{%k7} + vcvtps2\m {rz-sae}, %ymm29, %ymm30{%k7}{z} + .endr + + vcvtps2pd {sae}, %xmm29, %ymm30 + vcvtps2pd {sae}, %xmm29, %ymm30{%k7} + vcvtps2pd {sae}, %xmm29, %ymm30{%k7}{z} + + vcvtps2phx {rn-sae}, %ymm29, %xmm30 + vcvtps2phx {rd-sae}, %ymm29, %xmm30{%k7} + vcvtps2phx {rz-sae}, %ymm29, %xmm30{%k7}{z} + + .irp m, qq, uqq + vcvtps2\m {rn-sae}, %xmm29, %ymm30 + vcvtps2\m {rd-sae}, %xmm29, %ymm30{%k7} + vcvtps2\m {rz-sae}, %xmm29, %ymm30{%k7}{z} + .endr + + .irp n, qq, uqq + vcvt\n\()2pd {rn-sae}, %ymm29, %ymm30 + vcvt\n\()2pd {rd-sae}, %ymm29, %ymm30{%k7} + vcvt\n\()2pd {rz-sae}, %ymm29, %ymm30{%k7}{z} + + .irp m, ph, ps + vcvt\n\()2\m {rn-sae}, %ymm29, %xmm30 + vcvt\n\()2\m {rd-sae}, %ymm29, %xmm30{%k7} + vcvt\n\()2\m {rz-sae}, %ymm29, %xmm30{%k7}{z} + .endr + .endr + + .irp m, dq, udq + vcvttpd2\m {sae}, %ymm29, %xmm30 + vcvttpd2\m {sae}, %ymm29, %xmm30{%k7} + vcvttpd2\m {sae}, %ymm29, %xmm30{%k7}{z} + .endr + + .irp m, qq, uqq + vcvttpd2\m {sae}, %ymm29, %ymm30 + vcvttpd2\m {sae}, %ymm29, %ymm30{%k7} + vcvttpd2\m {sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .irp m, dq, qq, udq, uqq + vcvttph2\m {sae}, %xmm29, %ymm30 + vcvttph2\m {sae}, %xmm29, %ymm30{%k7} + vcvttph2\m {sae}, %xmm29, %ymm30{%k7}{z} + .endr + + .irp m, uw, w + vcvttph2\m {sae}, %ymm29, %ymm30 + vcvttph2\m {sae}, %ymm29, %ymm30{%k7} + vcvttph2\m {sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .irp m, dq, udq + vcvttps2\m {sae}, %ymm29, %ymm30 + vcvttps2\m {sae}, %ymm29, %ymm30{%k7} + vcvttps2\m {sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .irp m, qq, uqq + vcvttps2\m {sae}, %xmm29, %ymm30 + vcvttps2\m {sae}, %xmm29, %ymm30{%k7} + vcvttps2\m {sae}, %xmm29, %ymm30{%k7}{z} + .endr + + .irp n, uw, w + vcvt\n\()2ph {rn-sae}, %ymm29, %ymm30 + vcvt\n\()2ph {rd-sae}, %ymm29, %ymm30{%k7} + vcvt\n\()2ph {rz-sae}, %ymm29, %ymm30{%k7}{z} + .endr + + .intel_syntax noprefix + .irp m, pd, ph, ps + vcmp\m k5, ymm29, ymm28{sae}, 123 + vcmp\m k5{k7}, ymm29, ymm28{sae}, 123 + vgetexp\m ymm30, ymm29{sae} + vgetexp\m ymm30{k7}, ymm29{sae} + vgetexp\m ymm30{k7}{z}, ymm29{sae} + vsqrt\m ymm30, ymm29{rn-sae} + vsqrt\m ymm30{k7}, ymm29{rd-sae} + vsqrt\m ymm30{k7}{z}, ymm29{rz-sae} + .endr + + .irp a, add, div, mul, scalef, sub + .irp m, pd, ph, ps + v\a\m ymm30, ymm29, ymm28{rn-sae} + v\a\m ymm30{k7}, ymm29, ymm28{rd-sae} + v\a\m ymm30{k7}{z}, ymm29, ymm28{rz-sae} + .endr + .endr + + .irp a, max, min + .irp m, pd, ph, ps + v\a\m ymm30, ymm29, ymm28{sae} + v\a\m ymm30{k7}, ymm29, ymm28{sae} + v\a\m ymm30{k7}{z}, ymm29, ymm28{sae} + .endr + .endr + + .irp a, getmant, reduce, rndscale + .irp m, pd, ph, ps + v\a\m ymm30, ymm29{sae}, 123 + v\a\m ymm30{k7}, ymm29{sae}, 123 + v\a\m ymm30{k7}{z}, ymm29{sae}, 123 + .endr + .endr + + .irp a, madd, maddsub, msub, msubadd, nmadd, nmsub + .irp n, 132, 213, 231 + .irp m, pd, ph, ps + vf\a\n\m ymm30, ymm29, ymm28{rn-sae} + vf\a\n\m ymm30{k7}, ymm29, ymm28{rd-sae} + vf\a\n\m ymm30{k7}{z}, ymm29, ymm28{rz-sae} + .endr + .endr + .endr + + .irp a, fixupimm, range + .irp m, pd, ps + v\a\m ymm30, ymm29, ymm28{sae}, 123 + v\a\m ymm30{k7}, ymm29, ymm28{sae}, 123 + v\a\m ymm30{k7}{z}, ymm29, ymm28{sae}, 123 + .endr + .endr + + .irp a, cmadd, cmul, madd, mul + vf\a\()cph ymm30, ymm29, ymm28{rn-sae} + vf\a\()cph ymm30{k7}, ymm29, ymm28{rd-sae} + vf\a\()cph ymm30{k7}{z}, ymm29, ymm28{rz-sae} + .endr + + .irp n, dq, udq + vcvt\n\()2ph xmm30, ymm29{rn-sae} + vcvt\n\()2ph xmm30{k7}, ymm29{rd-sae} + vcvt\n\()2ph xmm30{k7}{z}, ymm29{rz-sae} + + vcvt\n\()2ps ymm30, ymm29{rn-sae} + vcvt\n\()2ps ymm30{k7}, ymm29{rd-sae} + vcvt\n\()2ps ymm30{k7}{z}, ymm29{rz-sae} + .endr + + .irp m, dq, ph, ps, udq + vcvtpd2\m xmm30, ymm29{rn-sae} + vcvtpd2\m xmm30{k7}, ymm29{rd-sae} + vcvtpd2\m xmm30{k7}{z}, ymm29{rz-sae} + .endr + + .irp m, qq, uqq + vcvtpd2\m ymm30, ymm29{rn-sae} + vcvtpd2\m ymm30{k7}, ymm29{rd-sae} + vcvtpd2\m ymm30{k7}{z}, ymm29{rz-sae} + .endr + + .irp m, dq, qq, udq, uqq + vcvtph2\m ymm30, xmm29{rn-sae} + vcvtph2\m ymm30{k7}, xmm29{rd-sae} + vcvtph2\m ymm30{k7}{z}, xmm29{rz-sae} + .endr + + .irp m, pd, ps, psx + vcvtph2\m ymm30, xmm29{sae} + vcvtph2\m ymm30{k7}, xmm29{sae} + vcvtph2\m ymm30{k7}{z}, xmm29{sae} + .endr + + .irp m, uw, w + vcvtph2\m ymm30, ymm29{rn-sae} + vcvtph2\m ymm30{k7}, ymm29{rd-sae} + vcvtph2\m ymm30{k7}{z}, ymm29{rz-sae} + .endr + + .irp m, dq, udq + vcvtps2\m ymm30, ymm29{rn-sae} + vcvtps2\m ymm30{k7}, ymm29{rd-sae} + vcvtps2\m ymm30{k7}{z}, ymm29{rz-sae} + .endr + + vcvtps2pd ymm30, xmm29{sae} + vcvtps2pd ymm30{k7}, xmm29{sae} + vcvtps2pd ymm30{k7}{z}, xmm29{sae} + + vcvtps2phx xmm30, ymm29{rn-sae} + vcvtps2phx xmm30{k7}, ymm29{rd-sae} + vcvtps2phx xmm30{k7}{z}, ymm29{rz-sae} + + .irp m, qq, uqq + vcvtps2\m ymm30, xmm29{rn-sae} + vcvtps2\m ymm30{k7}, xmm29{rd-sae} + vcvtps2\m ymm30{k7}{z}, xmm29{rz-sae} + .endr + + .irp n, qq, uqq + vcvt\n\()2pd ymm30, ymm29{rn-sae} + vcvt\n\()2pd ymm30{k7}, ymm29{rd-sae} + vcvt\n\()2pd ymm30{k7}{z}, ymm29{rz-sae} + + .irp m, ph, ps + vcvt\n\()2\m xmm30, ymm29{rn-sae} + vcvt\n\()2\m xmm30{k7}, ymm29{rd-sae} + vcvt\n\()2\m xmm30{k7}{z}, ymm29{rz-sae} + .endr + .endr + + .irp m, dq, udq + vcvttpd2\m xmm30, ymm29{sae} + vcvttpd2\m xmm30{k7}, ymm29{sae} + vcvttpd2\m xmm30{k7}{z}, ymm29{sae} + .endr + + .irp m, qq, uqq + vcvttpd2\m ymm30, ymm29{sae} + vcvttpd2\m ymm30{k7}, ymm29{sae} + vcvttpd2\m ymm30{k7}{z}, ymm29{sae} + .endr + + .irp m, dq, qq, udq, uqq + vcvttph2\m ymm30, xmm29{sae} + vcvttph2\m ymm30{k7}, xmm29{sae} + vcvttph2\m ymm30{k7}{z}, xmm29{sae} + .endr + + .irp m, uw, w + vcvttph2\m ymm30, ymm29{sae} + vcvttph2\m ymm30{k7}, ymm29{sae} + vcvttph2\m ymm30{k7}{z}, ymm29{sae} + .endr + + .irp m, dq, udq + vcvttps2\m ymm30, ymm29{sae} + vcvttps2\m ymm30{k7}, ymm29{sae} + vcvttps2\m ymm30{k7}{z}, ymm29{sae} + .endr + + .irp m, qq, uqq + vcvttps2\m ymm30, xmm29{sae} + vcvttps2\m ymm30{k7}, xmm29{sae} + vcvttps2\m ymm30{k7}{z}, xmm29{sae} + .endr + + .irp n, uw, w + vcvt\n\()2ph ymm30, ymm29{rn-sae} + vcvt\n\()2ph ymm30{k7}, ymm29{rd-sae} + vcvt\n\()2ph ymm30{k7}{z}, ymm29{rz-sae} + .endr diff --git a/gas/testsuite/gas/i386/x86-64-inval-tls.l b/gas/testsuite/gas/i386/x86-64-inval-tls.l index 4256e62..da8ac19 100644 --- a/gas/testsuite/gas/i386/x86-64-inval-tls.l +++ b/gas/testsuite/gas/i386/x86-64-inval-tls.l @@ -1,3 +1,3 @@ .*: Assembler messages: -.*:3: Error: .* `kmovq' -.*:4: Error: .* `kmovq' +.*:3: Error: @GOTTPOFF operator cannot be used with `kmovq' +.*:4: Error: @TLSLD operator cannot be used with `kmovq' diff --git a/gas/testsuite/gas/i386/x86-64-macro-1.d b/gas/testsuite/gas/i386/x86-64-macro-1.d new file mode 100644 index 0000000..586dbde --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-macro-1.d @@ -0,0 +1,11 @@ +#as: -mrelax-relocations=yes +#objdump: -dwr + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: + +[a-f0-9]+: ff 15 00 00 00 00 call \*0x0\(%rip\) # 6 <_start\+0x6> 2: R_X86_64_GOTPCRELX acos-0x4 +#pass diff --git a/gas/testsuite/gas/i386/x86-64-macro-1.s b/gas/testsuite/gas/i386/x86-64-macro-1.s new file mode 100644 index 0000000..20b4416 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-macro-1.s @@ -0,0 +1,9 @@ +# Test a white space before argument added by C preprocessor. + + .macro WRAPPER_IMPL_SSE2 callee + call *\ callee@GOTPCREL(%rip) + .endm + + .text +_start: + WRAPPER_IMPL_SSE2 acos diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp index a14ed32..86e7f4a 100644 --- a/gas/testsuite/gas/i386/x86-64.exp +++ b/gas/testsuite/gas/i386/x86-64.exp @@ -498,6 +498,8 @@ run_dump_test "x86-64-pbndkb-intel" run_dump_test "x86-64-user_msr" run_dump_test "x86-64-user_msr-intel" run_list_test "x86-64-user_msr-inval" +run_dump_test "x86-64-avx10_2-rounding" +run_dump_test "x86-64-avx10_2-rounding-intel" run_dump_test "x86-64-clzero" run_dump_test "x86-64-mwaitx-bdver4" run_list_test "x86-64-mwaitx-reg" @@ -698,6 +700,8 @@ if [is_elf_format] then { run_dump_test "x86-64-no-got" + run_dump_test "x86-64-macro-1" + run_dump_test "x86-64-addend" run_dump_test "x86-64-nop-3" run_dump_test "x86-64-nop-4" diff --git a/gas/testsuite/gas/ia64/pcrel.s b/gas/testsuite/gas/ia64/pcrel.s index b14e324..d63130a 100644 --- a/gas/testsuite/gas/ia64/pcrel.s +++ b/gas/testsuite/gas/ia64/pcrel.s @@ -13,27 +13,27 @@ _&n: _e&n: .endm -.macro m1 op, opnd1:vararg +.macro m1 op, opnd1 .align 16 op opnd1 _e&op - _&op .endm -.macro m2 op, opnd1:vararg +.macro m2 op, opnd1 .align 16 op opnd1 @pcrel(esym) .endm -.macro m3 op, opnd1:vararg +.macro m3 op, opnd1 .align 16 op opnd1 esym - _&op .endm -.macro m4 op, opnd1:vararg +.macro m4 op, opnd1 .align 16 op opnd1 esym - . .endm -.macro m5 op, opnd1:vararg +.macro m5 op, opnd1 .align 16 op opnd1 esym - _e&op .endm -.macro m6 op, opnd1:vararg +.macro m6 op, opnd1 .align 16 op opnd1 0 .endm diff --git a/gas/testsuite/gas/loongarch/illegal-operand.l b/gas/testsuite/gas/loongarch/illegal-operand.l index dddc6d6..33e859c 100644 --- a/gas/testsuite/gas/loongarch/illegal-operand.l +++ b/gas/testsuite/gas/loongarch/illegal-operand.l @@ -1,108 +1,108 @@ .*: Assembler messages: -.*:2: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:3: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:4: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:5: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:6: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:7: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:8: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:9: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:10: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:11: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:12: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:13: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:14: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:15: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:16: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:17: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:18: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:19: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:20: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:21: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:22: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:23: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:24: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:25: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:26: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:27: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:28: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:29: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:30: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:31: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:32: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:33: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:34: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:35: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:36: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:37: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:38: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:39: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:40: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:41: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:42: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:43: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:44: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:45: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:46: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:47: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:48: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:49: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:50: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:51: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:52: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:53: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:54: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:55: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:56: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:57: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:58: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:59: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:60: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:61: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:62: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:63: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:64: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:65: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:66: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:67: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:68: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:69: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:70: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:71: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:72: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:73: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:74: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:75: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:76: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:77: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:78: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:79: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:80: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:81: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:82: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:83: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:84: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:85: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:86: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:87: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:88: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:89: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:90: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:91: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:92: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:93: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:94: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:95: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:96: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:97: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:98: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:99: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:100: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:101: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:102: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:103: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:104: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 -.*:105: Error: automic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:2: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:3: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:4: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:5: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:6: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:7: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:8: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:9: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:10: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:11: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:12: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:13: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:14: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:15: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:16: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:17: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:18: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:19: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:20: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:21: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:22: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:23: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:24: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:25: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:26: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:27: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:28: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:29: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:30: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:31: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:32: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:33: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:34: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:35: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:36: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:37: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:38: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:39: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:40: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:41: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:42: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:43: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:44: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:45: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:46: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:47: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:48: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:49: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:50: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:51: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:52: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:53: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:54: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:55: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:56: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:57: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:58: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:59: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:60: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:61: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:62: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:63: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:64: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:65: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:66: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:67: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:68: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:69: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:70: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:71: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:72: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:73: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:74: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:75: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:76: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:77: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:78: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:79: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:80: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:81: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:82: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:83: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:84: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:85: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:86: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:87: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:88: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:89: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:90: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:91: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:92: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:93: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:94: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:95: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:96: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:97: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:98: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:99: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:100: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:101: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:102: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:103: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:104: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 +.*:105: Error: atomic memory operations insns require rd != rj && rd != rk when rd isn't r0 .*:108: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd .*:109: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd .*:110: Error: bstr\(ins\|pick\)\.\[wd\] require msbd >= lsbd diff --git a/gas/testsuite/gas/loongarch/insn_expr.d b/gas/testsuite/gas/loongarch/insn_expr.d new file mode 100644 index 0000000..9abc711 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_expr.d @@ -0,0 +1,10 @@ +#as: +#objdump: -d + +.*: file format .* + + +Disassembly of section \.text: + +0+ <\.text>: + 0: 02c00ca4 addi.d \$a0, \$a1, 3 diff --git a/gas/testsuite/gas/loongarch/insn_expr.s b/gas/testsuite/gas/loongarch/insn_expr.s new file mode 100644 index 0000000..3b9ef08 --- /dev/null +++ b/gas/testsuite/gas/loongarch/insn_expr.s @@ -0,0 +1 @@ +addi.d $a0,$a1,(8 >> 2 + 1) diff --git a/gas/testsuite/gas/loongarch/large_addend.d b/gas/testsuite/gas/loongarch/large_addend.d new file mode 100644 index 0000000..18eb33a --- /dev/null +++ b/gas/testsuite/gas/loongarch/large_addend.d @@ -0,0 +1,12 @@ +#as: +#objdump: -r +#skip: loongarch32-*-* + +.*: file format elf64-loongarch + +RELOCATION RECORDS FOR \[\.text\]: +OFFSET TYPE VALUE +0000000000000000 R_LARCH_PCALA_HI20 _start\+0x7fffabcd12345678 +0000000000000004 R_LARCH_PCALA_LO12 _start\+0x7fffabcd12345678 +0000000000000008 R_LARCH_PCALA64_LO20 _start\+0x7fffabcd12345678 +000000000000000c R_LARCH_PCALA64_HI12 _start\+0x7fffabcd12345678 diff --git a/gas/testsuite/gas/loongarch/large_addend.s b/gas/testsuite/gas/loongarch/large_addend.s new file mode 100644 index 0000000..7db9052 --- /dev/null +++ b/gas/testsuite/gas/loongarch/large_addend.s @@ -0,0 +1,8 @@ + .text + .global _start +_start: + pcalau12i $a0, %pc_hi20(_start+0x7fffabcd12345678) + addi.d $a1, $zero, %pc_lo12(_start+0x7fffabcd12345678) + lu32i.d $a1, %pc64_lo20(_start+0x7fffabcd12345678) + lu52i.d $a1, $a1, %pc64_hi12(_start+0x7fffabcd12345678) + add.d $a0, $a1, $a0 diff --git a/gas/testsuite/gas/macros/arg1.d b/gas/testsuite/gas/macros/arg1.d new file mode 100644 index 0000000..adb24c9 --- /dev/null +++ b/gas/testsuite/gas/macros/arg1.d @@ -0,0 +1,9 @@ +#objdump: -s -j .data +# tic30 and tic4x have 4 octets per byte, tic54x has 2 octets per byte +#notarget: tic30-*-* tic4x-*-* tic54x-*-* +#xfail: tic6x-*-* + +.*: .* + +Contents of section .data: + 0000 10111213 14150000 00000000 00000000 .* diff --git a/gas/testsuite/gas/macros/arg1.s b/gas/testsuite/gas/macros/arg1.s new file mode 100644 index 0000000..7eecc97 --- /dev/null +++ b/gas/testsuite/gas/macros/arg1.s @@ -0,0 +1,13 @@ +/* Test expression argument with inner white spaces and a white space + before argument added by C preprocessor. */ + + .macro test arg1, arg2, arg3 + .byte \arg1 + .byte \arg2 + .byte \ arg3 + .endm + + .data + test 0x10 + 0, 0x10 + 1, 0x10 + 2 + test 0x10 + 3, 0x10 + 4, 0x15 + .byte 0,0,0,0,0,0,0,0,0,0 diff --git a/gas/testsuite/gas/macros/irpc-quote.s b/gas/testsuite/gas/macros/irpc-quote.s index 0499f69..0326196 100644 --- a/gas/testsuite/gas/macros/irpc-quote.s +++ b/gas/testsuite/gas/macros/irpc-quote.s @@ -1,6 +1,6 @@ - .irpc c, " ab" cd " ef" + .irpc c, " ab" cd " ef" "" .print ">\c<" .endr - .irpc c, "12 " 34 "56 " + .irpc c, "" "12 " 34 "56 " .print ">\c<" .endr diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp index bb5d4ab..3ac199f 100644 --- a/gas/testsuite/gas/macros/macros.exp +++ b/gas/testsuite/gas/macros/macros.exp @@ -29,6 +29,7 @@ run_dump_test test3 if { ![istarget *c54x*-*-*] && ![istarget *c4x*-*-*] && ![istarget "nds32*-*-*"] } { run_dump_test irp run_dump_test rept + run_list_test rept "-almn" run_dump_test repeat run_dump_test vararg } @@ -75,6 +76,8 @@ if { ![istarget tic30-*-*] } { run_list_test app6 "" } +run_dump_test arg1 + run_list_test badarg "" switch -glob $target_triplet { diff --git a/gas/testsuite/gas/macros/rept.l b/gas/testsuite/gas/macros/rept.l new file mode 100644 index 0000000..626e9dc --- /dev/null +++ b/gas/testsuite/gas/macros/rept.l @@ -0,0 +1,8 @@ +#... +[ ]*[1-9][0-9]*[ ]+\.rept 3 +[ ]*[1-9][0-9]*[ ]+\.long foo1 +[ ]*[1-9][0-9]*[ ]+\.endr +[ ]*[1-9][0-9]* 0000 [0 ]+> +\.long foo1 +[ ]*[1-9][0-9]* 000[48] [0 ]+> +\.long foo1 +[ ]*[1-9][0-9]* 00[01][08] [0 ]+> +\.long foo1 +#pass diff --git a/gas/testsuite/gas/mips/micromips.l b/gas/testsuite/gas/mips/micromips.l index 25112cd..9236782 100644 --- a/gas/testsuite/gas/mips/micromips.l +++ b/gas/testsuite/gas/mips/micromips.l @@ -64,18 +64,18 @@ .*:3133: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,16' .*:3134: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,20' .*:3135: Error: opcode not supported in the `insn32' mode `addiur2 \$17,\$17,24' -.*:3137: Error: opcode not supported in the `insn32' mode `addiusp 2<<2' -.*:3138: Error: opcode not supported in the `insn32' mode `addiusp 3<<2' -.*:3139: Error: opcode not supported in the `insn32' mode `addiusp 254<<2' -.*:3140: Error: opcode not supported in the `insn32' mode `addiusp 255<<2' -.*:3141: Error: opcode not supported in the `insn32' mode `addiusp 256<<2' -.*:3142: Error: opcode not supported in the `insn32' mode `addiusp 257<<2' -.*:3143: Error: opcode not supported in the `insn32' mode `addiusp -3<<2' -.*:3144: Error: opcode not supported in the `insn32' mode `addiusp -4<<2' -.*:3145: Error: opcode not supported in the `insn32' mode `addiusp -255<<2' -.*:3146: Error: opcode not supported in the `insn32' mode `addiusp -256<<2' -.*:3147: Error: opcode not supported in the `insn32' mode `addiusp -257<<2' -.*:3148: Error: opcode not supported in the `insn32' mode `addiusp -258<<2' +.*:3137: Error: opcode not supported in the `insn32' mode `addiusp 2 ?<< ?2' +.*:3138: Error: opcode not supported in the `insn32' mode `addiusp 3 ?<< ?2' +.*:3139: Error: opcode not supported in the `insn32' mode `addiusp 254 ?<< ?2' +.*:3140: Error: opcode not supported in the `insn32' mode `addiusp 255 ?<< ?2' +.*:3141: Error: opcode not supported in the `insn32' mode `addiusp 256 ?<< ?2' +.*:3142: Error: opcode not supported in the `insn32' mode `addiusp 257 ?<< ?2' +.*:3143: Error: opcode not supported in the `insn32' mode `addiusp -3 ?<< ?2' +.*:3144: Error: opcode not supported in the `insn32' mode `addiusp -4 ?<< ?2' +.*:3145: Error: opcode not supported in the `insn32' mode `addiusp -255 ?<< ?2' +.*:3146: Error: opcode not supported in the `insn32' mode `addiusp -256 ?<< ?2' +.*:3147: Error: opcode not supported in the `insn32' mode `addiusp -257 ?<< ?2' +.*:3148: Error: opcode not supported in the `insn32' mode `addiusp -258 ?<< ?2' .*:3150: Error: opcode not supported in the `insn32' mode `addius5 \$0,0' .*:3151: Error: opcode not supported in the `insn32' mode `addius5 \$2,0' .*:3152: Error: opcode not supported in the `insn32' mode `addius5 \$3,0' diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l index 45b31d6..28f8db4 100644 --- a/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l +++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-e.l @@ -117,12 +117,12 @@ .*:171: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$29,0' .*:172: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$29,\$29,0' .*:174: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,\.-3' +.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.e \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,0' .*:177: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,0' .*:179: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.e \$16,\.-1' +.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.e \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.e \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.e \$16,\$sp,0' .*:10: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l index a632d59..23c5d50 100644 --- a/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l +++ b/gas/testsuite/gas/mips/mips16-32@mips16-insn-t.l @@ -44,11 +44,11 @@ .*:171: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$29,0' .*:172: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$29,\$29,0' .*:174: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,\.-3' +.*:175: Error: opcode not supported on this processor: mips1 \(mips1\) `ld\.t \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,0' .*:177: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,0' .*:179: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.t \$16,\.-1' +.*:181: Error: opcode not supported on this processor: mips1 \(mips1\) `dla\.t \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: mips1 \(mips1\) `daddiu\.t \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: mips1 \(mips1\) `daddu\.t \$16,\$sp,0' diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l index a66cc35..5bff2ef 100644 --- a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l +++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-e.l @@ -115,12 +115,12 @@ .*:171: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$29,0' .*:172: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$29,\$29,0' .*:174: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,\.-3' +.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.e \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,0' .*:177: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,0' .*:179: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.e \$16,\.-1' +.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.e \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.e \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.e \$16,\$sp,0' .*:10: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l index 69ce411..48cc51d 100644 --- a/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l +++ b/gas/testsuite/gas/mips/mips16e-32@mips16-insn-t.l @@ -33,11 +33,11 @@ .*:171: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$29,0' .*:172: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$29,\$29,0' .*:174: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,\.-3' +.*:175: Error: opcode not supported on this processor: mips32 \(mips32\) `ld\.t \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,0' .*:177: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,0' .*:179: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.t \$16,\.-1' +.*:181: Error: opcode not supported on this processor: mips32 \(mips32\) `dla\.t \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: mips32 \(mips32\) `daddiu\.t \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: mips32 \(mips32\) `daddu\.t \$16,\$sp,0' diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l index 095e0b0..fe16cb2 100644 --- a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-e.l @@ -115,12 +115,12 @@ .*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,0' .*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$29,\$29,0' .*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,\.-3' +.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.e \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,0' .*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,0' .*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.e \$16,\.-1' +.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.e \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.e \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.e \$16,\$sp,0' .*:10: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l index 0fd848d..57a6e3b 100644 --- a/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l +++ b/gas/testsuite/gas/mips/mips16e2-32@mips16-insn-t.l @@ -33,11 +33,11 @@ .*:171: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,0' .*:172: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$29,\$29,0' .*:174: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,\.-3' +.*:175: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `ld\.t \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,0' .*:177: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,0' .*:179: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.t \$16,\.-1' +.*:181: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dla\.t \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddiu\.t \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `daddu\.t \$16,\$sp,0' diff --git a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l index a0c55df..af9c563 100644 --- a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l +++ b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-e.l @@ -115,12 +115,12 @@ .*:171: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$29,0' .*:172: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$29,\$29,0' .*:174: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.e \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.e \$16,\.-3' +.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.e \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.e \$16,0' .*:177: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$16,0' .*:179: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.e \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.e \$16,\.-1' +.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.e \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.e \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.e \$16,\$sp,0' .*:10: Warning: extended operand requested but not required diff --git a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l index 67330c5..bd449f1 100644 --- a/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l +++ b/gas/testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16-insn-t.l @@ -33,11 +33,11 @@ .*:171: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$29,0' .*:172: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$29,\$29,0' .*:174: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.t \$16,0\(\$pc\)' -.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.t \$16,\.-3' +.*:175: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `ld\.t \$16,\. ?- ?3' .*:176: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.t \$16,0' .*:177: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$16,0' .*:179: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.t \$16,\$pc,0' .*:180: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$16,\$pc,0' -.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.t \$16,\.-1' +.*:181: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `dla\.t \$16,\. ?- ?1' .*:182: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddiu\.t \$16,\$sp,0' .*:183: Error: opcode not supported on this processor: interaptiv-mr2 \(mips32r3\) `daddu\.t \$16,\$sp,0' diff --git a/gas/testsuite/gas/mips/mips16e2@lui-2.l b/gas/testsuite/gas/mips/mips16e2@lui-2.l index f83b9c8..033bd17 100644 --- a/gas/testsuite/gas/mips/mips16e2@lui-2.l +++ b/gas/testsuite/gas/mips/mips16e2@lui-2.l @@ -1,5 +1,5 @@ .*: Assembler messages: -.*:7: Error: operand 2 must be constant `lui \$2,bar-foo' -.*:8: Error: operand 2 must be constant `lui \$2,baz-bar' -.*:9: Error: operand 2 must be constant `lui \$2,foo-baz' -.*:10: Error: operand 2 must be constant `lui \$2,bar/baz' +.*:7: Error: operand 2 must be constant `lui \$2,bar ?- ?foo' +.*:8: Error: operand 2 must be constant `lui \$2,baz ?- ?bar' +.*:9: Error: operand 2 must be constant `lui \$2,foo ?- ?baz' +.*:10: Error: operand 2 must be constant `lui \$2,bar ?/ ?baz' diff --git a/gas/testsuite/gas/mips/unaligned-branch-1.s b/gas/testsuite/gas/mips/unaligned-branch-1.s index b99a63e..bc976a2 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-1.s +++ b/gas/testsuite/gas/mips/unaligned-branch-1.s @@ -116,7 +116,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -127,7 +127,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-2.s b/gas/testsuite/gas/mips/unaligned-branch-2.s index 9a60d27..2f892c7 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-2.s +++ b/gas/testsuite/gas/mips/unaligned-branch-2.s @@ -117,7 +117,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -129,7 +129,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s b/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s index ada5283..bec74ed 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s +++ b/gas/testsuite/gas/mips/unaligned-branch-micromips-1.s @@ -181,7 +181,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -192,7 +192,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s b/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s index f3f3980..e65601e 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s +++ b/gas/testsuite/gas/mips/unaligned-branch-micromips-2.s @@ -182,7 +182,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -194,7 +194,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s b/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s index 6bc8b29..d4fad96 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s +++ b/gas/testsuite/gas/mips/unaligned-branch-mips16-1.s @@ -85,7 +85,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -96,7 +96,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s b/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s index 5476cae..0a6e553 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s +++ b/gas/testsuite/gas/mips/unaligned-branch-mips16-2.s @@ -86,7 +86,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -98,7 +98,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-1.s b/gas/testsuite/gas/mips/unaligned-branch-r6-1.s index 0e48b29..1e5960c 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-r6-1.s +++ b/gas/testsuite/gas/mips/unaligned-branch-r6-1.s @@ -118,7 +118,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -129,7 +129,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-2.s b/gas/testsuite/gas/mips/unaligned-branch-r6-2.s index c160701..dc89ea0 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-r6-2.s +++ b/gas/testsuite/gas/mips/unaligned-branch-r6-2.s @@ -118,7 +118,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -129,7 +129,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-3.s b/gas/testsuite/gas/mips/unaligned-branch-r6-3.s index 62adac2..beb5912 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-r6-3.s +++ b/gas/testsuite/gas/mips/unaligned-branch-r6-3.s @@ -119,7 +119,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -131,7 +131,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-branch-r6-4.s b/gas/testsuite/gas/mips/unaligned-branch-r6-4.s index cb5ef69..26a905a 100644 --- a/gas/testsuite/gas/mips/unaligned-branch-r6-4.s +++ b/gas/testsuite/gas/mips/unaligned-branch-r6-4.s @@ -119,7 +119,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -131,7 +131,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-jump-1.s b/gas/testsuite/gas/mips/unaligned-jump-1.s index 13f85c7..bfdd0d3 100644 --- a/gas/testsuite/gas/mips/unaligned-jump-1.s +++ b/gas/testsuite/gas/mips/unaligned-jump-1.s @@ -116,7 +116,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -127,7 +127,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-jump-2.s b/gas/testsuite/gas/mips/unaligned-jump-2.s index b2a60ab..f6a951d 100644 --- a/gas/testsuite/gas/mips/unaligned-jump-2.s +++ b/gas/testsuite/gas/mips/unaligned-jump-2.s @@ -117,7 +117,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -129,7 +129,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s b/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s index 4ecfc6f..07d0a58 100644 --- a/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s +++ b/gas/testsuite/gas/mips/unaligned-jump-micromips-1.s @@ -149,7 +149,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -160,7 +160,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s b/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s index 9dff6a1..9865f2e 100644 --- a/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s +++ b/gas/testsuite/gas/mips/unaligned-jump-micromips-2.s @@ -150,7 +150,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -162,7 +162,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s b/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s index bed5ded..3292640 100644 --- a/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s +++ b/gas/testsuite/gas/mips/unaligned-jump-mips16-1.s @@ -85,7 +85,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -96,7 +96,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s b/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s index d6dd5ee..c2b15aa 100644 --- a/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s +++ b/gas/testsuite/gas/mips/unaligned-jump-mips16-2.s @@ -86,7 +86,7 @@ bar\@ : .byte 0 .size bar\@, . - bar\@ .if \n - 1 - obj (\n - 1) + obj \n - 1 .endif .endm @@ -98,7 +98,7 @@ bar\@ : .hword 0 .size bar\@, . - bar\@ .if \n - 1 - fun (\n - 1) + fun \n - 1 .endif .endm diff --git a/gas/testsuite/gas/pru/pr32073.d b/gas/testsuite/gas/pru/pr32073.d new file mode 100644 index 0000000..ac353bd --- /dev/null +++ b/gas/testsuite/gas/pru/pr32073.d @@ -0,0 +1,11 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: whitespace parsing + +# Test the whitespace parsing + +.*: +file format elf32-pru + +Disassembly of section .text: +0+0000 <[^>]*> 1300e2e1 mov r1, sp +0+0004 <[^>]*> 1300e2e1 mov r1, sp +0+0008 <[^>]*> 1300e2e1 mov r1, sp diff --git a/gas/testsuite/gas/pru/pr32073.s b/gas/testsuite/gas/pru/pr32073.s new file mode 100644 index 0000000..ebfab23 --- /dev/null +++ b/gas/testsuite/gas/pru/pr32073.s @@ -0,0 +1,6 @@ +# Source file used to test the whitespace parsing. + +foo: + mov r1 /* comment */, r2 /* ... */ + mov r1 /* comment */, r2 /* ... */ + mov /* x */ r1 /* comment */ , r2 /* ... */ diff --git a/gas/testsuite/gas/riscv/mapping.s b/gas/testsuite/gas/riscv/mapping.s index 3014a69..6882a9e 100644 --- a/gas/testsuite/gas/riscv/mapping.s +++ b/gas/testsuite/gas/riscv/mapping.s @@ -1,7 +1,4 @@ .attribute arch, "rv32ic" -.option norelax # FIXME: assembler fill the paddings after parsing everything, - # so we probably won't fill anything for the norelax region when - # the riscv_opts.relax is enabled at somewhere. .section .text.cross.section.A, "ax" .option push diff --git a/gas/testsuite/gas/riscv/march-help.l b/gas/testsuite/gas/riscv/march-help.l index 0d9b4c9..0c33d1e 100644 --- a/gas/testsuite/gas/riscv/march-help.l +++ b/gas/testsuite/gas/riscv/march-help.l @@ -137,6 +137,7 @@ All available -march extensions for RISC-V: xcvelw 1.0 xcvmac 1.0 xcvmem 1.0 + xcvsimd 1.0 xtheadba 1.0 xtheadbb 1.0 xtheadbs 1.0 diff --git a/gas/testsuite/gas/riscv/option-arch-01.s b/gas/testsuite/gas/riscv/option-arch-01.s deleted file mode 100644 index 50285fc..0000000 --- a/gas/testsuite/gas/riscv/option-arch-01.s +++ /dev/null @@ -1,10 +0,0 @@ -.attribute arch, "rv64ic" -add a0, a0, a1 -.option push -.option arch, +d2p0, -c, +xvendor1p0 -add a0, a0, a1 -frcsr a0 # Should add mapping symbol with ISA here, and then dump it to frcsr. -.option push -.option arch, +m3p0, +d3p0 -.option pop -.option pop diff --git a/gas/testsuite/gas/riscv/option-arch-01a.d b/gas/testsuite/gas/riscv/option-arch-01a.d deleted file mode 100644 index 1d14c60..0000000 --- a/gas/testsuite/gas/riscv/option-arch-01a.d +++ /dev/null @@ -1,14 +0,0 @@ -#as: -misa-spec=2.2 -#source: option-arch-01.s -#objdump: -d - -.*:[ ]+file format .* - - -Disassembly of section .text: - -0+000 <.text>: -[ ]+[0-9a-f]+:[ ]+952e[ ]+add[ ]+a0,a0,a1 -[ ]+[0-9a-f]+:[ ]+00b50533[ ]+add[ ]+a0,a0,a1 -[ ]+[0-9a-f]+:[ ]+00302573[ ]+frcsr[ ]+a0 -#... diff --git a/gas/testsuite/gas/riscv/option-arch-02.d b/gas/testsuite/gas/riscv/option-arch-02.d deleted file mode 100644 index 3c27419..0000000 --- a/gas/testsuite/gas/riscv/option-arch-02.d +++ /dev/null @@ -1,8 +0,0 @@ -#as: -misa-spec=2.2 -#readelf: -A -#source: option-arch-02.s - -Attribute Section: riscv -File Attributes - Tag_RISCV_arch: "rv64i2p0_m3p0_f2p0_d3p0_c2p0_zmmul1p0_xvendor32x3p0" -#... diff --git a/gas/testsuite/gas/riscv/option-arch-02.s b/gas/testsuite/gas/riscv/option-arch-02.s deleted file mode 100644 index e0f5de3..0000000 --- a/gas/testsuite/gas/riscv/option-arch-02.s +++ /dev/null @@ -1,8 +0,0 @@ -.attribute arch, "rv64ic" -add a0, a0, a1 -.option push -.option arch, +d2p0, -c, +xvendor1p0 -add a0, a0, a1 -frcsr a0 -.option pop -.option arch, +m3p0, +d3p0, +xvendor32x3p0 diff --git a/gas/testsuite/gas/riscv/option-arch-03.d b/gas/testsuite/gas/riscv/option-arch-03.d deleted file mode 100644 index 62d7f7d..0000000 --- a/gas/testsuite/gas/riscv/option-arch-03.d +++ /dev/null @@ -1,8 +0,0 @@ -#as: -#readelf: -A -#source: option-arch-03.s - -Attribute Section: riscv -File Attributes - Tag_RISCV_arch: "rv32i2p1_c2p0" -#... diff --git a/gas/testsuite/gas/riscv/option-arch-03.s b/gas/testsuite/gas/riscv/option-arch-03.s deleted file mode 100644 index ccdb1c3..0000000 --- a/gas/testsuite/gas/riscv/option-arch-03.s +++ /dev/null @@ -1,3 +0,0 @@ -.attribute arch, "rv64ic" -.option arch, +d2p0, -c -.option arch, rv32i2p1c2p0 diff --git a/gas/testsuite/gas/riscv/option-arch-01b.d b/gas/testsuite/gas/riscv/option-arch-attr.d index 8f4284d..8c1f665 100644 --- a/gas/testsuite/gas/riscv/option-arch-01b.d +++ b/gas/testsuite/gas/riscv/option-arch-attr.d @@ -1,8 +1,7 @@ #as: -misa-spec=2.2 +#source: option-arch.s #readelf: -A -#source: option-arch-01.s Attribute Section: riscv File Attributes Tag_RISCV_arch: "rv64i2p0_c2p0" -#... diff --git a/gas/testsuite/gas/riscv/option-arch-dis.d b/gas/testsuite/gas/riscv/option-arch-dis.d new file mode 100644 index 0000000..6768fe7 --- /dev/null +++ b/gas/testsuite/gas/riscv/option-arch-dis.d @@ -0,0 +1,26 @@ +#as: -misa-spec=2.2 +#source: option-arch.s +#objdump: -d --syms --special-syms + +.*:[ ]+file format .* + +SYMBOL TABLE: +0+00 l d .text 0+00 .text +0+00 l d .data 0+00 .data +0+00 l d .bss 0+00 .bss +0+00 l .text 0+00 \$xrv64i2p0_c2p0 +0+02 l .text 0+00 \$xrv64i2p0_f2p0_d2p0_xvendor1p0 +0+0a l .text 0+00 \$xrv64i2p0_m3p0_f2p0_d3p0_c2p0_zmmul1p0_xvendor32x3p0 +0+0c l .text 0+00 \$xrv32i2p1_c2p0 +0+00 l d .riscv.attributes 0+00 .riscv.attributes + + +Disassembly of section .text: + +0+000 <.text>: +[ ]+0:[ ]+952e[ ]+add[ ]+a0,a0,a1 +[ ]+2:[ ]+00b50533[ ]+add[ ]+a0,a0,a1 +[ ]+6:[ ]+00302573[ ]+frcsr[ ]+a0 +[ ]+a:[ ]+952e[ ]+add[ ]+a0,a0,a1 +[ ]+c:[ ]+c8002573[ ]+.insn[ ]+4, 0xc8002573 +#... diff --git a/gas/testsuite/gas/riscv/option-arch.s b/gas/testsuite/gas/riscv/option-arch.s new file mode 100644 index 0000000..4d2d261 --- /dev/null +++ b/gas/testsuite/gas/riscv/option-arch.s @@ -0,0 +1,11 @@ +.attribute arch, "rv64ic" # file-level, rv64ic +add a0, a0, a1 +.option push +.option arch, +d2p0, -c, +xvendor1p0 +add a0, a0, a1 # func-level, rv64i_d2p0_xvendor1p0 +frcsr a0 +.option pop +.option arch, +m3p0, +d3p0, +xvendor32x3p0 +add a0, a0, a1 # func-level, rv64i_m3p0_d3p0_c_xvendor32x3p0 +.option arch, rv32i2p1c2p0 # FIXME: maybe we should adjust xlen in dis-assembler according to mappin symbols? +rdcycleh a0 # func-level, rv32i2p1_c2p0 diff --git a/gas/testsuite/gas/riscv/x-cv-simd-fail.d b/gas/testsuite/gas/riscv/x-cv-simd-fail.d new file mode 100644 index 0000000..57e2f83 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-cv-simd-fail.d @@ -0,0 +1,3 @@ +#as: -march=rv32i_xcvsimd +#source: x-cv-simd-fail.s +#error_output: x-cv-simd-fail.l diff --git a/gas/testsuite/gas/riscv/x-cv-simd-fail.l b/gas/testsuite/gas/riscv/x-cv-simd-fail.l new file mode 100644 index 0000000..c2fd00b --- /dev/null +++ b/gas/testsuite/gas/riscv/x-cv-simd-fail.l @@ -0,0 +1,583 @@ +.*: Assembler messages: +.*: Error: illegal operands `cv.abs.b x32,x32' +.*: Error: illegal operands `cv.abs.b x33,x33' +.*: Error: illegal operands `cv.abs.h x32,x32' +.*: Error: illegal operands `cv.abs.h x33,x33' +.*: Error: illegal operands `cv.add.b x32,x32,x32' +.*: Error: illegal operands `cv.add.b x33,x33,x33' +.*: Error: illegal operands `cv.add.div2 x32,x32,x32' +.*: Error: illegal operands `cv.add.div2 x33,x33,x33' +.*: Error: illegal operands `cv.add.div4 x32,x32,x32' +.*: Error: illegal operands `cv.add.div4 x33,x33,x33' +.*: Error: illegal operands `cv.add.div8 x32,x32,x32' +.*: Error: illegal operands `cv.add.div8 x33,x33,x33' +.*: Error: illegal operands `cv.add.h x32,x32,x32' +.*: Error: illegal operands `cv.add.h x33,x33,x33' +.*: Error: illegal operands `cv.add.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.add.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.add.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.add.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.add.sci.b x32,x32,20' +.*: Error: illegal operands `cv.add.sci.b x33,x33,20' +.*: Error: illegal operands `cv.add.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.add.sci.b x6,x7,32' +.*: Error: illegal operands `cv.add.sci.h x32,x32,20' +.*: Error: illegal operands `cv.add.sci.h x33,x33,20' +.*: Error: illegal operands `cv.add.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.add.sci.h x6,x7,32' +.*: Error: illegal operands `cv.and.b x32,x32,x32' +.*: Error: illegal operands `cv.and.b x33,x33,x33' +.*: Error: illegal operands `cv.and.h x32,x32,x32' +.*: Error: illegal operands `cv.and.h x33,x33,x33' +.*: Error: illegal operands `cv.and.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.and.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.and.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.and.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.and.sci.b x32,x32,20' +.*: Error: illegal operands `cv.and.sci.b x33,x33,20' +.*: Error: illegal operands `cv.and.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.and.sci.b x6,x7,32' +.*: Error: illegal operands `cv.and.sci.h x32,x32,20' +.*: Error: illegal operands `cv.and.sci.h x33,x33,20' +.*: Error: illegal operands `cv.and.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.and.sci.h x6,x7,32' +.*: Error: illegal operands `cv.avg.b x32,x32,x32' +.*: Error: illegal operands `cv.avg.b x33,x33,x33' +.*: Error: illegal operands `cv.avg.h x32,x32,x32' +.*: Error: illegal operands `cv.avg.h x33,x33,x33' +.*: Error: illegal operands `cv.avg.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.avg.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.avg.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.avg.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.avg.sci.b x32,x32,20' +.*: Error: illegal operands `cv.avg.sci.b x33,x33,20' +.*: Error: illegal operands `cv.avg.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.avg.sci.b x6,x7,32' +.*: Error: illegal operands `cv.avg.sci.h x32,x32,20' +.*: Error: illegal operands `cv.avg.sci.h x33,x33,20' +.*: Error: illegal operands `cv.avg.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.avg.sci.h x6,x7,32' +.*: Error: illegal operands `cv.avgu.b x32,x32,x32' +.*: Error: illegal operands `cv.avgu.b x33,x33,x33' +.*: Error: illegal operands `cv.avgu.h x32,x32,x32' +.*: Error: illegal operands `cv.avgu.h x33,x33,x33' +.*: Error: illegal operands `cv.avgu.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.avgu.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.avgu.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.avgu.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.avgu.sci.b x32,x32,20' +.*: Error: illegal operands `cv.avgu.sci.b x33,x33,20' +.*: Error: illegal operands `cv.avgu.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.avgu.sci.b x6,x7,64' +.*: Error: illegal operands `cv.avgu.sci.h x32,x32,20' +.*: Error: illegal operands `cv.avgu.sci.h x33,x33,20' +.*: Error: illegal operands `cv.avgu.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.avgu.sci.h x6,x7,64' +.*: Error: illegal operands `cv.cmpeq.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpeq.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpeq.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpeq.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpeq.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpeq.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpeq.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpeq.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpeq.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpeq.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpeq.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.cmpeq.sci.b x6,x7,32' +.*: Error: illegal operands `cv.cmpeq.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpeq.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpeq.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.cmpeq.sci.h x6,x7,32' +.*: Error: illegal operands `cv.cmpge.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpge.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpge.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpge.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpge.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpge.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpge.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpge.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpge.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpge.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpge.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.cmpge.sci.b x6,x7,32' +.*: Error: illegal operands `cv.cmpge.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpge.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpge.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.cmpge.sci.h x6,x7,32' +.*: Error: illegal operands `cv.cmpgeu.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpgeu.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpgeu.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpgeu.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpgeu.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpgeu.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpgeu.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpgeu.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpgeu.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpgeu.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpgeu.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.cmpgeu.sci.b x6,x7,64' +.*: Error: illegal operands `cv.cmpgeu.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpgeu.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpgeu.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.cmpgeu.sci.h x6,x7,64' +.*: Error: illegal operands `cv.cmpgt.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpgt.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpgt.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpgt.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpgt.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpgt.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpgt.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpgt.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpgt.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpgt.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpgt.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.cmpgt.sci.b x6,x7,32' +.*: Error: illegal operands `cv.cmpgt.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpgt.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpgt.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.cmpgt.sci.h x6,x7,32' +.*: Error: illegal operands `cv.cmpgtu.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpgtu.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpgtu.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpgtu.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpgtu.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpgtu.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpgtu.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpgtu.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpgtu.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpgtu.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpgtu.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.cmpgtu.sci.b x6,x7,64' +.*: Error: illegal operands `cv.cmpgtu.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpgtu.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpgtu.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.cmpgtu.sci.h x6,x7,64' +.*: Error: illegal operands `cv.cmple.b x32,x32,x32' +.*: Error: illegal operands `cv.cmple.b x33,x33,x33' +.*: Error: illegal operands `cv.cmple.h x32,x32,x32' +.*: Error: illegal operands `cv.cmple.h x33,x33,x33' +.*: Error: illegal operands `cv.cmple.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmple.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmple.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmple.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmple.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmple.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmple.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.cmple.sci.b x6,x7,32' +.*: Error: illegal operands `cv.cmple.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmple.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmple.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.cmple.sci.h x6,x7,32' +.*: Error: illegal operands `cv.cmpleu.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpleu.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpleu.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpleu.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpleu.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpleu.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpleu.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpleu.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpleu.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpleu.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpleu.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.cmpleu.sci.b x6,x7,64' +.*: Error: illegal operands `cv.cmpleu.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpleu.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpleu.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.cmpleu.sci.h x6,x7,64' +.*: Error: illegal operands `cv.cmplt.b x32,x32,x32' +.*: Error: illegal operands `cv.cmplt.b x33,x33,x33' +.*: Error: illegal operands `cv.cmplt.h x32,x32,x32' +.*: Error: illegal operands `cv.cmplt.h x33,x33,x33' +.*: Error: illegal operands `cv.cmplt.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmplt.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmplt.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmplt.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmplt.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmplt.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmplt.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.cmplt.sci.b x6,x7,32' +.*: Error: illegal operands `cv.cmplt.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmplt.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmplt.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.cmplt.sci.h x6,x7,32' +.*: Error: illegal operands `cv.cmpltu.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpltu.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpltu.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpltu.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpltu.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpltu.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpltu.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpltu.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpltu.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpltu.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpltu.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.cmpltu.sci.b x6,x7,64' +.*: Error: illegal operands `cv.cmpltu.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpltu.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpltu.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.cmpltu.sci.h x6,x7,64' +.*: Error: illegal operands `cv.cmpne.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpne.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpne.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpne.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpne.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.cmpne.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.cmpne.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.cmpne.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.cmpne.sci.b x32,x32,20' +.*: Error: illegal operands `cv.cmpne.sci.b x33,x33,20' +.*: Error: illegal operands `cv.cmpne.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.cmpne.sci.b x6,x7,32' +.*: Error: illegal operands `cv.cmpne.sci.h x32,x32,20' +.*: Error: illegal operands `cv.cmpne.sci.h x33,x33,20' +.*: Error: illegal operands `cv.cmpne.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.cmpne.sci.h x6,x7,32' +.*: Error: illegal operands `cv.cplxconj x32,x32' +.*: Error: illegal operands `cv.cplxconj x33,x33' +.*: Error: illegal operands `cv.cplxmul.i.div2 x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.i.div2 x33,x33,x33' +.*: Error: illegal operands `cv.cplxmul.i.div4 x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.i.div4 x33,x33,x33' +.*: Error: illegal operands `cv.cplxmul.i.div8 x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.i.div8 x33,x33,x33' +.*: Error: illegal operands `cv.cplxmul.i x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.i x33,x33,x33' +.*: Error: illegal operands `cv.cplxmul.r.div2 x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.r.div2 x33,x33,x33' +.*: Error: illegal operands `cv.cplxmul.r.div4 x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.r.div4 x33,x33,x33' +.*: Error: illegal operands `cv.cplxmul.r.div8 x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.r.div8 x33,x33,x33' +.*: Error: illegal operands `cv.cplxmul.r x32,x32,x32' +.*: Error: illegal operands `cv.cplxmul.r x33,x33,x33' +.*: Error: illegal operands `cv.dotsp.b x32,x32,x32' +.*: Error: illegal operands `cv.dotsp.b x33,x33,x33' +.*: Error: illegal operands `cv.dotsp.h x32,x32,x32' +.*: Error: illegal operands `cv.dotsp.h x33,x33,x33' +.*: Error: illegal operands `cv.dotsp.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.dotsp.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.dotsp.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.dotsp.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.dotsp.sci.b x32,x32,20' +.*: Error: illegal operands `cv.dotsp.sci.b x33,x33,20' +.*: Error: illegal operands `cv.dotsp.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.dotsp.sci.b x6,x7,32' +.*: Error: illegal operands `cv.dotsp.sci.h x32,x32,20' +.*: Error: illegal operands `cv.dotsp.sci.h x33,x33,20' +.*: Error: illegal operands `cv.dotsp.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.dotsp.sci.h x6,x7,32' +.*: Error: illegal operands `cv.dotup.b x32,x32,x32' +.*: Error: illegal operands `cv.dotup.b x33,x33,x33' +.*: Error: illegal operands `cv.dotup.h x32,x32,x32' +.*: Error: illegal operands `cv.dotup.h x33,x33,x33' +.*: Error: illegal operands `cv.dotup.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.dotup.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.dotup.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.dotup.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.dotup.sci.b x32,x32,20' +.*: Error: illegal operands `cv.dotup.sci.b x33,x33,20' +.*: Error: illegal operands `cv.dotup.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.dotup.sci.b x6,x7,64' +.*: Error: illegal operands `cv.dotup.sci.h x32,x32,20' +.*: Error: illegal operands `cv.dotup.sci.h x33,x33,20' +.*: Error: illegal operands `cv.dotup.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.dotup.sci.h x6,x7,64' +.*: Error: illegal operands `cv.dotusp.b x32,x32,x32' +.*: Error: illegal operands `cv.dotusp.b x33,x33,x33' +.*: Error: illegal operands `cv.dotusp.h x32,x32,x32' +.*: Error: illegal operands `cv.dotusp.h x33,x33,x33' +.*: Error: illegal operands `cv.dotusp.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.dotusp.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.dotusp.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.dotusp.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.dotusp.sci.b x32,x32,20' +.*: Error: illegal operands `cv.dotusp.sci.b x33,x33,20' +.*: Error: illegal operands `cv.dotusp.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.dotusp.sci.b x6,x7,32' +.*: Error: illegal operands `cv.dotusp.sci.h x32,x32,20' +.*: Error: illegal operands `cv.dotusp.sci.h x33,x33,20' +.*: Error: illegal operands `cv.dotusp.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.dotusp.sci.h x6,x7,32' +.*: Error: illegal operands `cv.extract.b x32,x32,2' +.*: Error: illegal operands `cv.extract.b x33,x33,2' +.*: Error: illegal operands `cv.extract.b x6,x7,-1' +.*: Error: illegal operands `cv.extract.b x6,x7,4' +.*: Error: illegal operands `cv.extract.h x32,x32,1' +.*: Error: illegal operands `cv.extract.h x33,x33,1' +.*: Error: illegal operands `cv.extract.h x6,x7,-1' +.*: Error: illegal operands `cv.extract.h x6,x7,2' +.*: Error: illegal operands `cv.extractu.b x32,x32,2' +.*: Error: illegal operands `cv.extractu.b x33,x33,2' +.*: Error: illegal operands `cv.extractu.b x6,x7,-1' +.*: Error: illegal operands `cv.extractu.b x6,x7,4' +.*: Error: illegal operands `cv.extractu.h x32,x32,1' +.*: Error: illegal operands `cv.extractu.h x33,x33,1' +.*: Error: illegal operands `cv.extractu.h x6,x7,-1' +.*: Error: illegal operands `cv.extractu.h x6,x7,2' +.*: Error: illegal operands `cv.insert.b x32,x32,2' +.*: Error: illegal operands `cv.insert.b x33,x33,2' +.*: Error: illegal operands `cv.insert.b x6,x7,-1' +.*: Error: illegal operands `cv.insert.b x6,x7,4' +.*: Error: illegal operands `cv.insert.h x32,x32,1' +.*: Error: illegal operands `cv.insert.h x33,x33,1' +.*: Error: illegal operands `cv.insert.h x6,x7,-1' +.*: Error: illegal operands `cv.insert.h x6,x7,2' +.*: Error: illegal operands `cv.max.b x32,x32,x32' +.*: Error: illegal operands `cv.max.b x33,x33,x33' +.*: Error: illegal operands `cv.max.h x32,x32,x32' +.*: Error: illegal operands `cv.max.h x33,x33,x33' +.*: Error: illegal operands `cv.max.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.max.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.max.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.max.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.max.sci.b x32,x32,20' +.*: Error: illegal operands `cv.max.sci.b x33,x33,20' +.*: Error: illegal operands `cv.max.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.max.sci.b x6,x7,32' +.*: Error: illegal operands `cv.max.sci.h x32,x32,20' +.*: Error: illegal operands `cv.max.sci.h x33,x33,20' +.*: Error: illegal operands `cv.max.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.max.sci.h x6,x7,32' +.*: Error: illegal operands `cv.maxu.b x32,x32,x32' +.*: Error: illegal operands `cv.maxu.b x33,x33,x33' +.*: Error: illegal operands `cv.maxu.h x32,x32,x32' +.*: Error: illegal operands `cv.maxu.h x33,x33,x33' +.*: Error: illegal operands `cv.maxu.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.maxu.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.maxu.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.maxu.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.maxu.sci.b x32,x32,20' +.*: Error: illegal operands `cv.maxu.sci.b x33,x33,20' +.*: Error: illegal operands `cv.maxu.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.maxu.sci.b x6,x7,64' +.*: Error: illegal operands `cv.maxu.sci.h x32,x32,20' +.*: Error: illegal operands `cv.maxu.sci.h x33,x33,20' +.*: Error: illegal operands `cv.maxu.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.maxu.sci.h x6,x7,64' +.*: Error: illegal operands `cv.min.b x32,x32,x32' +.*: Error: illegal operands `cv.min.b x33,x33,x33' +.*: Error: illegal operands `cv.min.h x32,x32,x32' +.*: Error: illegal operands `cv.min.h x33,x33,x33' +.*: Error: illegal operands `cv.min.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.min.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.min.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.min.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.min.sci.b x32,x32,20' +.*: Error: illegal operands `cv.min.sci.b x33,x33,20' +.*: Error: illegal operands `cv.min.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.min.sci.b x6,x7,32' +.*: Error: illegal operands `cv.min.sci.h x32,x32,20' +.*: Error: illegal operands `cv.min.sci.h x33,x33,20' +.*: Error: illegal operands `cv.min.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.min.sci.h x6,x7,32' +.*: Error: illegal operands `cv.minu.b x32,x32,x32' +.*: Error: illegal operands `cv.minu.b x33,x33,x33' +.*: Error: illegal operands `cv.minu.h x32,x32,x32' +.*: Error: illegal operands `cv.minu.h x33,x33,x33' +.*: Error: illegal operands `cv.minu.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.minu.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.minu.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.minu.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.minu.sci.b x32,x32,20' +.*: Error: illegal operands `cv.minu.sci.b x33,x33,20' +.*: Error: illegal operands `cv.minu.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.minu.sci.b x6,x7,64' +.*: Error: illegal operands `cv.minu.sci.h x32,x32,20' +.*: Error: illegal operands `cv.minu.sci.h x33,x33,20' +.*: Error: illegal operands `cv.minu.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.minu.sci.h x6,x7,64' +.*: Error: illegal operands `cv.or.b x32,x32,x32' +.*: Error: illegal operands `cv.or.b x33,x33,x33' +.*: Error: illegal operands `cv.or.h x32,x32,x32' +.*: Error: illegal operands `cv.or.h x33,x33,x33' +.*: Error: illegal operands `cv.or.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.or.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.or.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.or.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.or.sci.b x32,x32,20' +.*: Error: illegal operands `cv.or.sci.b x33,x33,20' +.*: Error: illegal operands `cv.or.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.or.sci.b x6,x7,32' +.*: Error: illegal operands `cv.or.sci.h x32,x32,20' +.*: Error: illegal operands `cv.or.sci.h x33,x33,20' +.*: Error: illegal operands `cv.or.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.or.sci.h x6,x7,32' +.*: Error: illegal operands `cv.pack x32,x32,x32' +.*: Error: illegal operands `cv.pack x33,x33,x33' +.*: Error: illegal operands `cv.pack.h x32,x32,x32' +.*: Error: illegal operands `cv.pack.h x33,x33,x33' +.*: Error: illegal operands `cv.packhi.b x32,x32,x32' +.*: Error: illegal operands `cv.packhi.b x33,x33,x33' +.*: Error: illegal operands `cv.packlo.b x32,x32,x32' +.*: Error: illegal operands `cv.packlo.b x33,x33,x33' +.*: Error: illegal operands `cv.sdotsp.b x32,x32,x32' +.*: Error: illegal operands `cv.sdotsp.b x33,x33,x33' +.*: Error: illegal operands `cv.sdotsp.h x32,x32,x32' +.*: Error: illegal operands `cv.sdotsp.h x33,x33,x33' +.*: Error: illegal operands `cv.sdotsp.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.sdotsp.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.sdotsp.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.sdotsp.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.sdotsp.sci.b x32,x32,20' +.*: Error: illegal operands `cv.sdotsp.sci.b x33,x33,20' +.*: Error: illegal operands `cv.sdotsp.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.sdotsp.sci.b x6,x7,32' +.*: Error: illegal operands `cv.sdotsp.sci.h x32,x32,20' +.*: Error: illegal operands `cv.sdotsp.sci.h x33,x33,20' +.*: Error: illegal operands `cv.sdotsp.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.sdotsp.sci.h x6,x7,32' +.*: Error: illegal operands `cv.sdotup.b x32,x32,x32' +.*: Error: illegal operands `cv.sdotup.b x33,x33,x33' +.*: Error: illegal operands `cv.sdotup.h x32,x32,x32' +.*: Error: illegal operands `cv.sdotup.h x33,x33,x33' +.*: Error: illegal operands `cv.sdotup.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.sdotup.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.sdotup.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.sdotup.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.sdotup.sci.b x32,x32,20' +.*: Error: illegal operands `cv.sdotup.sci.b x33,x33,20' +.*: Error: illegal operands `cv.sdotup.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.sdotup.sci.b x6,x7,64' +.*: Error: illegal operands `cv.sdotup.sci.h x32,x32,20' +.*: Error: illegal operands `cv.sdotup.sci.h x33,x33,20' +.*: Error: illegal operands `cv.sdotup.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.sdotup.sci.h x6,x7,64' +.*: Error: illegal operands `cv.sdotusp.b x32,x32,x32' +.*: Error: illegal operands `cv.sdotusp.b x33,x33,x33' +.*: Error: illegal operands `cv.sdotusp.h x32,x32,x32' +.*: Error: illegal operands `cv.sdotusp.h x33,x33,x33' +.*: Error: illegal operands `cv.sdotusp.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.sdotusp.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.sdotusp.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.sdotusp.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.sdotusp.sci.b x32,x32,20' +.*: Error: illegal operands `cv.sdotusp.sci.b x33,x33,20' +.*: Error: illegal operands `cv.sdotusp.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.sdotusp.sci.b x6,x7,32' +.*: Error: illegal operands `cv.sdotusp.sci.h x32,x32,20' +.*: Error: illegal operands `cv.sdotusp.sci.h x33,x33,20' +.*: Error: illegal operands `cv.sdotusp.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.sdotusp.sci.h x6,x7,32' +.*: Error: illegal operands `cv.shuffle2.b x32,x32,x32' +.*: Error: illegal operands `cv.shuffle2.b x33,x33,x33' +.*: Error: illegal operands `cv.shuffle2.h x32,x32,x32' +.*: Error: illegal operands `cv.shuffle2.h x33,x33,x33' +.*: Error: illegal operands `cv.shuffle.b x32,x32,x32' +.*: Error: illegal operands `cv.shuffle.b x33,x33,x33' +.*: Error: illegal operands `cv.shuffle.h x32,x32,x32' +.*: Error: illegal operands `cv.shuffle.h x33,x33,x33' +.*: Error: illegal operands `cv.shufflei0.sci.b x32,x32,20' +.*: Error: illegal operands `cv.shufflei0.sci.b x33,x33,20' +.*: Error: illegal operands `cv.shufflei0.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.shufflei0.sci.b x6,x7,64' +.*: Error: illegal operands `cv.shufflei1.sci.b x32,x32,20' +.*: Error: illegal operands `cv.shufflei1.sci.b x33,x33,20' +.*: Error: illegal operands `cv.shufflei1.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.shufflei1.sci.b x6,x7,64' +.*: Error: illegal operands `cv.shufflei2.sci.b x32,x32,20' +.*: Error: illegal operands `cv.shufflei2.sci.b x33,x33,20' +.*: Error: illegal operands `cv.shufflei2.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.shufflei2.sci.b x6,x7,64' +.*: Error: illegal operands `cv.shufflei3.sci.b x32,x32,20' +.*: Error: illegal operands `cv.shufflei3.sci.b x33,x33,20' +.*: Error: illegal operands `cv.shufflei3.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.shufflei3.sci.b x6,x7,64' +.*: Error: illegal operands `cv.shuffle.sci.h x32,x32,20' +.*: Error: illegal operands `cv.shuffle.sci.h x33,x33,20' +.*: Error: illegal operands `cv.shuffle.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.shuffle.sci.h x6,x7,64' +.*: Error: illegal operands `cv.sll.b x32,x32,x32' +.*: Error: illegal operands `cv.sll.b x33,x33,x33' +.*: Error: illegal operands `cv.sll.h x32,x32,x32' +.*: Error: illegal operands `cv.sll.h x33,x33,x33' +.*: Error: illegal operands `cv.sll.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.sll.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.sll.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.sll.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.sll.sci.b x32,x32,4' +.*: Error: illegal operands `cv.sll.sci.b x33,x33,4' +.*: Error: illegal operands `cv.sll.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.sll.sci.b x6,x7,8' +.*: Error: illegal operands `cv.sll.sci.h x32,x32,12' +.*: Error: illegal operands `cv.sll.sci.h x33,x33,12' +.*: Error: illegal operands `cv.sll.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.sll.sci.h x6,x7,16' +.*: Error: illegal operands `cv.sra.b x32,x32,x32' +.*: Error: illegal operands `cv.sra.b x33,x33,x33' +.*: Error: illegal operands `cv.sra.h x32,x32,x32' +.*: Error: illegal operands `cv.sra.h x33,x33,x33' +.*: Error: illegal operands `cv.sra.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.sra.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.sra.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.sra.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.sra.sci.b x32,x32,4' +.*: Error: illegal operands `cv.sra.sci.b x33,x33,4' +.*: Error: illegal operands `cv.sra.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.sra.sci.b x6,x7,8' +.*: Error: illegal operands `cv.sra.sci.h x32,x32,12' +.*: Error: illegal operands `cv.sra.sci.h x33,x33,12' +.*: Error: illegal operands `cv.sra.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.sra.sci.h x6,x7,16' +.*: Error: illegal operands `cv.srl.b x32,x32,x32' +.*: Error: illegal operands `cv.srl.b x33,x33,x33' +.*: Error: illegal operands `cv.srl.h x32,x32,x32' +.*: Error: illegal operands `cv.srl.h x33,x33,x33' +.*: Error: illegal operands `cv.srl.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.srl.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.srl.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.srl.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.srl.sci.b x32,x32,4' +.*: Error: illegal operands `cv.srl.sci.b x33,x33,4' +.*: Error: illegal operands `cv.srl.sci.b x6,x7,-1' +.*: Error: illegal operands `cv.srl.sci.b x6,x7,8' +.*: Error: illegal operands `cv.srl.sci.h x32,x32,12' +.*: Error: illegal operands `cv.srl.sci.h x33,x33,12' +.*: Error: illegal operands `cv.srl.sci.h x6,x7,-1' +.*: Error: illegal operands `cv.srl.sci.h x6,x7,16' +.*: Error: illegal operands `cv.sub.b x32,x32,x32' +.*: Error: illegal operands `cv.sub.b x33,x33,x33' +.*: Error: illegal operands `cv.sub.div2 x32,x32,x32' +.*: Error: illegal operands `cv.sub.div2 x33,x33,x33' +.*: Error: illegal operands `cv.sub.div4 x32,x32,x32' +.*: Error: illegal operands `cv.sub.div4 x33,x33,x33' +.*: Error: illegal operands `cv.sub.div8 x32,x32,x32' +.*: Error: illegal operands `cv.sub.div8 x33,x33,x33' +.*: Error: illegal operands `cv.sub.h x32,x32,x32' +.*: Error: illegal operands `cv.sub.h x33,x33,x33' +.*: Error: illegal operands `cv.subrotmj.div2 x32,x32,x32' +.*: Error: illegal operands `cv.subrotmj.div2 x33,x33,x33' +.*: Error: illegal operands `cv.subrotmj.div4 x32,x32,x32' +.*: Error: illegal operands `cv.subrotmj.div4 x33,x33,x33' +.*: Error: illegal operands `cv.subrotmj.div8 x32,x32,x32' +.*: Error: illegal operands `cv.subrotmj.div8 x33,x33,x33' +.*: Error: illegal operands `cv.subrotmj x32,x32,x32' +.*: Error: illegal operands `cv.subrotmj x33,x33,x33' +.*: Error: illegal operands `cv.sub.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.sub.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.sub.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.sub.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.sub.sci.b x32,x32,20' +.*: Error: illegal operands `cv.sub.sci.b x33,x33,20' +.*: Error: illegal operands `cv.sub.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.sub.sci.b x6,x7,32' +.*: Error: illegal operands `cv.sub.sci.h x32,x32,20' +.*: Error: illegal operands `cv.sub.sci.h x33,x33,20' +.*: Error: illegal operands `cv.sub.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.sub.sci.h x6,x7,32' +.*: Error: illegal operands `cv.xor.b x32,x32,x32' +.*: Error: illegal operands `cv.xor.b x33,x33,x33' +.*: Error: illegal operands `cv.xor.h x32,x32,x32' +.*: Error: illegal operands `cv.xor.h x33,x33,x33' +.*: Error: illegal operands `cv.xor.sc.b x32,x32,x32' +.*: Error: illegal operands `cv.xor.sc.b x33,x33,x33' +.*: Error: illegal operands `cv.xor.sc.h x32,x32,x32' +.*: Error: illegal operands `cv.xor.sc.h x33,x33,x33' +.*: Error: illegal operands `cv.xor.sci.b x32,x32,20' +.*: Error: illegal operands `cv.xor.sci.b x33,x33,20' +.*: Error: illegal operands `cv.xor.sci.b x6,x7,-33' +.*: Error: illegal operands `cv.xor.sci.b x6,x7,32' +.*: Error: illegal operands `cv.xor.sci.h x32,x32,20' +.*: Error: illegal operands `cv.xor.sci.h x33,x33,20' +.*: Error: illegal operands `cv.xor.sci.h x6,x7,-33' +.*: Error: illegal operands `cv.xor.sci.h x6,x7,32' diff --git a/gas/testsuite/gas/riscv/x-cv-simd-fail.s b/gas/testsuite/gas/riscv/x-cv-simd-fail.s new file mode 100644 index 0000000..9aa6ffc --- /dev/null +++ b/gas/testsuite/gas/riscv/x-cv-simd-fail.s @@ -0,0 +1,582 @@ + cv.abs.b x32, x32 + cv.abs.b x33, x33 + cv.abs.h x32, x32 + cv.abs.h x33, x33 + cv.add.b x32, x32, x32 + cv.add.b x33, x33, x33 + cv.add.div2 x32, x32, x32 + cv.add.div2 x33, x33, x33 + cv.add.div4 x32, x32, x32 + cv.add.div4 x33, x33, x33 + cv.add.div8 x32, x32, x32 + cv.add.div8 x33, x33, x33 + cv.add.h x32, x32, x32 + cv.add.h x33, x33, x33 + cv.add.sc.b x32, x32, x32 + cv.add.sc.b x33, x33, x33 + cv.add.sc.h x32, x32, x32 + cv.add.sc.h x33, x33, x33 + cv.add.sci.b x32, x32, 20 + cv.add.sci.b x33, x33, 20 + cv.add.sci.b x6, x7, -33 + cv.add.sci.b x6, x7, 32 + cv.add.sci.h x32, x32, 20 + cv.add.sci.h x33, x33, 20 + cv.add.sci.h x6, x7, -33 + cv.add.sci.h x6, x7, 32 + cv.and.b x32, x32, x32 + cv.and.b x33, x33, x33 + cv.and.h x32, x32, x32 + cv.and.h x33, x33, x33 + cv.and.sc.b x32, x32, x32 + cv.and.sc.b x33, x33, x33 + cv.and.sc.h x32, x32, x32 + cv.and.sc.h x33, x33, x33 + cv.and.sci.b x32, x32, 20 + cv.and.sci.b x33, x33, 20 + cv.and.sci.b x6, x7, -33 + cv.and.sci.b x6, x7, 32 + cv.and.sci.h x32, x32, 20 + cv.and.sci.h x33, x33, 20 + cv.and.sci.h x6, x7, -33 + cv.and.sci.h x6, x7, 32 + cv.avg.b x32, x32, x32 + cv.avg.b x33, x33, x33 + cv.avg.h x32, x32, x32 + cv.avg.h x33, x33, x33 + cv.avg.sc.b x32, x32, x32 + cv.avg.sc.b x33, x33, x33 + cv.avg.sc.h x32, x32, x32 + cv.avg.sc.h x33, x33, x33 + cv.avg.sci.b x32, x32, 20 + cv.avg.sci.b x33, x33, 20 + cv.avg.sci.b x6, x7, -33 + cv.avg.sci.b x6, x7, 32 + cv.avg.sci.h x32, x32, 20 + cv.avg.sci.h x33, x33, 20 + cv.avg.sci.h x6, x7, -33 + cv.avg.sci.h x6, x7, 32 + cv.avgu.b x32, x32, x32 + cv.avgu.b x33, x33, x33 + cv.avgu.h x32, x32, x32 + cv.avgu.h x33, x33, x33 + cv.avgu.sc.b x32, x32, x32 + cv.avgu.sc.b x33, x33, x33 + cv.avgu.sc.h x32, x32, x32 + cv.avgu.sc.h x33, x33, x33 + cv.avgu.sci.b x32, x32, 20 + cv.avgu.sci.b x33, x33, 20 + cv.avgu.sci.b x6, x7, -1 + cv.avgu.sci.b x6, x7, 64 + cv.avgu.sci.h x32, x32, 20 + cv.avgu.sci.h x33, x33, 20 + cv.avgu.sci.h x6, x7, -1 + cv.avgu.sci.h x6, x7, 64 + cv.cmpeq.b x32, x32, x32 + cv.cmpeq.b x33, x33, x33 + cv.cmpeq.h x32, x32, x32 + cv.cmpeq.h x33, x33, x33 + cv.cmpeq.sc.b x32, x32, x32 + cv.cmpeq.sc.b x33, x33, x33 + cv.cmpeq.sc.h x32, x32, x32 + cv.cmpeq.sc.h x33, x33, x33 + cv.cmpeq.sci.b x32, x32, 20 + cv.cmpeq.sci.b x33, x33, 20 + cv.cmpeq.sci.b x6, x7, -33 + cv.cmpeq.sci.b x6, x7, 32 + cv.cmpeq.sci.h x32, x32, 20 + cv.cmpeq.sci.h x33, x33, 20 + cv.cmpeq.sci.h x6, x7, -33 + cv.cmpeq.sci.h x6, x7, 32 + cv.cmpge.b x32, x32, x32 + cv.cmpge.b x33, x33, x33 + cv.cmpge.h x32, x32, x32 + cv.cmpge.h x33, x33, x33 + cv.cmpge.sc.b x32, x32, x32 + cv.cmpge.sc.b x33, x33, x33 + cv.cmpge.sc.h x32, x32, x32 + cv.cmpge.sc.h x33, x33, x33 + cv.cmpge.sci.b x32, x32, 20 + cv.cmpge.sci.b x33, x33, 20 + cv.cmpge.sci.b x6, x7, -33 + cv.cmpge.sci.b x6, x7, 32 + cv.cmpge.sci.h x32, x32, 20 + cv.cmpge.sci.h x33, x33, 20 + cv.cmpge.sci.h x6, x7, -33 + cv.cmpge.sci.h x6, x7, 32 + cv.cmpgeu.b x32, x32, x32 + cv.cmpgeu.b x33, x33, x33 + cv.cmpgeu.h x32, x32, x32 + cv.cmpgeu.h x33, x33, x33 + cv.cmpgeu.sc.b x32, x32, x32 + cv.cmpgeu.sc.b x33, x33, x33 + cv.cmpgeu.sc.h x32, x32, x32 + cv.cmpgeu.sc.h x33, x33, x33 + cv.cmpgeu.sci.b x32, x32, 20 + cv.cmpgeu.sci.b x33, x33, 20 + cv.cmpgeu.sci.b x6, x7, -1 + cv.cmpgeu.sci.b x6, x7, 64 + cv.cmpgeu.sci.h x32, x32, 20 + cv.cmpgeu.sci.h x33, x33, 20 + cv.cmpgeu.sci.h x6, x7, -1 + cv.cmpgeu.sci.h x6, x7, 64 + cv.cmpgt.b x32, x32, x32 + cv.cmpgt.b x33, x33, x33 + cv.cmpgt.h x32, x32, x32 + cv.cmpgt.h x33, x33, x33 + cv.cmpgt.sc.b x32, x32, x32 + cv.cmpgt.sc.b x33, x33, x33 + cv.cmpgt.sc.h x32, x32, x32 + cv.cmpgt.sc.h x33, x33, x33 + cv.cmpgt.sci.b x32, x32, 20 + cv.cmpgt.sci.b x33, x33, 20 + cv.cmpgt.sci.b x6, x7, -33 + cv.cmpgt.sci.b x6, x7, 32 + cv.cmpgt.sci.h x32, x32, 20 + cv.cmpgt.sci.h x33, x33, 20 + cv.cmpgt.sci.h x6, x7, -33 + cv.cmpgt.sci.h x6, x7, 32 + cv.cmpgtu.b x32, x32, x32 + cv.cmpgtu.b x33, x33, x33 + cv.cmpgtu.h x32, x32, x32 + cv.cmpgtu.h x33, x33, x33 + cv.cmpgtu.sc.b x32, x32, x32 + cv.cmpgtu.sc.b x33, x33, x33 + cv.cmpgtu.sc.h x32, x32, x32 + cv.cmpgtu.sc.h x33, x33, x33 + cv.cmpgtu.sci.b x32, x32, 20 + cv.cmpgtu.sci.b x33, x33, 20 + cv.cmpgtu.sci.b x6, x7, -1 + cv.cmpgtu.sci.b x6, x7, 64 + cv.cmpgtu.sci.h x32, x32, 20 + cv.cmpgtu.sci.h x33, x33, 20 + cv.cmpgtu.sci.h x6, x7, -1 + cv.cmpgtu.sci.h x6, x7, 64 + cv.cmple.b x32, x32, x32 + cv.cmple.b x33, x33, x33 + cv.cmple.h x32, x32, x32 + cv.cmple.h x33, x33, x33 + cv.cmple.sc.b x32, x32, x32 + cv.cmple.sc.b x33, x33, x33 + cv.cmple.sc.h x32, x32, x32 + cv.cmple.sc.h x33, x33, x33 + cv.cmple.sci.b x32, x32, 20 + cv.cmple.sci.b x33, x33, 20 + cv.cmple.sci.b x6, x7, -33 + cv.cmple.sci.b x6, x7, 32 + cv.cmple.sci.h x32, x32, 20 + cv.cmple.sci.h x33, x33, 20 + cv.cmple.sci.h x6, x7, -33 + cv.cmple.sci.h x6, x7, 32 + cv.cmpleu.b x32, x32, x32 + cv.cmpleu.b x33, x33, x33 + cv.cmpleu.h x32, x32, x32 + cv.cmpleu.h x33, x33, x33 + cv.cmpleu.sc.b x32, x32, x32 + cv.cmpleu.sc.b x33, x33, x33 + cv.cmpleu.sc.h x32, x32, x32 + cv.cmpleu.sc.h x33, x33, x33 + cv.cmpleu.sci.b x32, x32, 20 + cv.cmpleu.sci.b x33, x33, 20 + cv.cmpleu.sci.b x6, x7, -1 + cv.cmpleu.sci.b x6, x7, 64 + cv.cmpleu.sci.h x32, x32, 20 + cv.cmpleu.sci.h x33, x33, 20 + cv.cmpleu.sci.h x6, x7, -1 + cv.cmpleu.sci.h x6, x7, 64 + cv.cmplt.b x32, x32, x32 + cv.cmplt.b x33, x33, x33 + cv.cmplt.h x32, x32, x32 + cv.cmplt.h x33, x33, x33 + cv.cmplt.sc.b x32, x32, x32 + cv.cmplt.sc.b x33, x33, x33 + cv.cmplt.sc.h x32, x32, x32 + cv.cmplt.sc.h x33, x33, x33 + cv.cmplt.sci.b x32, x32, 20 + cv.cmplt.sci.b x33, x33, 20 + cv.cmplt.sci.b x6, x7, -33 + cv.cmplt.sci.b x6, x7, 32 + cv.cmplt.sci.h x32, x32, 20 + cv.cmplt.sci.h x33, x33, 20 + cv.cmplt.sci.h x6, x7, -33 + cv.cmplt.sci.h x6, x7, 32 + cv.cmpltu.b x32, x32, x32 + cv.cmpltu.b x33, x33, x33 + cv.cmpltu.h x32, x32, x32 + cv.cmpltu.h x33, x33, x33 + cv.cmpltu.sc.b x32, x32, x32 + cv.cmpltu.sc.b x33, x33, x33 + cv.cmpltu.sc.h x32, x32, x32 + cv.cmpltu.sc.h x33, x33, x33 + cv.cmpltu.sci.b x32, x32, 20 + cv.cmpltu.sci.b x33, x33, 20 + cv.cmpltu.sci.b x6, x7, -1 + cv.cmpltu.sci.b x6, x7, 64 + cv.cmpltu.sci.h x32, x32, 20 + cv.cmpltu.sci.h x33, x33, 20 + cv.cmpltu.sci.h x6, x7, -1 + cv.cmpltu.sci.h x6, x7, 64 + cv.cmpne.b x32, x32, x32 + cv.cmpne.b x33, x33, x33 + cv.cmpne.h x32, x32, x32 + cv.cmpne.h x33, x33, x33 + cv.cmpne.sc.b x32, x32, x32 + cv.cmpne.sc.b x33, x33, x33 + cv.cmpne.sc.h x32, x32, x32 + cv.cmpne.sc.h x33, x33, x33 + cv.cmpne.sci.b x32, x32, 20 + cv.cmpne.sci.b x33, x33, 20 + cv.cmpne.sci.b x6, x7, -33 + cv.cmpne.sci.b x6, x7, 32 + cv.cmpne.sci.h x32, x32, 20 + cv.cmpne.sci.h x33, x33, 20 + cv.cmpne.sci.h x6, x7, -33 + cv.cmpne.sci.h x6, x7, 32 + cv.cplxconj x32, x32 + cv.cplxconj x33, x33 + cv.cplxmul.i.div2 x32, x32, x32 + cv.cplxmul.i.div2 x33, x33, x33 + cv.cplxmul.i.div4 x32, x32, x32 + cv.cplxmul.i.div4 x33, x33, x33 + cv.cplxmul.i.div8 x32, x32, x32 + cv.cplxmul.i.div8 x33, x33, x33 + cv.cplxmul.i x32, x32, x32 + cv.cplxmul.i x33, x33, x33 + cv.cplxmul.r.div2 x32, x32, x32 + cv.cplxmul.r.div2 x33, x33, x33 + cv.cplxmul.r.div4 x32, x32, x32 + cv.cplxmul.r.div4 x33, x33, x33 + cv.cplxmul.r.div8 x32, x32, x32 + cv.cplxmul.r.div8 x33, x33, x33 + cv.cplxmul.r x32, x32, x32 + cv.cplxmul.r x33, x33, x33 + cv.dotsp.b x32, x32, x32 + cv.dotsp.b x33, x33, x33 + cv.dotsp.h x32, x32, x32 + cv.dotsp.h x33, x33, x33 + cv.dotsp.sc.b x32, x32, x32 + cv.dotsp.sc.b x33, x33, x33 + cv.dotsp.sc.h x32, x32, x32 + cv.dotsp.sc.h x33, x33, x33 + cv.dotsp.sci.b x32, x32, 20 + cv.dotsp.sci.b x33, x33, 20 + cv.dotsp.sci.b x6, x7, -33 + cv.dotsp.sci.b x6, x7, 32 + cv.dotsp.sci.h x32, x32, 20 + cv.dotsp.sci.h x33, x33, 20 + cv.dotsp.sci.h x6, x7, -33 + cv.dotsp.sci.h x6, x7, 32 + cv.dotup.b x32, x32, x32 + cv.dotup.b x33, x33, x33 + cv.dotup.h x32, x32, x32 + cv.dotup.h x33, x33, x33 + cv.dotup.sc.b x32, x32, x32 + cv.dotup.sc.b x33, x33, x33 + cv.dotup.sc.h x32, x32, x32 + cv.dotup.sc.h x33, x33, x33 + cv.dotup.sci.b x32, x32, 20 + cv.dotup.sci.b x33, x33, 20 + cv.dotup.sci.b x6, x7, -1 + cv.dotup.sci.b x6, x7, 64 + cv.dotup.sci.h x32, x32, 20 + cv.dotup.sci.h x33, x33, 20 + cv.dotup.sci.h x6, x7, -1 + cv.dotup.sci.h x6, x7, 64 + cv.dotusp.b x32, x32, x32 + cv.dotusp.b x33, x33, x33 + cv.dotusp.h x32, x32, x32 + cv.dotusp.h x33, x33, x33 + cv.dotusp.sc.b x32, x32, x32 + cv.dotusp.sc.b x33, x33, x33 + cv.dotusp.sc.h x32, x32, x32 + cv.dotusp.sc.h x33, x33, x33 + cv.dotusp.sci.b x32, x32, 20 + cv.dotusp.sci.b x33, x33, 20 + cv.dotusp.sci.b x6, x7, -33 + cv.dotusp.sci.b x6, x7, 32 + cv.dotusp.sci.h x32, x32, 20 + cv.dotusp.sci.h x33, x33, 20 + cv.dotusp.sci.h x6, x7, -33 + cv.dotusp.sci.h x6, x7, 32 + cv.extract.b x32, x32, 2 + cv.extract.b x33, x33, 2 + cv.extract.b x6, x7, -1 + cv.extract.b x6, x7, 4 + cv.extract.h x32, x32, 1 + cv.extract.h x33, x33, 1 + cv.extract.h x6, x7, -1 + cv.extract.h x6, x7, 2 + cv.extractu.b x32, x32, 2 + cv.extractu.b x33, x33, 2 + cv.extractu.b x6, x7, -1 + cv.extractu.b x6, x7, 4 + cv.extractu.h x32, x32, 1 + cv.extractu.h x33, x33, 1 + cv.extractu.h x6, x7, -1 + cv.extractu.h x6, x7, 2 + cv.insert.b x32, x32, 2 + cv.insert.b x33, x33, 2 + cv.insert.b x6, x7, -1 + cv.insert.b x6, x7, 4 + cv.insert.h x32, x32, 1 + cv.insert.h x33, x33, 1 + cv.insert.h x6, x7, -1 + cv.insert.h x6, x7, 2 + cv.max.b x32, x32, x32 + cv.max.b x33, x33, x33 + cv.max.h x32, x32, x32 + cv.max.h x33, x33, x33 + cv.max.sc.b x32, x32, x32 + cv.max.sc.b x33, x33, x33 + cv.max.sc.h x32, x32, x32 + cv.max.sc.h x33, x33, x33 + cv.max.sci.b x32, x32, 20 + cv.max.sci.b x33, x33, 20 + cv.max.sci.b x6, x7, -33 + cv.max.sci.b x6, x7, 32 + cv.max.sci.h x32, x32, 20 + cv.max.sci.h x33, x33, 20 + cv.max.sci.h x6, x7, -33 + cv.max.sci.h x6, x7, 32 + cv.maxu.b x32, x32, x32 + cv.maxu.b x33, x33, x33 + cv.maxu.h x32, x32, x32 + cv.maxu.h x33, x33, x33 + cv.maxu.sc.b x32, x32, x32 + cv.maxu.sc.b x33, x33, x33 + cv.maxu.sc.h x32, x32, x32 + cv.maxu.sc.h x33, x33, x33 + cv.maxu.sci.b x32, x32, 20 + cv.maxu.sci.b x33, x33, 20 + cv.maxu.sci.b x6, x7, -1 + cv.maxu.sci.b x6, x7, 64 + cv.maxu.sci.h x32, x32, 20 + cv.maxu.sci.h x33, x33, 20 + cv.maxu.sci.h x6, x7, -1 + cv.maxu.sci.h x6, x7, 64 + cv.min.b x32, x32, x32 + cv.min.b x33, x33, x33 + cv.min.h x32, x32, x32 + cv.min.h x33, x33, x33 + cv.min.sc.b x32, x32, x32 + cv.min.sc.b x33, x33, x33 + cv.min.sc.h x32, x32, x32 + cv.min.sc.h x33, x33, x33 + cv.min.sci.b x32, x32, 20 + cv.min.sci.b x33, x33, 20 + cv.min.sci.b x6, x7, -33 + cv.min.sci.b x6, x7, 32 + cv.min.sci.h x32, x32, 20 + cv.min.sci.h x33, x33, 20 + cv.min.sci.h x6, x7, -33 + cv.min.sci.h x6, x7, 32 + cv.minu.b x32, x32, x32 + cv.minu.b x33, x33, x33 + cv.minu.h x32, x32, x32 + cv.minu.h x33, x33, x33 + cv.minu.sc.b x32, x32, x32 + cv.minu.sc.b x33, x33, x33 + cv.minu.sc.h x32, x32, x32 + cv.minu.sc.h x33, x33, x33 + cv.minu.sci.b x32, x32, 20 + cv.minu.sci.b x33, x33, 20 + cv.minu.sci.b x6, x7, -1 + cv.minu.sci.b x6, x7, 64 + cv.minu.sci.h x32, x32, 20 + cv.minu.sci.h x33, x33, 20 + cv.minu.sci.h x6, x7, -1 + cv.minu.sci.h x6, x7, 64 + cv.or.b x32, x32, x32 + cv.or.b x33, x33, x33 + cv.or.h x32, x32, x32 + cv.or.h x33, x33, x33 + cv.or.sc.b x32, x32, x32 + cv.or.sc.b x33, x33, x33 + cv.or.sc.h x32, x32, x32 + cv.or.sc.h x33, x33, x33 + cv.or.sci.b x32, x32, 20 + cv.or.sci.b x33, x33, 20 + cv.or.sci.b x6, x7, -33 + cv.or.sci.b x6, x7, 32 + cv.or.sci.h x32, x32, 20 + cv.or.sci.h x33, x33, 20 + cv.or.sci.h x6, x7, -33 + cv.or.sci.h x6, x7, 32 + cv.pack x32, x32, x32 + cv.pack x33, x33, x33 + cv.pack.h x32, x32, x32 + cv.pack.h x33, x33, x33 + cv.packhi.b x32, x32, x32 + cv.packhi.b x33, x33, x33 + cv.packlo.b x32, x32, x32 + cv.packlo.b x33, x33, x33 + cv.sdotsp.b x32, x32, x32 + cv.sdotsp.b x33, x33, x33 + cv.sdotsp.h x32, x32, x32 + cv.sdotsp.h x33, x33, x33 + cv.sdotsp.sc.b x32, x32, x32 + cv.sdotsp.sc.b x33, x33, x33 + cv.sdotsp.sc.h x32, x32, x32 + cv.sdotsp.sc.h x33, x33, x33 + cv.sdotsp.sci.b x32, x32, 20 + cv.sdotsp.sci.b x33, x33, 20 + cv.sdotsp.sci.b x6, x7, -33 + cv.sdotsp.sci.b x6, x7, 32 + cv.sdotsp.sci.h x32, x32, 20 + cv.sdotsp.sci.h x33, x33, 20 + cv.sdotsp.sci.h x6, x7, -33 + cv.sdotsp.sci.h x6, x7, 32 + cv.sdotup.b x32, x32, x32 + cv.sdotup.b x33, x33, x33 + cv.sdotup.h x32, x32, x32 + cv.sdotup.h x33, x33, x33 + cv.sdotup.sc.b x32, x32, x32 + cv.sdotup.sc.b x33, x33, x33 + cv.sdotup.sc.h x32, x32, x32 + cv.sdotup.sc.h x33, x33, x33 + cv.sdotup.sci.b x32, x32, 20 + cv.sdotup.sci.b x33, x33, 20 + cv.sdotup.sci.b x6, x7, -1 + cv.sdotup.sci.b x6, x7, 64 + cv.sdotup.sci.h x32, x32, 20 + cv.sdotup.sci.h x33, x33, 20 + cv.sdotup.sci.h x6, x7, -1 + cv.sdotup.sci.h x6, x7, 64 + cv.sdotusp.b x32, x32, x32 + cv.sdotusp.b x33, x33, x33 + cv.sdotusp.h x32, x32, x32 + cv.sdotusp.h x33, x33, x33 + cv.sdotusp.sc.b x32, x32, x32 + cv.sdotusp.sc.b x33, x33, x33 + cv.sdotusp.sc.h x32, x32, x32 + cv.sdotusp.sc.h x33, x33, x33 + cv.sdotusp.sci.b x32, x32, 20 + cv.sdotusp.sci.b x33, x33, 20 + cv.sdotusp.sci.b x6, x7, -33 + cv.sdotusp.sci.b x6, x7, 32 + cv.sdotusp.sci.h x32, x32, 20 + cv.sdotusp.sci.h x33, x33, 20 + cv.sdotusp.sci.h x6, x7, -33 + cv.sdotusp.sci.h x6, x7, 32 + cv.shuffle2.b x32, x32, x32 + cv.shuffle2.b x33, x33, x33 + cv.shuffle2.h x32, x32, x32 + cv.shuffle2.h x33, x33, x33 + cv.shuffle.b x32, x32, x32 + cv.shuffle.b x33, x33, x33 + cv.shuffle.h x32, x32, x32 + cv.shuffle.h x33, x33, x33 + cv.shufflei0.sci.b x32, x32, 20 + cv.shufflei0.sci.b x33, x33, 20 + cv.shufflei0.sci.b x6, x7, -1 + cv.shufflei0.sci.b x6, x7, 64 + cv.shufflei1.sci.b x32, x32, 20 + cv.shufflei1.sci.b x33, x33, 20 + cv.shufflei1.sci.b x6, x7, -1 + cv.shufflei1.sci.b x6, x7, 64 + cv.shufflei2.sci.b x32, x32, 20 + cv.shufflei2.sci.b x33, x33, 20 + cv.shufflei2.sci.b x6, x7, -1 + cv.shufflei2.sci.b x6, x7, 64 + cv.shufflei3.sci.b x32, x32, 20 + cv.shufflei3.sci.b x33, x33, 20 + cv.shufflei3.sci.b x6, x7, -1 + cv.shufflei3.sci.b x6, x7, 64 + cv.shuffle.sci.h x32, x32, 20 + cv.shuffle.sci.h x33, x33, 20 + cv.shuffle.sci.h x6, x7, -1 + cv.shuffle.sci.h x6, x7, 64 + cv.sll.b x32, x32, x32 + cv.sll.b x33, x33, x33 + cv.sll.h x32, x32, x32 + cv.sll.h x33, x33, x33 + cv.sll.sc.b x32, x32, x32 + cv.sll.sc.b x33, x33, x33 + cv.sll.sc.h x32, x32, x32 + cv.sll.sc.h x33, x33, x33 + cv.sll.sci.b x32, x32, 4 + cv.sll.sci.b x33, x33, 4 + cv.sll.sci.b x6, x7, -1 + cv.sll.sci.b x6, x7, 8 + cv.sll.sci.h x32, x32, 12 + cv.sll.sci.h x33, x33, 12 + cv.sll.sci.h x6, x7, -1 + cv.sll.sci.h x6, x7, 16 + cv.sra.b x32, x32, x32 + cv.sra.b x33, x33, x33 + cv.sra.h x32, x32, x32 + cv.sra.h x33, x33, x33 + cv.sra.sc.b x32, x32, x32 + cv.sra.sc.b x33, x33, x33 + cv.sra.sc.h x32, x32, x32 + cv.sra.sc.h x33, x33, x33 + cv.sra.sci.b x32, x32, 4 + cv.sra.sci.b x33, x33, 4 + cv.sra.sci.b x6, x7, -1 + cv.sra.sci.b x6, x7, 8 + cv.sra.sci.h x32, x32, 12 + cv.sra.sci.h x33, x33, 12 + cv.sra.sci.h x6, x7, -1 + cv.sra.sci.h x6, x7, 16 + cv.srl.b x32, x32, x32 + cv.srl.b x33, x33, x33 + cv.srl.h x32, x32, x32 + cv.srl.h x33, x33, x33 + cv.srl.sc.b x32, x32, x32 + cv.srl.sc.b x33, x33, x33 + cv.srl.sc.h x32, x32, x32 + cv.srl.sc.h x33, x33, x33 + cv.srl.sci.b x32, x32, 4 + cv.srl.sci.b x33, x33, 4 + cv.srl.sci.b x6, x7, -1 + cv.srl.sci.b x6, x7, 8 + cv.srl.sci.h x32, x32, 12 + cv.srl.sci.h x33, x33, 12 + cv.srl.sci.h x6, x7, -1 + cv.srl.sci.h x6, x7, 16 + cv.sub.b x32, x32, x32 + cv.sub.b x33, x33, x33 + cv.sub.div2 x32, x32, x32 + cv.sub.div2 x33, x33, x33 + cv.sub.div4 x32, x32, x32 + cv.sub.div4 x33, x33, x33 + cv.sub.div8 x32, x32, x32 + cv.sub.div8 x33, x33, x33 + cv.sub.h x32, x32, x32 + cv.sub.h x33, x33, x33 + cv.subrotmj.div2 x32, x32, x32 + cv.subrotmj.div2 x33, x33, x33 + cv.subrotmj.div4 x32, x32, x32 + cv.subrotmj.div4 x33, x33, x33 + cv.subrotmj.div8 x32, x32, x32 + cv.subrotmj.div8 x33, x33, x33 + cv.subrotmj x32, x32, x32 + cv.subrotmj x33, x33, x33 + cv.sub.sc.b x32, x32, x32 + cv.sub.sc.b x33, x33, x33 + cv.sub.sc.h x32, x32, x32 + cv.sub.sc.h x33, x33, x33 + cv.sub.sci.b x32, x32, 20 + cv.sub.sci.b x33, x33, 20 + cv.sub.sci.b x6, x7, -33 + cv.sub.sci.b x6, x7, 32 + cv.sub.sci.h x32, x32, 20 + cv.sub.sci.h x33, x33, 20 + cv.sub.sci.h x6, x7, -33 + cv.sub.sci.h x6, x7, 32 + cv.xor.b x32, x32, x32 + cv.xor.b x33, x33, x33 + cv.xor.h x32, x32, x32 + cv.xor.h x33, x33, x33 + cv.xor.sc.b x32, x32, x32 + cv.xor.sc.b x33, x33, x33 + cv.xor.sc.h x32, x32, x32 + cv.xor.sc.h x33, x33, x33 + cv.xor.sci.b x32, x32, 20 + cv.xor.sci.b x33, x33, 20 + cv.xor.sci.b x6, x7, -33 + cv.xor.sci.b x6, x7, 32 + cv.xor.sci.h x32, x32, 20 + cv.xor.sci.h x33, x33, 20 + cv.xor.sci.h x6, x7, -33 + cv.xor.sci.h x6, x7, 32 diff --git a/gas/testsuite/gas/riscv/x-cv-simd.d b/gas/testsuite/gas/riscv/x-cv-simd.d new file mode 100644 index 0000000..8c22b4a --- /dev/null +++ b/gas/testsuite/gas/riscv/x-cv-simd.d @@ -0,0 +1,1508 @@ +#as: -march=rv32i_xcvsimd +#source: x-cv-simd.s +#objdump: -d + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <.text>: +.*: 7000107b cv.abs.b zero,zero +.*: 700090fb cv.abs.b ra,ra +.*: 7001117b cv.abs.b sp,sp +.*: 7004147b cv.abs.b s0,s0 +.*: 700a1a7b cv.abs.b s4,s4 +.*: 700f9ffb cv.abs.b t6,t6 +.*: 7000007b cv.abs.h zero,zero +.*: 700080fb cv.abs.h ra,ra +.*: 7001017b cv.abs.h sp,sp +.*: 7004047b cv.abs.h s0,s0 +.*: 700a0a7b cv.abs.h s4,s4 +.*: 700f8ffb cv.abs.h t6,t6 +.*: 0000107b cv.add.b zero,zero,zero +.*: 001090fb cv.add.b ra,ra,ra +.*: 0021117b cv.add.b sp,sp,sp +.*: 0084147b cv.add.b s0,s0,s0 +.*: 014a1a7b cv.add.b s4,s4,s4 +.*: 01ff9ffb cv.add.b t6,t6,t6 +.*: 6c00207b cv.add.div2 zero,zero,zero +.*: 6c10a0fb cv.add.div2 ra,ra,ra +.*: 6c21217b cv.add.div2 sp,sp,sp +.*: 6c84247b cv.add.div2 s0,s0,s0 +.*: 6d4a2a7b cv.add.div2 s4,s4,s4 +.*: 6dffaffb cv.add.div2 t6,t6,t6 +.*: 6c00407b cv.add.div4 zero,zero,zero +.*: 6c10c0fb cv.add.div4 ra,ra,ra +.*: 6c21417b cv.add.div4 sp,sp,sp +.*: 6c84447b cv.add.div4 s0,s0,s0 +.*: 6d4a4a7b cv.add.div4 s4,s4,s4 +.*: 6dffcffb cv.add.div4 t6,t6,t6 +.*: 6c00607b cv.add.div8 zero,zero,zero +.*: 6c10e0fb cv.add.div8 ra,ra,ra +.*: 6c21617b cv.add.div8 sp,sp,sp +.*: 6c84647b cv.add.div8 s0,s0,s0 +.*: 6d4a6a7b cv.add.div8 s4,s4,s4 +.*: 6dffeffb cv.add.div8 t6,t6,t6 +.*: 0000007b cv.add.h zero,zero,zero +.*: 001080fb cv.add.h ra,ra,ra +.*: 0021017b cv.add.h sp,sp,sp +.*: 0084047b cv.add.h s0,s0,s0 +.*: 014a0a7b cv.add.h s4,s4,s4 +.*: 01ff8ffb cv.add.h t6,t6,t6 +.*: 0000507b cv.add.sc.b zero,zero,zero +.*: 0010d0fb cv.add.sc.b ra,ra,ra +.*: 0021517b cv.add.sc.b sp,sp,sp +.*: 0084547b cv.add.sc.b s0,s0,s0 +.*: 014a5a7b cv.add.sc.b s4,s4,s4 +.*: 01ffdffb cv.add.sc.b t6,t6,t6 +.*: 0000407b cv.add.sc.h zero,zero,zero +.*: 0010c0fb cv.add.sc.h ra,ra,ra +.*: 0021417b cv.add.sc.h sp,sp,sp +.*: 0084447b cv.add.sc.h s0,s0,s0 +.*: 014a4a7b cv.add.sc.h s4,s4,s4 +.*: 01ffcffb cv.add.sc.h t6,t6,t6 +.*: 00a0707b cv.add.sci.b zero,zero,20 +.*: 00a0f0fb cv.add.sci.b ra,ra,20 +.*: 00a1717b cv.add.sci.b sp,sp,20 +.*: 00a4747b cv.add.sci.b s0,s0,20 +.*: 00aa7a7b cv.add.sci.b s4,s4,20 +.*: 00affffb cv.add.sci.b t6,t6,20 +.*: 0103f37b cv.add.sci.b t1,t2,-32 +.*: 0003f37b cv.add.sci.b t1,t2,0 +.*: 02f3f37b cv.add.sci.b t1,t2,31 +.*: 00a0607b cv.add.sci.h zero,zero,20 +.*: 00a0e0fb cv.add.sci.h ra,ra,20 +.*: 00a1617b cv.add.sci.h sp,sp,20 +.*: 00a4647b cv.add.sci.h s0,s0,20 +.*: 00aa6a7b cv.add.sci.h s4,s4,20 +.*: 00afeffb cv.add.sci.h t6,t6,20 +.*: 0103e37b cv.add.sci.h t1,t2,-32 +.*: 0003e37b cv.add.sci.h t1,t2,0 +.*: 02f3e37b cv.add.sci.h t1,t2,31 +.*: 6800107b cv.and.b zero,zero,zero +.*: 681090fb cv.and.b ra,ra,ra +.*: 6821117b cv.and.b sp,sp,sp +.*: 6884147b cv.and.b s0,s0,s0 +.*: 694a1a7b cv.and.b s4,s4,s4 +.*: 69ff9ffb cv.and.b t6,t6,t6 +.*: 6800007b cv.and.h zero,zero,zero +.*: 681080fb cv.and.h ra,ra,ra +.*: 6821017b cv.and.h sp,sp,sp +.*: 6884047b cv.and.h s0,s0,s0 +.*: 694a0a7b cv.and.h s4,s4,s4 +.*: 69ff8ffb cv.and.h t6,t6,t6 +.*: 6800507b cv.and.sc.b zero,zero,zero +.*: 6810d0fb cv.and.sc.b ra,ra,ra +.*: 6821517b cv.and.sc.b sp,sp,sp +.*: 6884547b cv.and.sc.b s0,s0,s0 +.*: 694a5a7b cv.and.sc.b s4,s4,s4 +.*: 69ffdffb cv.and.sc.b t6,t6,t6 +.*: 6800407b cv.and.sc.h zero,zero,zero +.*: 6810c0fb cv.and.sc.h ra,ra,ra +.*: 6821417b cv.and.sc.h sp,sp,sp +.*: 6884447b cv.and.sc.h s0,s0,s0 +.*: 694a4a7b cv.and.sc.h s4,s4,s4 +.*: 69ffcffb cv.and.sc.h t6,t6,t6 +.*: 68a0707b cv.and.sci.b zero,zero,20 +.*: 68a0f0fb cv.and.sci.b ra,ra,20 +.*: 68a1717b cv.and.sci.b sp,sp,20 +.*: 68a4747b cv.and.sci.b s0,s0,20 +.*: 68aa7a7b cv.and.sci.b s4,s4,20 +.*: 68affffb cv.and.sci.b t6,t6,20 +.*: 6903f37b cv.and.sci.b t1,t2,-32 +.*: 6803f37b cv.and.sci.b t1,t2,0 +.*: 6af3f37b cv.and.sci.b t1,t2,31 +.*: 68a0607b cv.and.sci.h zero,zero,20 +.*: 68a0e0fb cv.and.sci.h ra,ra,20 +.*: 68a1617b cv.and.sci.h sp,sp,20 +.*: 68a4647b cv.and.sci.h s0,s0,20 +.*: 68aa6a7b cv.and.sci.h s4,s4,20 +.*: 68afeffb cv.and.sci.h t6,t6,20 +.*: 6903e37b cv.and.sci.h t1,t2,-32 +.*: 6803e37b cv.and.sci.h t1,t2,0 +.*: 6af3e37b cv.and.sci.h t1,t2,31 +.*: 1000107b cv.avg.b zero,zero,zero +.*: 101090fb cv.avg.b ra,ra,ra +.*: 1021117b cv.avg.b sp,sp,sp +.*: 1084147b cv.avg.b s0,s0,s0 +.*: 114a1a7b cv.avg.b s4,s4,s4 +.*: 11ff9ffb cv.avg.b t6,t6,t6 +.*: 1000007b cv.avg.h zero,zero,zero +.*: 101080fb cv.avg.h ra,ra,ra +.*: 1021017b cv.avg.h sp,sp,sp +.*: 1084047b cv.avg.h s0,s0,s0 +.*: 114a0a7b cv.avg.h s4,s4,s4 +.*: 11ff8ffb cv.avg.h t6,t6,t6 +.*: 1000507b cv.avg.sc.b zero,zero,zero +.*: 1010d0fb cv.avg.sc.b ra,ra,ra +.*: 1021517b cv.avg.sc.b sp,sp,sp +.*: 1084547b cv.avg.sc.b s0,s0,s0 +.*: 114a5a7b cv.avg.sc.b s4,s4,s4 +.*: 11ffdffb cv.avg.sc.b t6,t6,t6 +.*: 1000407b cv.avg.sc.h zero,zero,zero +.*: 1010c0fb cv.avg.sc.h ra,ra,ra +.*: 1021417b cv.avg.sc.h sp,sp,sp +.*: 1084447b cv.avg.sc.h s0,s0,s0 +.*: 114a4a7b cv.avg.sc.h s4,s4,s4 +.*: 11ffcffb cv.avg.sc.h t6,t6,t6 +.*: 10a0707b cv.avg.sci.b zero,zero,20 +.*: 10a0f0fb cv.avg.sci.b ra,ra,20 +.*: 10a1717b cv.avg.sci.b sp,sp,20 +.*: 10a4747b cv.avg.sci.b s0,s0,20 +.*: 10aa7a7b cv.avg.sci.b s4,s4,20 +.*: 10affffb cv.avg.sci.b t6,t6,20 +.*: 1103f37b cv.avg.sci.b t1,t2,-32 +.*: 1003f37b cv.avg.sci.b t1,t2,0 +.*: 12f3f37b cv.avg.sci.b t1,t2,31 +.*: 10a0607b cv.avg.sci.h zero,zero,20 +.*: 10a0e0fb cv.avg.sci.h ra,ra,20 +.*: 10a1617b cv.avg.sci.h sp,sp,20 +.*: 10a4647b cv.avg.sci.h s0,s0,20 +.*: 10aa6a7b cv.avg.sci.h s4,s4,20 +.*: 10afeffb cv.avg.sci.h t6,t6,20 +.*: 1103e37b cv.avg.sci.h t1,t2,-32 +.*: 1003e37b cv.avg.sci.h t1,t2,0 +.*: 12f3e37b cv.avg.sci.h t1,t2,31 +.*: 1800107b cv.avgu.b zero,zero,zero +.*: 181090fb cv.avgu.b ra,ra,ra +.*: 1821117b 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sp,sp,sp +.*: 6484647b cv.subrotmj.div8 s0,s0,s0 +.*: 654a6a7b cv.subrotmj.div8 s4,s4,s4 +.*: 65ffeffb cv.subrotmj.div8 t6,t6,t6 +.*: 6400007b cv.subrotmj zero,zero,zero +.*: 641080fb cv.subrotmj ra,ra,ra +.*: 6421017b cv.subrotmj sp,sp,sp +.*: 6484047b cv.subrotmj s0,s0,s0 +.*: 654a0a7b cv.subrotmj s4,s4,s4 +.*: 65ff8ffb cv.subrotmj t6,t6,t6 +.*: 0800507b cv.sub.sc.b zero,zero,zero +.*: 0810d0fb cv.sub.sc.b ra,ra,ra +.*: 0821517b cv.sub.sc.b sp,sp,sp +.*: 0884547b cv.sub.sc.b s0,s0,s0 +.*: 094a5a7b cv.sub.sc.b s4,s4,s4 +.*: 09ffdffb cv.sub.sc.b t6,t6,t6 +.*: 0800407b cv.sub.sc.h zero,zero,zero +.*: 0810c0fb cv.sub.sc.h ra,ra,ra +.*: 0821417b cv.sub.sc.h sp,sp,sp +.*: 0884447b cv.sub.sc.h s0,s0,s0 +.*: 094a4a7b cv.sub.sc.h s4,s4,s4 +.*: 09ffcffb cv.sub.sc.h t6,t6,t6 +.*: 08a0707b cv.sub.sci.b zero,zero,20 +.*: 08a0f0fb cv.sub.sci.b ra,ra,20 +.*: 08a1717b cv.sub.sci.b sp,sp,20 +.*: 08a4747b cv.sub.sci.b s0,s0,20 +.*: 08aa7a7b cv.sub.sci.b s4,s4,20 +.*: 08affffb cv.sub.sci.b t6,t6,20 +.*: 0903f37b cv.sub.sci.b t1,t2,-32 +.*: 0803f37b cv.sub.sci.b t1,t2,0 +.*: 0af3f37b cv.sub.sci.b t1,t2,31 +.*: 08a0607b cv.sub.sci.h zero,zero,20 +.*: 08a0e0fb cv.sub.sci.h ra,ra,20 +.*: 08a1617b cv.sub.sci.h sp,sp,20 +.*: 08a4647b cv.sub.sci.h s0,s0,20 +.*: 08aa6a7b cv.sub.sci.h s4,s4,20 +.*: 08afeffb cv.sub.sci.h t6,t6,20 +.*: 0903e37b cv.sub.sci.h t1,t2,-32 +.*: 0803e37b cv.sub.sci.h t1,t2,0 +.*: 0af3e37b cv.sub.sci.h t1,t2,31 +.*: 6000107b cv.xor.b zero,zero,zero +.*: 601090fb cv.xor.b ra,ra,ra +.*: 6021117b cv.xor.b sp,sp,sp +.*: 6084147b cv.xor.b s0,s0,s0 +.*: 614a1a7b cv.xor.b s4,s4,s4 +.*: 61ff9ffb cv.xor.b t6,t6,t6 +.*: 6000007b cv.xor.h zero,zero,zero +.*: 601080fb cv.xor.h ra,ra,ra +.*: 6021017b cv.xor.h sp,sp,sp +.*: 6084047b cv.xor.h s0,s0,s0 +.*: 614a0a7b cv.xor.h s4,s4,s4 +.*: 61ff8ffb cv.xor.h t6,t6,t6 +.*: 6000507b cv.xor.sc.b zero,zero,zero +.*: 6010d0fb cv.xor.sc.b ra,ra,ra +.*: 6021517b cv.xor.sc.b sp,sp,sp +.*: 6084547b cv.xor.sc.b s0,s0,s0 +.*: 614a5a7b cv.xor.sc.b s4,s4,s4 +.*: 61ffdffb cv.xor.sc.b t6,t6,t6 +.*: 6000407b cv.xor.sc.h zero,zero,zero +.*: 6010c0fb cv.xor.sc.h ra,ra,ra +.*: 6021417b cv.xor.sc.h sp,sp,sp +.*: 6084447b cv.xor.sc.h s0,s0,s0 +.*: 614a4a7b cv.xor.sc.h s4,s4,s4 +.*: 61ffcffb cv.xor.sc.h t6,t6,t6 +.*: 60a0707b cv.xor.sci.b zero,zero,20 +.*: 60a0f0fb cv.xor.sci.b ra,ra,20 +.*: 60a1717b cv.xor.sci.b sp,sp,20 +.*: 60a4747b cv.xor.sci.b s0,s0,20 +.*: 60aa7a7b cv.xor.sci.b s4,s4,20 +.*: 60affffb cv.xor.sci.b t6,t6,20 +.*: 6103f37b cv.xor.sci.b t1,t2,-32 +.*: 6003f37b cv.xor.sci.b t1,t2,0 +.*: 62f3f37b cv.xor.sci.b t1,t2,31 +.*: 60a0607b cv.xor.sci.h zero,zero,20 +.*: 60a0e0fb cv.xor.sci.h ra,ra,20 +.*: 60a1617b cv.xor.sci.h sp,sp,20 +.*: 60a4647b cv.xor.sci.h s0,s0,20 +.*: 60aa6a7b cv.xor.sci.h s4,s4,20 +.*: 60afeffb cv.xor.sci.h t6,t6,20 +.*: 6103e37b cv.xor.sci.h t1,t2,-32 +.*: 6003e37b cv.xor.sci.h t1,t2,0 +.*: 62f3e37b cv.xor.sci.h t1,t2,31 diff --git a/gas/testsuite/gas/riscv/x-cv-simd.s b/gas/testsuite/gas/riscv/x-cv-simd.s new file mode 100644 index 0000000..d71200b --- /dev/null +++ b/gas/testsuite/gas/riscv/x-cv-simd.s @@ -0,0 +1,1498 @@ + cv.abs.b x0, x0 + cv.abs.b x1, x1 + cv.abs.b x2, x2 + cv.abs.b x8, x8 + cv.abs.b x20, x20 + cv.abs.b x31, x31 + cv.abs.h x0, x0 + cv.abs.h x1, x1 + cv.abs.h x2, x2 + cv.abs.h x8, x8 + cv.abs.h x20, x20 + cv.abs.h x31, x31 + cv.add.b x0, x0, x0 + cv.add.b x1, x1, x1 + cv.add.b x2, x2, x2 + cv.add.b x8, x8, x8 + cv.add.b x20, x20, x20 + cv.add.b x31, x31, x31 + cv.add.div2 x0, x0, x0 + cv.add.div2 x1, x1, x1 + cv.add.div2 x2, x2, x2 + cv.add.div2 x8, x8, x8 + cv.add.div2 x20, x20, x20 + cv.add.div2 x31, x31, x31 + cv.add.div4 x0, x0, x0 + cv.add.div4 x1, x1, x1 + cv.add.div4 x2, x2, x2 + cv.add.div4 x8, x8, x8 + cv.add.div4 x20, x20, x20 + cv.add.div4 x31, x31, x31 + cv.add.div8 x0, x0, x0 + cv.add.div8 x1, x1, x1 + cv.add.div8 x2, x2, x2 + cv.add.div8 x8, x8, x8 + cv.add.div8 x20, x20, x20 + cv.add.div8 x31, x31, x31 + cv.add.h x0, x0, x0 + cv.add.h x1, x1, x1 + cv.add.h x2, x2, x2 + cv.add.h x8, x8, x8 + cv.add.h x20, x20, x20 + cv.add.h x31, x31, x31 + cv.add.sc.b x0, x0, x0 + cv.add.sc.b x1, x1, x1 + cv.add.sc.b x2, x2, x2 + cv.add.sc.b x8, x8, x8 + cv.add.sc.b x20, x20, x20 + cv.add.sc.b x31, x31, x31 + cv.add.sc.h x0, x0, x0 + cv.add.sc.h x1, x1, x1 + cv.add.sc.h x2, x2, x2 + cv.add.sc.h x8, x8, x8 + cv.add.sc.h x20, x20, x20 + cv.add.sc.h x31, x31, x31 + cv.add.sci.b x0, x0, 20 + cv.add.sci.b x1, x1, 20 + cv.add.sci.b x2, x2, 20 + cv.add.sci.b x8, x8, 20 + cv.add.sci.b x20, x20, 20 + cv.add.sci.b x31, x31, 20 + cv.add.sci.b x6, x7, -32 + cv.add.sci.b x6, x7, 0 + cv.add.sci.b x6, x7, 31 + cv.add.sci.h x0, x0, 20 + cv.add.sci.h x1, x1, 20 + cv.add.sci.h x2, x2, 20 + cv.add.sci.h x8, x8, 20 + cv.add.sci.h x20, x20, 20 + cv.add.sci.h x31, x31, 20 + cv.add.sci.h x6, x7, -32 + cv.add.sci.h x6, x7, 0 + cv.add.sci.h x6, x7, 31 + cv.and.b x0, x0, x0 + cv.and.b x1, x1, x1 + cv.and.b x2, x2, x2 + cv.and.b x8, x8, x8 + cv.and.b x20, x20, x20 + cv.and.b x31, x31, x31 + cv.and.h x0, x0, x0 + cv.and.h x1, x1, x1 + cv.and.h x2, x2, x2 + cv.and.h x8, x8, x8 + cv.and.h x20, x20, x20 + cv.and.h x31, x31, x31 + cv.and.sc.b x0, x0, x0 + cv.and.sc.b x1, x1, x1 + cv.and.sc.b x2, x2, x2 + cv.and.sc.b x8, x8, x8 + cv.and.sc.b x20, x20, x20 + cv.and.sc.b x31, x31, x31 + cv.and.sc.h x0, x0, x0 + cv.and.sc.h x1, x1, x1 + cv.and.sc.h x2, x2, x2 + cv.and.sc.h x8, x8, x8 + cv.and.sc.h x20, x20, x20 + cv.and.sc.h x31, x31, x31 + cv.and.sci.b x0, x0, 20 + cv.and.sci.b x1, x1, 20 + cv.and.sci.b x2, x2, 20 + cv.and.sci.b x8, x8, 20 + cv.and.sci.b x20, x20, 20 + cv.and.sci.b x31, x31, 20 + cv.and.sci.b x6, x7, -32 + cv.and.sci.b x6, x7, 0 + cv.and.sci.b x6, x7, 31 + cv.and.sci.h x0, x0, 20 + cv.and.sci.h x1, x1, 20 + cv.and.sci.h x2, x2, 20 + cv.and.sci.h x8, x8, 20 + cv.and.sci.h x20, x20, 20 + cv.and.sci.h x31, x31, 20 + cv.and.sci.h x6, x7, -32 + cv.and.sci.h x6, x7, 0 + cv.and.sci.h x6, x7, 31 + cv.avg.b x0, x0, x0 + cv.avg.b x1, x1, x1 + cv.avg.b x2, x2, x2 + cv.avg.b x8, x8, x8 + cv.avg.b x20, x20, x20 + cv.avg.b x31, x31, x31 + cv.avg.h x0, x0, x0 + cv.avg.h x1, x1, x1 + cv.avg.h x2, x2, x2 + cv.avg.h x8, x8, x8 + cv.avg.h x20, x20, x20 + cv.avg.h x31, x31, x31 + cv.avg.sc.b x0, x0, x0 + cv.avg.sc.b x1, x1, x1 + cv.avg.sc.b x2, x2, x2 + cv.avg.sc.b x8, x8, x8 + cv.avg.sc.b x20, x20, x20 + cv.avg.sc.b x31, x31, x31 + cv.avg.sc.h x0, x0, x0 + cv.avg.sc.h x1, x1, x1 + cv.avg.sc.h x2, x2, x2 + cv.avg.sc.h x8, x8, x8 + cv.avg.sc.h x20, x20, x20 + cv.avg.sc.h x31, x31, x31 + cv.avg.sci.b x0, x0, 20 + cv.avg.sci.b x1, x1, 20 + cv.avg.sci.b x2, x2, 20 + cv.avg.sci.b x8, x8, 20 + cv.avg.sci.b x20, x20, 20 + cv.avg.sci.b x31, x31, 20 + cv.avg.sci.b x6, x7, -32 + cv.avg.sci.b x6, x7, 0 + cv.avg.sci.b x6, x7, 31 + cv.avg.sci.h x0, x0, 20 + cv.avg.sci.h x1, x1, 20 + cv.avg.sci.h x2, x2, 20 + cv.avg.sci.h x8, x8, 20 + cv.avg.sci.h x20, x20, 20 + cv.avg.sci.h x31, x31, 20 + cv.avg.sci.h x6, x7, -32 + cv.avg.sci.h x6, x7, 0 + cv.avg.sci.h x6, x7, 31 + cv.avgu.b x0, x0, x0 + cv.avgu.b x1, x1, x1 + cv.avgu.b x2, x2, x2 + cv.avgu.b x8, x8, x8 + cv.avgu.b x20, x20, x20 + cv.avgu.b x31, x31, x31 + cv.avgu.h x0, x0, x0 + cv.avgu.h x1, x1, x1 + cv.avgu.h x2, x2, x2 + cv.avgu.h x8, x8, x8 + cv.avgu.h x20, x20, x20 + cv.avgu.h x31, x31, x31 + cv.avgu.sc.b x0, x0, x0 + cv.avgu.sc.b x1, x1, x1 + cv.avgu.sc.b x2, x2, x2 + cv.avgu.sc.b x8, x8, x8 + cv.avgu.sc.b x20, x20, x20 + cv.avgu.sc.b x31, x31, x31 + cv.avgu.sc.h x0, x0, x0 + cv.avgu.sc.h x1, x1, x1 + cv.avgu.sc.h x2, x2, x2 + cv.avgu.sc.h x8, x8, x8 + cv.avgu.sc.h x20, x20, x20 + cv.avgu.sc.h x31, x31, x31 + cv.avgu.sci.b x0, x0, 20 + cv.avgu.sci.b x1, x1, 20 + cv.avgu.sci.b x2, x2, 20 + cv.avgu.sci.b x8, x8, 20 + cv.avgu.sci.b x20, x20, 20 + cv.avgu.sci.b x31, x31, 20 + cv.avgu.sci.b x6, x7, 0 + cv.avgu.sci.b x6, x7, 63 + cv.avgu.sci.h x0, x0, 20 + cv.avgu.sci.h x1, x1, 20 + cv.avgu.sci.h x2, x2, 20 + cv.avgu.sci.h x8, x8, 20 + cv.avgu.sci.h x20, x20, 20 + cv.avgu.sci.h x31, x31, 20 + cv.avgu.sci.h x6, x7, 0 + cv.avgu.sci.h x6, x7, 63 + cv.cmpeq.b x0, x0, x0 + cv.cmpeq.b x1, x1, x1 + cv.cmpeq.b x2, x2, x2 + cv.cmpeq.b x8, x8, x8 + cv.cmpeq.b x20, x20, x20 + cv.cmpeq.b x31, x31, x31 + cv.cmpeq.h x0, x0, x0 + cv.cmpeq.h x1, x1, x1 + cv.cmpeq.h x2, x2, x2 + cv.cmpeq.h x8, x8, x8 + cv.cmpeq.h x20, x20, x20 + cv.cmpeq.h x31, x31, x31 + cv.cmpeq.sc.b x0, x0, x0 + cv.cmpeq.sc.b x1, x1, x1 + cv.cmpeq.sc.b x2, x2, x2 + cv.cmpeq.sc.b x8, x8, x8 + cv.cmpeq.sc.b x20, x20, x20 + cv.cmpeq.sc.b x31, x31, x31 + cv.cmpeq.sc.h x0, x0, x0 + cv.cmpeq.sc.h x1, x1, x1 + cv.cmpeq.sc.h x2, x2, x2 + cv.cmpeq.sc.h x8, x8, x8 + cv.cmpeq.sc.h x20, x20, x20 + cv.cmpeq.sc.h x31, x31, x31 + cv.cmpeq.sci.b x0, x0, 20 + cv.cmpeq.sci.b x1, x1, 20 + cv.cmpeq.sci.b x2, x2, 20 + cv.cmpeq.sci.b x8, x8, 20 + cv.cmpeq.sci.b x20, x20, 20 + cv.cmpeq.sci.b x31, x31, 20 + cv.cmpeq.sci.b x6, x7, -32 + cv.cmpeq.sci.b x6, x7, 0 + cv.cmpeq.sci.b x6, x7, 31 + cv.cmpeq.sci.h x0, x0, 20 + cv.cmpeq.sci.h x1, x1, 20 + cv.cmpeq.sci.h x2, x2, 20 + cv.cmpeq.sci.h x8, x8, 20 + cv.cmpeq.sci.h x20, x20, 20 + cv.cmpeq.sci.h x31, x31, 20 + cv.cmpeq.sci.h x6, x7, -32 + cv.cmpeq.sci.h x6, x7, 0 + cv.cmpeq.sci.h x6, x7, 31 + cv.cmpge.b x0, x0, x0 + cv.cmpge.b x1, x1, x1 + cv.cmpge.b x2, x2, x2 + cv.cmpge.b x8, x8, x8 + cv.cmpge.b x20, x20, x20 + cv.cmpge.b x31, x31, x31 + cv.cmpge.h x0, x0, x0 + cv.cmpge.h x1, x1, x1 + cv.cmpge.h x2, x2, x2 + cv.cmpge.h x8, x8, x8 + cv.cmpge.h x20, x20, x20 + cv.cmpge.h x31, x31, x31 + cv.cmpge.sc.b x0, x0, x0 + cv.cmpge.sc.b x1, x1, x1 + cv.cmpge.sc.b x2, x2, x2 + cv.cmpge.sc.b x8, x8, x8 + cv.cmpge.sc.b x20, x20, x20 + cv.cmpge.sc.b x31, x31, x31 + cv.cmpge.sc.h x0, x0, x0 + cv.cmpge.sc.h x1, x1, x1 + cv.cmpge.sc.h x2, x2, x2 + cv.cmpge.sc.h x8, x8, x8 + cv.cmpge.sc.h x20, x20, x20 + cv.cmpge.sc.h x31, x31, x31 + cv.cmpge.sci.b x0, x0, 20 + cv.cmpge.sci.b x1, x1, 20 + cv.cmpge.sci.b x2, x2, 20 + cv.cmpge.sci.b x8, x8, 20 + cv.cmpge.sci.b x20, x20, 20 + cv.cmpge.sci.b x31, x31, 20 + cv.cmpge.sci.b x6, x7, -32 + cv.cmpge.sci.b x6, x7, 0 + cv.cmpge.sci.b x6, x7, 31 + cv.cmpge.sci.h x0, x0, 20 + cv.cmpge.sci.h x1, x1, 20 + cv.cmpge.sci.h x2, x2, 20 + cv.cmpge.sci.h x8, x8, 20 + cv.cmpge.sci.h x20, x20, 20 + cv.cmpge.sci.h x31, x31, 20 + cv.cmpge.sci.h x6, x7, -32 + cv.cmpge.sci.h x6, x7, 0 + cv.cmpge.sci.h x6, x7, 31 + cv.cmpgeu.b x0, x0, x0 + cv.cmpgeu.b x1, x1, x1 + cv.cmpgeu.b x2, x2, x2 + cv.cmpgeu.b x8, x8, x8 + cv.cmpgeu.b x20, x20, x20 + cv.cmpgeu.b x31, x31, x31 + cv.cmpgeu.h x0, x0, x0 + cv.cmpgeu.h x1, x1, x1 + cv.cmpgeu.h x2, x2, x2 + cv.cmpgeu.h x8, x8, x8 + cv.cmpgeu.h x20, x20, x20 + cv.cmpgeu.h x31, x31, x31 + cv.cmpgeu.sc.b x0, x0, x0 + cv.cmpgeu.sc.b x1, x1, x1 + cv.cmpgeu.sc.b x2, x2, x2 + cv.cmpgeu.sc.b x8, x8, x8 + cv.cmpgeu.sc.b x20, x20, x20 + cv.cmpgeu.sc.b x31, x31, x31 + cv.cmpgeu.sc.h x0, x0, x0 + cv.cmpgeu.sc.h x1, x1, x1 + cv.cmpgeu.sc.h x2, x2, x2 + cv.cmpgeu.sc.h x8, x8, x8 + cv.cmpgeu.sc.h x20, x20, x20 + cv.cmpgeu.sc.h x31, x31, x31 + cv.cmpgeu.sci.b x0, x0, 20 + cv.cmpgeu.sci.b x1, x1, 20 + cv.cmpgeu.sci.b x2, x2, 20 + cv.cmpgeu.sci.b x8, x8, 20 + cv.cmpgeu.sci.b x20, x20, 20 + cv.cmpgeu.sci.b x31, x31, 20 + cv.cmpgeu.sci.b x6, x7, 0 + cv.cmpgeu.sci.b x6, x7, 63 + cv.cmpgeu.sci.h x0, x0, 20 + cv.cmpgeu.sci.h x1, x1, 20 + cv.cmpgeu.sci.h x2, x2, 20 + cv.cmpgeu.sci.h x8, x8, 20 + cv.cmpgeu.sci.h x20, x20, 20 + cv.cmpgeu.sci.h x31, x31, 20 + cv.cmpgeu.sci.h x6, x7, 0 + cv.cmpgeu.sci.h x6, x7, 63 + cv.cmpgt.b x0, x0, x0 + cv.cmpgt.b x1, x1, x1 + cv.cmpgt.b x2, x2, x2 + cv.cmpgt.b x8, x8, x8 + cv.cmpgt.b x20, x20, x20 + cv.cmpgt.b x31, x31, x31 + cv.cmpgt.h x0, x0, x0 + cv.cmpgt.h x1, x1, x1 + cv.cmpgt.h x2, x2, x2 + cv.cmpgt.h x8, x8, x8 + cv.cmpgt.h x20, x20, x20 + cv.cmpgt.h x31, x31, x31 + cv.cmpgt.sc.b x0, x0, x0 + cv.cmpgt.sc.b x1, x1, x1 + cv.cmpgt.sc.b x2, x2, x2 + cv.cmpgt.sc.b x8, x8, x8 + cv.cmpgt.sc.b x20, x20, x20 + cv.cmpgt.sc.b x31, x31, x31 + cv.cmpgt.sc.h x0, x0, x0 + cv.cmpgt.sc.h x1, x1, x1 + cv.cmpgt.sc.h x2, x2, x2 + cv.cmpgt.sc.h x8, x8, x8 + cv.cmpgt.sc.h x20, x20, x20 + cv.cmpgt.sc.h x31, x31, x31 + cv.cmpgt.sci.b x0, x0, 20 + cv.cmpgt.sci.b x1, x1, 20 + cv.cmpgt.sci.b x2, x2, 20 + cv.cmpgt.sci.b x8, x8, 20 + cv.cmpgt.sci.b x20, x20, 20 + cv.cmpgt.sci.b x31, x31, 20 + cv.cmpgt.sci.b x6, x7, -32 + cv.cmpgt.sci.b x6, x7, 0 + cv.cmpgt.sci.b x6, x7, 31 + cv.cmpgt.sci.h x0, x0, 20 + cv.cmpgt.sci.h x1, x1, 20 + cv.cmpgt.sci.h x2, x2, 20 + cv.cmpgt.sci.h x8, x8, 20 + cv.cmpgt.sci.h x20, x20, 20 + cv.cmpgt.sci.h x31, x31, 20 + cv.cmpgt.sci.h x6, x7, -32 + cv.cmpgt.sci.h x6, x7, 0 + cv.cmpgt.sci.h x6, x7, 31 + cv.cmpgtu.b x0, x0, x0 + cv.cmpgtu.b x1, x1, x1 + cv.cmpgtu.b x2, x2, x2 + cv.cmpgtu.b x8, x8, x8 + cv.cmpgtu.b x20, x20, x20 + cv.cmpgtu.b x31, x31, x31 + cv.cmpgtu.h x0, x0, x0 + cv.cmpgtu.h x1, x1, x1 + cv.cmpgtu.h x2, x2, x2 + cv.cmpgtu.h x8, x8, x8 + cv.cmpgtu.h x20, x20, x20 + cv.cmpgtu.h x31, x31, x31 + cv.cmpgtu.sc.b x0, x0, x0 + cv.cmpgtu.sc.b x1, x1, x1 + cv.cmpgtu.sc.b x2, x2, x2 + cv.cmpgtu.sc.b x8, x8, x8 + cv.cmpgtu.sc.b x20, x20, x20 + cv.cmpgtu.sc.b x31, x31, x31 + cv.cmpgtu.sc.h x0, x0, x0 + cv.cmpgtu.sc.h x1, x1, x1 + cv.cmpgtu.sc.h x2, x2, x2 + cv.cmpgtu.sc.h x8, x8, x8 + cv.cmpgtu.sc.h x20, x20, x20 + cv.cmpgtu.sc.h x31, x31, x31 + cv.cmpgtu.sci.b x0, x0, 20 + cv.cmpgtu.sci.b x1, x1, 20 + cv.cmpgtu.sci.b x2, x2, 20 + cv.cmpgtu.sci.b x8, x8, 20 + cv.cmpgtu.sci.b x20, x20, 20 + cv.cmpgtu.sci.b x31, x31, 20 + cv.cmpgtu.sci.b x6, x7, 0 + cv.cmpgtu.sci.b x6, x7, 63 + cv.cmpgtu.sci.h x0, x0, 20 + cv.cmpgtu.sci.h x1, x1, 20 + cv.cmpgtu.sci.h x2, x2, 20 + cv.cmpgtu.sci.h x8, x8, 20 + cv.cmpgtu.sci.h x20, x20, 20 + cv.cmpgtu.sci.h x31, x31, 20 + cv.cmpgtu.sci.h x6, x7, 0 + cv.cmpgtu.sci.h x6, x7, 63 + cv.cmple.b x0, x0, x0 + cv.cmple.b x1, x1, x1 + cv.cmple.b x2, x2, x2 + cv.cmple.b x8, x8, x8 + cv.cmple.b x20, x20, x20 + cv.cmple.b x31, x31, x31 + cv.cmple.h x0, x0, x0 + cv.cmple.h x1, x1, x1 + cv.cmple.h x2, x2, x2 + cv.cmple.h x8, x8, x8 + cv.cmple.h x20, x20, x20 + cv.cmple.h x31, x31, x31 + cv.cmple.sc.b x0, x0, x0 + cv.cmple.sc.b x1, x1, x1 + cv.cmple.sc.b x2, x2, x2 + cv.cmple.sc.b x8, x8, x8 + cv.cmple.sc.b x20, x20, x20 + cv.cmple.sc.b x31, x31, x31 + cv.cmple.sc.h x0, x0, x0 + cv.cmple.sc.h x1, x1, x1 + cv.cmple.sc.h x2, x2, x2 + cv.cmple.sc.h x8, x8, x8 + cv.cmple.sc.h x20, x20, x20 + cv.cmple.sc.h x31, x31, x31 + cv.cmple.sci.b x0, x0, 20 + cv.cmple.sci.b x1, x1, 20 + cv.cmple.sci.b x2, x2, 20 + cv.cmple.sci.b x8, x8, 20 + cv.cmple.sci.b x20, x20, 20 + cv.cmple.sci.b x31, x31, 20 + cv.cmple.sci.b x6, x7, -32 + cv.cmple.sci.b x6, x7, 0 + cv.cmple.sci.b x6, x7, 31 + cv.cmple.sci.h x0, x0, 20 + cv.cmple.sci.h x1, x1, 20 + cv.cmple.sci.h x2, x2, 20 + cv.cmple.sci.h x8, x8, 20 + cv.cmple.sci.h x20, x20, 20 + cv.cmple.sci.h x31, x31, 20 + cv.cmple.sci.h x6, x7, -32 + cv.cmple.sci.h x6, x7, 0 + cv.cmple.sci.h x6, x7, 31 + cv.cmpleu.b x0, x0, x0 + cv.cmpleu.b x1, x1, x1 + cv.cmpleu.b x2, x2, x2 + cv.cmpleu.b x8, x8, x8 + cv.cmpleu.b x20, x20, x20 + cv.cmpleu.b x31, x31, x31 + cv.cmpleu.h x0, x0, x0 + cv.cmpleu.h x1, x1, x1 + cv.cmpleu.h x2, x2, x2 + cv.cmpleu.h x8, x8, x8 + cv.cmpleu.h x20, x20, x20 + cv.cmpleu.h x31, x31, x31 + cv.cmpleu.sc.b x0, x0, x0 + cv.cmpleu.sc.b x1, x1, x1 + cv.cmpleu.sc.b x2, x2, x2 + cv.cmpleu.sc.b x8, x8, x8 + cv.cmpleu.sc.b x20, x20, x20 + cv.cmpleu.sc.b x31, x31, x31 + cv.cmpleu.sc.h x0, x0, x0 + cv.cmpleu.sc.h x1, x1, x1 + cv.cmpleu.sc.h x2, x2, x2 + cv.cmpleu.sc.h x8, x8, x8 + cv.cmpleu.sc.h x20, x20, x20 + cv.cmpleu.sc.h x31, x31, x31 + cv.cmpleu.sci.b x0, x0, 20 + cv.cmpleu.sci.b x1, x1, 20 + cv.cmpleu.sci.b x2, x2, 20 + cv.cmpleu.sci.b x8, x8, 20 + cv.cmpleu.sci.b x20, x20, 20 + cv.cmpleu.sci.b x31, x31, 20 + cv.cmpleu.sci.b x6, x7, 0 + cv.cmpleu.sci.b x6, x7, 63 + cv.cmpleu.sci.h x0, x0, 20 + cv.cmpleu.sci.h x1, x1, 20 + cv.cmpleu.sci.h x2, x2, 20 + cv.cmpleu.sci.h x8, x8, 20 + cv.cmpleu.sci.h x20, x20, 20 + cv.cmpleu.sci.h x31, x31, 20 + cv.cmpleu.sci.h x6, x7, 0 + cv.cmpleu.sci.h x6, x7, 63 + cv.cmplt.b x0, x0, x0 + cv.cmplt.b x1, x1, x1 + cv.cmplt.b x2, x2, x2 + cv.cmplt.b x8, x8, x8 + cv.cmplt.b x20, x20, x20 + cv.cmplt.b x31, x31, x31 + cv.cmplt.h x0, x0, x0 + cv.cmplt.h x1, x1, x1 + cv.cmplt.h x2, x2, x2 + cv.cmplt.h x8, x8, x8 + cv.cmplt.h x20, x20, x20 + cv.cmplt.h x31, x31, x31 + cv.cmplt.sc.b x0, x0, x0 + cv.cmplt.sc.b x1, x1, x1 + cv.cmplt.sc.b x2, x2, x2 + cv.cmplt.sc.b x8, x8, x8 + cv.cmplt.sc.b x20, x20, x20 + cv.cmplt.sc.b x31, x31, x31 + cv.cmplt.sc.h x0, x0, x0 + cv.cmplt.sc.h x1, x1, x1 + cv.cmplt.sc.h x2, x2, x2 + cv.cmplt.sc.h x8, x8, x8 + cv.cmplt.sc.h x20, x20, x20 + cv.cmplt.sc.h x31, x31, x31 + cv.cmplt.sci.b x0, x0, 20 + cv.cmplt.sci.b x1, x1, 20 + cv.cmplt.sci.b x2, x2, 20 + cv.cmplt.sci.b x8, x8, 20 + cv.cmplt.sci.b x20, x20, 20 + cv.cmplt.sci.b x31, x31, 20 + cv.cmplt.sci.b x6, x7, -32 + cv.cmplt.sci.b x6, x7, 0 + cv.cmplt.sci.b x6, x7, 31 + cv.cmplt.sci.h x0, x0, 20 + cv.cmplt.sci.h x1, x1, 20 + cv.cmplt.sci.h x2, x2, 20 + cv.cmplt.sci.h x8, x8, 20 + cv.cmplt.sci.h x20, x20, 20 + cv.cmplt.sci.h x31, x31, 20 + cv.cmplt.sci.h x6, x7, -32 + cv.cmplt.sci.h x6, x7, 0 + cv.cmplt.sci.h x6, x7, 31 + cv.cmpltu.b x0, x0, x0 + cv.cmpltu.b x1, x1, x1 + cv.cmpltu.b x2, x2, x2 + cv.cmpltu.b x8, x8, x8 + cv.cmpltu.b x20, x20, x20 + cv.cmpltu.b x31, x31, x31 + cv.cmpltu.h x0, x0, x0 + cv.cmpltu.h x1, x1, x1 + cv.cmpltu.h x2, x2, x2 + cv.cmpltu.h x8, x8, x8 + cv.cmpltu.h x20, x20, x20 + cv.cmpltu.h x31, x31, x31 + cv.cmpltu.sc.b x0, x0, x0 + cv.cmpltu.sc.b x1, x1, x1 + cv.cmpltu.sc.b x2, x2, x2 + cv.cmpltu.sc.b x8, x8, x8 + cv.cmpltu.sc.b x20, x20, x20 + cv.cmpltu.sc.b x31, x31, x31 + cv.cmpltu.sc.h x0, x0, x0 + cv.cmpltu.sc.h x1, x1, x1 + cv.cmpltu.sc.h x2, x2, x2 + cv.cmpltu.sc.h x8, x8, x8 + cv.cmpltu.sc.h x20, x20, x20 + cv.cmpltu.sc.h x31, x31, x31 + cv.cmpltu.sci.b x0, x0, 20 + cv.cmpltu.sci.b x1, x1, 20 + cv.cmpltu.sci.b x2, x2, 20 + cv.cmpltu.sci.b x8, x8, 20 + cv.cmpltu.sci.b x20, x20, 20 + cv.cmpltu.sci.b x31, x31, 20 + cv.cmpltu.sci.b x6, x7, 0 + cv.cmpltu.sci.b x6, x7, 63 + cv.cmpltu.sci.h x0, x0, 20 + cv.cmpltu.sci.h x1, x1, 20 + cv.cmpltu.sci.h x2, x2, 20 + cv.cmpltu.sci.h x8, x8, 20 + cv.cmpltu.sci.h x20, x20, 20 + cv.cmpltu.sci.h x31, x31, 20 + cv.cmpltu.sci.h x6, x7, 0 + cv.cmpltu.sci.h x6, x7, 63 + cv.cmpne.b x0, x0, x0 + cv.cmpne.b x1, x1, x1 + cv.cmpne.b x2, x2, x2 + cv.cmpne.b x8, x8, x8 + cv.cmpne.b x20, x20, x20 + cv.cmpne.b x31, x31, x31 + cv.cmpne.h x0, x0, x0 + cv.cmpne.h x1, x1, x1 + cv.cmpne.h x2, x2, x2 + cv.cmpne.h x8, x8, x8 + cv.cmpne.h x20, x20, x20 + cv.cmpne.h x31, x31, x31 + cv.cmpne.sc.b x0, x0, x0 + cv.cmpne.sc.b x1, x1, x1 + cv.cmpne.sc.b x2, x2, x2 + cv.cmpne.sc.b x8, x8, x8 + cv.cmpne.sc.b x20, x20, x20 + cv.cmpne.sc.b x31, x31, x31 + cv.cmpne.sc.h x0, x0, x0 + cv.cmpne.sc.h x1, x1, x1 + cv.cmpne.sc.h x2, x2, x2 + cv.cmpne.sc.h x8, x8, x8 + cv.cmpne.sc.h x20, x20, x20 + cv.cmpne.sc.h x31, x31, x31 + cv.cmpne.sci.b x0, x0, 20 + cv.cmpne.sci.b x1, x1, 20 + cv.cmpne.sci.b x2, x2, 20 + cv.cmpne.sci.b x8, x8, 20 + cv.cmpne.sci.b x20, x20, 20 + cv.cmpne.sci.b x31, x31, 20 + cv.cmpne.sci.b x6, x7, -32 + cv.cmpne.sci.b x6, x7, 0 + cv.cmpne.sci.b x6, x7, 31 + cv.cmpne.sci.h x0, x0, 20 + cv.cmpne.sci.h x1, x1, 20 + cv.cmpne.sci.h x2, x2, 20 + cv.cmpne.sci.h x8, x8, 20 + cv.cmpne.sci.h x20, x20, 20 + cv.cmpne.sci.h x31, x31, 20 + cv.cmpne.sci.h x6, x7, -32 + cv.cmpne.sci.h x6, x7, 0 + cv.cmpne.sci.h x6, x7, 31 + cv.cplxconj x0, x0 + cv.cplxconj x1, x1 + cv.cplxconj x2, x2 + cv.cplxconj x8, x8 + cv.cplxconj x20, x20 + cv.cplxconj x31, x31 + cv.cplxmul.i.div2 x0, x0, x0 + cv.cplxmul.i.div2 x1, x1, x1 + cv.cplxmul.i.div2 x2, x2, x2 + cv.cplxmul.i.div2 x8, x8, x8 + cv.cplxmul.i.div2 x20, x20, x20 + cv.cplxmul.i.div2 x31, x31, x31 + cv.cplxmul.i.div4 x0, x0, x0 + cv.cplxmul.i.div4 x1, x1, x1 + cv.cplxmul.i.div4 x2, x2, x2 + cv.cplxmul.i.div4 x8, x8, x8 + cv.cplxmul.i.div4 x20, x20, x20 + cv.cplxmul.i.div4 x31, x31, x31 + cv.cplxmul.i.div8 x0, x0, x0 + cv.cplxmul.i.div8 x1, x1, x1 + cv.cplxmul.i.div8 x2, x2, x2 + cv.cplxmul.i.div8 x8, x8, x8 + cv.cplxmul.i.div8 x20, x20, x20 + cv.cplxmul.i.div8 x31, x31, x31 + cv.cplxmul.i x0, x0, x0 + cv.cplxmul.i x1, x1, x1 + cv.cplxmul.i x2, x2, x2 + cv.cplxmul.i x8, x8, x8 + cv.cplxmul.i x20, x20, x20 + cv.cplxmul.i x31, x31, x31 + cv.cplxmul.r.div2 x0, x0, x0 + cv.cplxmul.r.div2 x1, x1, x1 + cv.cplxmul.r.div2 x2, x2, x2 + cv.cplxmul.r.div2 x8, x8, x8 + cv.cplxmul.r.div2 x20, x20, x20 + cv.cplxmul.r.div2 x31, x31, x31 + cv.cplxmul.r.div4 x0, x0, x0 + cv.cplxmul.r.div4 x1, x1, x1 + cv.cplxmul.r.div4 x2, x2, x2 + cv.cplxmul.r.div4 x8, x8, x8 + cv.cplxmul.r.div4 x20, x20, x20 + cv.cplxmul.r.div4 x31, x31, x31 + cv.cplxmul.r.div8 x0, x0, x0 + cv.cplxmul.r.div8 x1, x1, x1 + cv.cplxmul.r.div8 x2, x2, x2 + cv.cplxmul.r.div8 x8, x8, x8 + cv.cplxmul.r.div8 x20, x20, x20 + cv.cplxmul.r.div8 x31, x31, x31 + cv.cplxmul.r x0, x0, x0 + cv.cplxmul.r x1, x1, x1 + cv.cplxmul.r x2, x2, x2 + cv.cplxmul.r x8, x8, x8 + cv.cplxmul.r x20, x20, x20 + cv.cplxmul.r x31, x31, x31 + cv.dotsp.b x0, x0, x0 + cv.dotsp.b x1, x1, x1 + cv.dotsp.b x2, x2, x2 + cv.dotsp.b x8, x8, x8 + cv.dotsp.b x20, x20, x20 + cv.dotsp.b x31, x31, x31 + cv.dotsp.h x0, x0, x0 + cv.dotsp.h x1, x1, x1 + cv.dotsp.h x2, x2, x2 + cv.dotsp.h x8, x8, x8 + cv.dotsp.h x20, x20, x20 + cv.dotsp.h x31, x31, x31 + cv.dotsp.sc.b x0, x0, x0 + cv.dotsp.sc.b x1, x1, x1 + cv.dotsp.sc.b x2, x2, x2 + cv.dotsp.sc.b x8, x8, x8 + cv.dotsp.sc.b x20, x20, x20 + cv.dotsp.sc.b x31, x31, x31 + cv.dotsp.sc.h x0, x0, x0 + cv.dotsp.sc.h x1, x1, x1 + cv.dotsp.sc.h x2, x2, x2 + cv.dotsp.sc.h x8, x8, x8 + cv.dotsp.sc.h x20, x20, x20 + cv.dotsp.sc.h x31, x31, x31 + cv.dotsp.sci.b x0, x0, 20 + cv.dotsp.sci.b x1, x1, 20 + cv.dotsp.sci.b x2, x2, 20 + cv.dotsp.sci.b x8, x8, 20 + cv.dotsp.sci.b x20, x20, 20 + cv.dotsp.sci.b x31, x31, 20 + cv.dotsp.sci.b x6, x7, -32 + cv.dotsp.sci.b x6, x7, 0 + cv.dotsp.sci.b x6, x7, 31 + cv.dotsp.sci.h x0, x0, 20 + cv.dotsp.sci.h x1, x1, 20 + cv.dotsp.sci.h x2, x2, 20 + cv.dotsp.sci.h x8, x8, 20 + cv.dotsp.sci.h x20, x20, 20 + cv.dotsp.sci.h x31, x31, 20 + cv.dotsp.sci.h x6, x7, -32 + cv.dotsp.sci.h x6, x7, 0 + cv.dotsp.sci.h x6, x7, 31 + cv.dotup.b x0, x0, x0 + cv.dotup.b x1, x1, x1 + cv.dotup.b x2, x2, x2 + cv.dotup.b x8, x8, x8 + cv.dotup.b x20, x20, x20 + cv.dotup.b x31, x31, x31 + cv.dotup.h x0, x0, x0 + cv.dotup.h x1, x1, x1 + cv.dotup.h x2, x2, x2 + cv.dotup.h x8, x8, x8 + cv.dotup.h x20, x20, x20 + cv.dotup.h x31, x31, x31 + cv.dotup.sc.b x0, x0, x0 + cv.dotup.sc.b x1, x1, x1 + cv.dotup.sc.b x2, x2, x2 + cv.dotup.sc.b x8, x8, x8 + cv.dotup.sc.b x20, x20, x20 + cv.dotup.sc.b x31, x31, x31 + cv.dotup.sc.h x0, x0, x0 + cv.dotup.sc.h x1, x1, x1 + cv.dotup.sc.h x2, x2, x2 + cv.dotup.sc.h x8, x8, x8 + cv.dotup.sc.h x20, x20, x20 + cv.dotup.sc.h x31, x31, x31 + cv.dotup.sci.b x0, x0, 20 + cv.dotup.sci.b x1, x1, 20 + cv.dotup.sci.b x2, x2, 20 + cv.dotup.sci.b x8, x8, 20 + cv.dotup.sci.b x20, x20, 20 + cv.dotup.sci.b x31, x31, 20 + cv.dotup.sci.b x6, x7, 0 + cv.dotup.sci.b x6, x7, 63 + cv.dotup.sci.h x0, x0, 20 + cv.dotup.sci.h x1, x1, 20 + cv.dotup.sci.h x2, x2, 20 + cv.dotup.sci.h x8, x8, 20 + cv.dotup.sci.h x20, x20, 20 + cv.dotup.sci.h x31, x31, 20 + cv.dotup.sci.h x6, x7, 0 + cv.dotup.sci.h x6, x7, 63 + cv.dotusp.b x0, x0, x0 + cv.dotusp.b x1, x1, x1 + cv.dotusp.b x2, x2, x2 + cv.dotusp.b x8, x8, x8 + cv.dotusp.b x20, x20, x20 + cv.dotusp.b x31, x31, x31 + cv.dotusp.h x0, x0, x0 + cv.dotusp.h x1, x1, x1 + cv.dotusp.h x2, x2, x2 + cv.dotusp.h x8, x8, x8 + cv.dotusp.h x20, x20, x20 + cv.dotusp.h x31, x31, x31 + cv.dotusp.sc.b x0, x0, x0 + cv.dotusp.sc.b x1, x1, x1 + cv.dotusp.sc.b x2, x2, x2 + cv.dotusp.sc.b x8, x8, x8 + cv.dotusp.sc.b x20, x20, x20 + cv.dotusp.sc.b x31, x31, x31 + cv.dotusp.sc.h x0, x0, x0 + cv.dotusp.sc.h x1, x1, x1 + cv.dotusp.sc.h x2, x2, x2 + cv.dotusp.sc.h x8, x8, x8 + cv.dotusp.sc.h x20, x20, x20 + cv.dotusp.sc.h x31, x31, x31 + cv.dotusp.sci.b x0, x0, 20 + cv.dotusp.sci.b x1, x1, 20 + cv.dotusp.sci.b x2, x2, 20 + cv.dotusp.sci.b x8, x8, 20 + cv.dotusp.sci.b x20, x20, 20 + cv.dotusp.sci.b x31, x31, 20 + cv.dotusp.sci.b x6, x7, -32 + cv.dotusp.sci.b x6, x7, 0 + cv.dotusp.sci.b x6, x7, 31 + cv.dotusp.sci.h x0, x0, 20 + cv.dotusp.sci.h x1, x1, 20 + cv.dotusp.sci.h x2, x2, 20 + cv.dotusp.sci.h x8, x8, 20 + cv.dotusp.sci.h x20, x20, 20 + cv.dotusp.sci.h x31, x31, 20 + cv.dotusp.sci.h x6, x7, -32 + cv.dotusp.sci.h x6, x7, 0 + cv.dotusp.sci.h x6, x7, 31 + cv.extract.b x0, x0, 2 + cv.extract.b x1, x1, 2 + cv.extract.b x2, x2, 2 + cv.extract.b x8, x8, 2 + cv.extract.b x20, x20, 2 + cv.extract.b x31, x31, 2 + cv.extract.b x6, x7, 0 + cv.extract.b x6, x7, 3 + cv.extract.h x0, x0, 1 + cv.extract.h x1, x1, 1 + cv.extract.h x2, x2, 1 + cv.extract.h x8, x8, 1 + cv.extract.h x20, x20, 1 + cv.extract.h x31, x31, 1 + cv.extract.h x6, x7, 0 + cv.extract.h x6, x7, 1 + cv.extractu.b x0, x0, 2 + cv.extractu.b x1, x1, 2 + cv.extractu.b x2, x2, 2 + cv.extractu.b x8, x8, 2 + cv.extractu.b x20, x20, 2 + cv.extractu.b x31, x31, 2 + cv.extractu.b x6, x7, 0 + cv.extractu.b x6, x7, 3 + cv.extractu.h x0, x0, 1 + cv.extractu.h x1, x1, 1 + cv.extractu.h x2, x2, 1 + cv.extractu.h x8, x8, 1 + cv.extractu.h x20, x20, 1 + cv.extractu.h x31, x31, 1 + cv.extractu.h x6, x7, 0 + cv.extractu.h x6, x7, 1 + cv.insert.b x0, x0, 2 + cv.insert.b x1, x1, 2 + cv.insert.b x2, x2, 2 + cv.insert.b x8, x8, 2 + cv.insert.b x20, x20, 2 + cv.insert.b x31, x31, 2 + cv.insert.b x6, x7, 0 + cv.insert.b x6, x7, 3 + cv.insert.h x0, x0, 1 + cv.insert.h x1, x1, 1 + cv.insert.h x2, x2, 1 + cv.insert.h x8, x8, 1 + cv.insert.h x20, x20, 1 + cv.insert.h x31, x31, 1 + cv.insert.h x6, x7, 0 + cv.insert.h x6, x7, 1 + cv.max.b x0, x0, x0 + cv.max.b x1, x1, x1 + cv.max.b x2, x2, x2 + cv.max.b x8, x8, x8 + cv.max.b x20, x20, x20 + cv.max.b x31, x31, x31 + cv.max.h x0, x0, x0 + cv.max.h x1, x1, x1 + cv.max.h x2, x2, x2 + cv.max.h x8, x8, x8 + cv.max.h x20, x20, x20 + cv.max.h x31, x31, x31 + cv.max.sc.b x0, x0, x0 + cv.max.sc.b x1, x1, x1 + cv.max.sc.b x2, x2, x2 + cv.max.sc.b x8, x8, x8 + cv.max.sc.b x20, x20, x20 + cv.max.sc.b x31, x31, x31 + cv.max.sc.h x0, x0, x0 + cv.max.sc.h x1, x1, x1 + cv.max.sc.h x2, x2, x2 + cv.max.sc.h x8, x8, x8 + cv.max.sc.h x20, x20, x20 + cv.max.sc.h x31, x31, x31 + cv.max.sci.b x0, x0, 20 + cv.max.sci.b x1, x1, 20 + cv.max.sci.b x2, x2, 20 + cv.max.sci.b x8, x8, 20 + cv.max.sci.b x20, x20, 20 + cv.max.sci.b x31, x31, 20 + cv.max.sci.b x6, x7, -32 + cv.max.sci.b x6, x7, 0 + cv.max.sci.b x6, x7, 31 + cv.max.sci.h x0, x0, 20 + cv.max.sci.h x1, x1, 20 + cv.max.sci.h x2, x2, 20 + cv.max.sci.h x8, x8, 20 + cv.max.sci.h x20, x20, 20 + cv.max.sci.h x31, x31, 20 + cv.max.sci.h x6, x7, -32 + cv.max.sci.h x6, x7, 0 + cv.max.sci.h x6, x7, 31 + cv.maxu.b x0, x0, x0 + cv.maxu.b x1, x1, x1 + cv.maxu.b x2, x2, x2 + cv.maxu.b x8, x8, x8 + cv.maxu.b x20, x20, x20 + cv.maxu.b x31, x31, x31 + cv.maxu.h x0, x0, x0 + cv.maxu.h x1, x1, x1 + cv.maxu.h x2, x2, x2 + cv.maxu.h x8, x8, x8 + cv.maxu.h x20, x20, x20 + cv.maxu.h x31, x31, x31 + cv.maxu.sc.b x0, x0, x0 + cv.maxu.sc.b x1, x1, x1 + cv.maxu.sc.b x2, x2, x2 + cv.maxu.sc.b x8, x8, x8 + cv.maxu.sc.b x20, x20, x20 + cv.maxu.sc.b x31, x31, x31 + cv.maxu.sc.h x0, x0, x0 + cv.maxu.sc.h x1, x1, x1 + cv.maxu.sc.h x2, x2, x2 + cv.maxu.sc.h x8, x8, x8 + cv.maxu.sc.h x20, x20, x20 + cv.maxu.sc.h x31, x31, x31 + cv.maxu.sci.b x0, x0, 20 + cv.maxu.sci.b x1, x1, 20 + cv.maxu.sci.b x2, x2, 20 + cv.maxu.sci.b x8, x8, 20 + cv.maxu.sci.b x20, x20, 20 + cv.maxu.sci.b x31, x31, 20 + cv.maxu.sci.b x6, x7, 0 + cv.maxu.sci.b x6, x7, 63 + cv.maxu.sci.h x0, x0, 20 + cv.maxu.sci.h x1, x1, 20 + cv.maxu.sci.h x2, x2, 20 + cv.maxu.sci.h x8, x8, 20 + cv.maxu.sci.h x20, x20, 20 + cv.maxu.sci.h x31, x31, 20 + cv.maxu.sci.h x6, x7, 0 + cv.maxu.sci.h x6, x7, 63 + cv.min.b x0, x0, x0 + cv.min.b x1, x1, x1 + cv.min.b x2, x2, x2 + cv.min.b x8, x8, x8 + cv.min.b x20, x20, x20 + cv.min.b x31, x31, x31 + cv.min.h x0, x0, x0 + cv.min.h x1, x1, x1 + cv.min.h x2, x2, x2 + cv.min.h x8, x8, x8 + cv.min.h x20, x20, x20 + cv.min.h x31, x31, x31 + cv.min.sc.b x0, x0, x0 + cv.min.sc.b x1, x1, x1 + cv.min.sc.b x2, x2, x2 + cv.min.sc.b x8, x8, x8 + cv.min.sc.b x20, x20, x20 + cv.min.sc.b x31, x31, x31 + cv.min.sc.h x0, x0, x0 + cv.min.sc.h x1, x1, x1 + cv.min.sc.h x2, x2, x2 + cv.min.sc.h x8, x8, x8 + cv.min.sc.h x20, x20, x20 + cv.min.sc.h x31, x31, x31 + cv.min.sci.b x0, x0, 20 + cv.min.sci.b x1, x1, 20 + cv.min.sci.b x2, x2, 20 + cv.min.sci.b x8, x8, 20 + cv.min.sci.b x20, x20, 20 + cv.min.sci.b x31, x31, 20 + cv.min.sci.b x6, x7, -32 + cv.min.sci.b x6, x7, 0 + cv.min.sci.b x6, x7, 31 + cv.min.sci.h x0, x0, 20 + cv.min.sci.h x1, x1, 20 + cv.min.sci.h x2, x2, 20 + cv.min.sci.h x8, x8, 20 + cv.min.sci.h x20, x20, 20 + cv.min.sci.h x31, x31, 20 + cv.min.sci.h x6, x7, -32 + cv.min.sci.h x6, x7, 0 + cv.min.sci.h x6, x7, 31 + cv.minu.b x0, x0, x0 + cv.minu.b x1, x1, x1 + cv.minu.b x2, x2, x2 + cv.minu.b x8, x8, x8 + cv.minu.b x20, x20, x20 + cv.minu.b x31, x31, x31 + cv.minu.h x0, x0, x0 + cv.minu.h x1, x1, x1 + cv.minu.h x2, x2, x2 + cv.minu.h x8, x8, x8 + cv.minu.h x20, x20, x20 + cv.minu.h x31, x31, x31 + cv.minu.sc.b x0, x0, x0 + cv.minu.sc.b x1, x1, x1 + cv.minu.sc.b x2, x2, x2 + cv.minu.sc.b x8, x8, x8 + cv.minu.sc.b x20, x20, x20 + cv.minu.sc.b x31, x31, x31 + cv.minu.sc.h x0, x0, x0 + cv.minu.sc.h x1, x1, x1 + cv.minu.sc.h x2, x2, x2 + cv.minu.sc.h x8, x8, x8 + cv.minu.sc.h x20, x20, x20 + cv.minu.sc.h x31, x31, x31 + cv.minu.sci.b x0, x0, 20 + cv.minu.sci.b x1, x1, 20 + cv.minu.sci.b x2, x2, 20 + cv.minu.sci.b x8, x8, 20 + cv.minu.sci.b x20, x20, 20 + cv.minu.sci.b x31, x31, 20 + cv.minu.sci.b x6, x7, 0 + cv.minu.sci.b x6, x7, 63 + cv.minu.sci.h x0, x0, 20 + cv.minu.sci.h x1, x1, 20 + cv.minu.sci.h x2, x2, 20 + cv.minu.sci.h x8, x8, 20 + cv.minu.sci.h x20, x20, 20 + cv.minu.sci.h x31, x31, 20 + cv.minu.sci.h x6, x7, 0 + cv.minu.sci.h x6, x7, 63 + cv.or.b x0, x0, x0 + cv.or.b x1, x1, x1 + cv.or.b x2, x2, x2 + cv.or.b x8, x8, x8 + cv.or.b x20, x20, x20 + cv.or.b x31, x31, x31 + cv.or.h x0, x0, x0 + cv.or.h x1, x1, x1 + cv.or.h x2, x2, x2 + cv.or.h x8, x8, x8 + cv.or.h x20, x20, x20 + cv.or.h x31, x31, x31 + cv.or.sc.b x0, x0, x0 + cv.or.sc.b x1, x1, x1 + cv.or.sc.b x2, x2, x2 + cv.or.sc.b x8, x8, x8 + cv.or.sc.b x20, x20, x20 + cv.or.sc.b x31, x31, x31 + cv.or.sc.h x0, x0, x0 + cv.or.sc.h x1, x1, x1 + cv.or.sc.h x2, x2, x2 + cv.or.sc.h x8, x8, x8 + cv.or.sc.h x20, x20, x20 + cv.or.sc.h x31, x31, x31 + cv.or.sci.b x0, x0, 20 + cv.or.sci.b x1, x1, 20 + cv.or.sci.b x2, x2, 20 + cv.or.sci.b x8, x8, 20 + cv.or.sci.b x20, x20, 20 + cv.or.sci.b x31, x31, 20 + cv.or.sci.b x6, x7, -32 + cv.or.sci.b x6, x7, 0 + cv.or.sci.b x6, x7, 31 + cv.or.sci.h x0, x0, 20 + cv.or.sci.h x1, x1, 20 + cv.or.sci.h x2, x2, 20 + cv.or.sci.h x8, x8, 20 + cv.or.sci.h x20, x20, 20 + cv.or.sci.h x31, x31, 20 + cv.or.sci.h x6, x7, -32 + cv.or.sci.h x6, x7, 0 + cv.or.sci.h x6, x7, 31 + cv.packhi.b x0, x0, x0 + cv.packhi.b x1, x1, x1 + cv.packhi.b x2, x2, x2 + cv.packhi.b x8, x8, x8 + cv.packhi.b x20, x20, x20 + cv.packhi.b x31, x31, x31 + cv.pack.h x0, x0, x0 + cv.pack.h x1, x1, x1 + cv.pack.h x2, x2, x2 + cv.pack.h x8, x8, x8 + cv.pack.h x20, x20, x20 + cv.pack.h x31, x31, x31 + cv.packlo.b x0, x0, x0 + cv.packlo.b x1, x1, x1 + cv.packlo.b x2, x2, x2 + cv.packlo.b x8, x8, x8 + cv.packlo.b x20, x20, x20 + cv.packlo.b x31, x31, x31 + cv.pack x0, x0, x0 + cv.pack x1, x1, x1 + cv.pack x2, x2, x2 + cv.pack x8, x8, x8 + cv.pack x20, x20, x20 + cv.pack x31, x31, x31 + cv.sdotsp.b x0, x0, x0 + cv.sdotsp.b x1, x1, x1 + cv.sdotsp.b x2, x2, x2 + cv.sdotsp.b x8, x8, x8 + cv.sdotsp.b x20, x20, x20 + cv.sdotsp.b x31, x31, x31 + cv.sdotsp.h x0, x0, x0 + cv.sdotsp.h x1, x1, x1 + cv.sdotsp.h x2, x2, x2 + cv.sdotsp.h x8, x8, x8 + cv.sdotsp.h x20, x20, x20 + cv.sdotsp.h x31, x31, x31 + cv.sdotsp.sc.b x0, x0, x0 + cv.sdotsp.sc.b x1, x1, x1 + cv.sdotsp.sc.b x2, x2, x2 + cv.sdotsp.sc.b x8, x8, x8 + cv.sdotsp.sc.b x20, x20, x20 + cv.sdotsp.sc.b x31, x31, x31 + cv.sdotsp.sc.h x0, x0, x0 + cv.sdotsp.sc.h x1, x1, x1 + cv.sdotsp.sc.h x2, x2, x2 + cv.sdotsp.sc.h x8, x8, x8 + cv.sdotsp.sc.h x20, x20, x20 + cv.sdotsp.sc.h x31, x31, x31 + cv.sdotsp.sci.b x0, x0, 20 + cv.sdotsp.sci.b x1, x1, 20 + cv.sdotsp.sci.b x2, x2, 20 + cv.sdotsp.sci.b x8, x8, 20 + cv.sdotsp.sci.b x20, x20, 20 + cv.sdotsp.sci.b x31, x31, 20 + cv.sdotsp.sci.b x6, x7, -32 + cv.sdotsp.sci.b x6, x7, 0 + cv.sdotsp.sci.b x6, x7, 31 + cv.sdotsp.sci.h x0, x0, 20 + cv.sdotsp.sci.h x1, x1, 20 + cv.sdotsp.sci.h x2, x2, 20 + cv.sdotsp.sci.h x8, x8, 20 + cv.sdotsp.sci.h x20, x20, 20 + cv.sdotsp.sci.h x31, x31, 20 + cv.sdotsp.sci.h x6, x7, -32 + cv.sdotsp.sci.h x6, x7, 0 + cv.sdotsp.sci.h x6, x7, 31 + cv.sdotup.b x0, x0, x0 + cv.sdotup.b x1, x1, x1 + cv.sdotup.b x2, x2, x2 + cv.sdotup.b x8, x8, x8 + cv.sdotup.b x20, x20, x20 + cv.sdotup.b x31, x31, x31 + cv.sdotup.h x0, x0, x0 + cv.sdotup.h x1, x1, x1 + cv.sdotup.h x2, x2, x2 + cv.sdotup.h x8, x8, x8 + cv.sdotup.h x20, x20, x20 + cv.sdotup.h x31, x31, x31 + cv.sdotup.sc.b x0, x0, x0 + cv.sdotup.sc.b x1, x1, x1 + cv.sdotup.sc.b x2, x2, x2 + cv.sdotup.sc.b x8, x8, x8 + cv.sdotup.sc.b x20, x20, x20 + cv.sdotup.sc.b x31, x31, x31 + cv.sdotup.sc.h x0, x0, x0 + cv.sdotup.sc.h x1, x1, x1 + cv.sdotup.sc.h x2, x2, x2 + cv.sdotup.sc.h x8, x8, x8 + cv.sdotup.sc.h x20, x20, x20 + cv.sdotup.sc.h x31, x31, x31 + cv.sdotup.sci.b x0, x0, 20 + cv.sdotup.sci.b x1, x1, 20 + cv.sdotup.sci.b x2, x2, 20 + cv.sdotup.sci.b x8, x8, 20 + cv.sdotup.sci.b x20, x20, 20 + cv.sdotup.sci.b x31, x31, 20 + cv.sdotup.sci.b x6, x7, 0 + cv.sdotup.sci.b x6, x7, 63 + cv.sdotup.sci.h x0, x0, 20 + cv.sdotup.sci.h x1, x1, 20 + cv.sdotup.sci.h x2, x2, 20 + cv.sdotup.sci.h x8, x8, 20 + cv.sdotup.sci.h x20, x20, 20 + cv.sdotup.sci.h x31, x31, 20 + cv.sdotup.sci.h x6, x7, 0 + cv.sdotup.sci.h x6, x7, 63 + cv.sdotusp.b x0, x0, x0 + cv.sdotusp.b x1, x1, x1 + cv.sdotusp.b x2, x2, x2 + cv.sdotusp.b x8, x8, x8 + cv.sdotusp.b x20, x20, x20 + cv.sdotusp.b x31, x31, x31 + cv.sdotusp.h x0, x0, x0 + cv.sdotusp.h x1, x1, x1 + cv.sdotusp.h x2, x2, x2 + cv.sdotusp.h x8, x8, x8 + cv.sdotusp.h x20, x20, x20 + cv.sdotusp.h x31, x31, x31 + cv.sdotusp.sc.b x0, x0, x0 + cv.sdotusp.sc.b x1, x1, x1 + cv.sdotusp.sc.b x2, x2, x2 + cv.sdotusp.sc.b x8, x8, x8 + cv.sdotusp.sc.b x20, x20, x20 + cv.sdotusp.sc.b x31, x31, x31 + cv.sdotusp.sc.h x0, x0, x0 + cv.sdotusp.sc.h x1, x1, x1 + cv.sdotusp.sc.h x2, x2, x2 + cv.sdotusp.sc.h x8, x8, x8 + cv.sdotusp.sc.h x20, x20, x20 + cv.sdotusp.sc.h x31, x31, x31 + cv.sdotusp.sci.b x0, x0, 20 + cv.sdotusp.sci.b x1, x1, 20 + cv.sdotusp.sci.b x2, x2, 20 + cv.sdotusp.sci.b x8, x8, 20 + cv.sdotusp.sci.b x20, x20, 20 + cv.sdotusp.sci.b x31, x31, 20 + cv.sdotusp.sci.b x6, x7, -32 + cv.sdotusp.sci.b x6, x7, 0 + cv.sdotusp.sci.b x6, x7, 31 + cv.sdotusp.sci.h x0, x0, 20 + cv.sdotusp.sci.h x1, x1, 20 + cv.sdotusp.sci.h x2, x2, 20 + cv.sdotusp.sci.h x8, x8, 20 + cv.sdotusp.sci.h x20, x20, 20 + cv.sdotusp.sci.h x31, x31, 20 + cv.sdotusp.sci.h x6, x7, -32 + cv.sdotusp.sci.h x6, x7, 0 + cv.sdotusp.sci.h x6, x7, 31 + cv.shuffle2.b x0, x0, x0 + cv.shuffle2.b x1, x1, x1 + cv.shuffle2.b x2, x2, x2 + cv.shuffle2.b x8, x8, x8 + cv.shuffle2.b x20, x20, x20 + cv.shuffle2.b x31, x31, x31 + cv.shuffle2.h x0, x0, x0 + cv.shuffle2.h x1, x1, x1 + cv.shuffle2.h x2, x2, x2 + cv.shuffle2.h x8, x8, x8 + cv.shuffle2.h x20, x20, x20 + cv.shuffle2.h x31, x31, x31 + cv.shuffle.b x0, x0, x0 + cv.shuffle.b x1, x1, x1 + cv.shuffle.b x2, x2, x2 + cv.shuffle.b x8, x8, x8 + cv.shuffle.b x20, x20, x20 + cv.shuffle.b x31, x31, x31 + cv.shuffle.h x0, x0, x0 + cv.shuffle.h x1, x1, x1 + cv.shuffle.h x2, x2, x2 + cv.shuffle.h x8, x8, x8 + cv.shuffle.h x20, x20, x20 + cv.shuffle.h x31, x31, x31 + cv.shufflei0.sci.b x0, x0, 20 + cv.shufflei0.sci.b x1, x1, 20 + cv.shufflei0.sci.b x2, x2, 20 + cv.shufflei0.sci.b x8, x8, 20 + cv.shufflei0.sci.b x20, x20, 20 + cv.shufflei0.sci.b x31, x31, 20 + cv.shufflei0.sci.b x6, x7, 0 + cv.shufflei0.sci.b x6, x7, 63 + cv.shufflei1.sci.b x0, x0, 20 + cv.shufflei1.sci.b x1, x1, 20 + cv.shufflei1.sci.b x2, x2, 20 + cv.shufflei1.sci.b x8, x8, 20 + cv.shufflei1.sci.b x20, x20, 20 + cv.shufflei1.sci.b x31, x31, 20 + cv.shufflei1.sci.b x6, x7, 0 + cv.shufflei1.sci.b x6, x7, 63 + cv.shufflei2.sci.b x0, x0, 20 + cv.shufflei2.sci.b x1, x1, 20 + cv.shufflei2.sci.b x2, x2, 20 + cv.shufflei2.sci.b x8, x8, 20 + cv.shufflei2.sci.b x20, x20, 20 + cv.shufflei2.sci.b x31, x31, 20 + cv.shufflei2.sci.b x6, x7, 0 + cv.shufflei2.sci.b x6, x7, 63 + cv.shufflei3.sci.b x0, x0, 20 + cv.shufflei3.sci.b x1, x1, 20 + cv.shufflei3.sci.b x2, x2, 20 + cv.shufflei3.sci.b x8, x8, 20 + cv.shufflei3.sci.b x20, x20, 20 + cv.shufflei3.sci.b x31, x31, 20 + cv.shufflei3.sci.b x6, x7, 0 + cv.shufflei3.sci.b x6, x7, 63 + cv.shuffle.sci.h x0, x0, 2 + cv.shuffle.sci.h x1, x1, 2 + cv.shuffle.sci.h x2, x2, 2 + cv.shuffle.sci.h x8, x8, 2 + cv.shuffle.sci.h x20, x20, 2 + cv.shuffle.sci.h x31, x31, 2 + cv.shuffle.sci.h x6, x7, 0 + cv.shuffle.sci.h x6, x7, 3 + cv.sll.b x0, x0, x0 + cv.sll.b x1, x1, x1 + cv.sll.b x2, x2, x2 + cv.sll.b x8, x8, x8 + cv.sll.b x20, x20, x20 + cv.sll.b x31, x31, x31 + cv.sll.h x0, x0, x0 + cv.sll.h x1, x1, x1 + cv.sll.h x2, x2, x2 + cv.sll.h x8, x8, x8 + cv.sll.h x20, x20, x20 + cv.sll.h x31, x31, x31 + cv.sll.sc.b x0, x0, x0 + cv.sll.sc.b x1, x1, x1 + cv.sll.sc.b x2, x2, x2 + cv.sll.sc.b x8, x8, x8 + cv.sll.sc.b x20, x20, x20 + cv.sll.sc.b x31, x31, x31 + cv.sll.sc.h x0, x0, x0 + cv.sll.sc.h x1, x1, x1 + cv.sll.sc.h x2, x2, x2 + cv.sll.sc.h x8, x8, x8 + cv.sll.sc.h x20, x20, x20 + cv.sll.sc.h x31, x31, x31 + cv.sll.sci.b x0, x0, 4 + cv.sll.sci.b x1, x1, 4 + cv.sll.sci.b x2, x2, 4 + cv.sll.sci.b x8, x8, 4 + cv.sll.sci.b x20, x20, 4 + cv.sll.sci.b x31, x31, 4 + cv.sll.sci.b x6, x7, 0 + cv.sll.sci.b x6, x7, 7 + cv.sll.sci.h x0, x0, 12 + cv.sll.sci.h x1, x1, 12 + cv.sll.sci.h x2, x2, 12 + cv.sll.sci.h x8, x8, 12 + cv.sll.sci.h x20, x20, 12 + cv.sll.sci.h x31, x31, 12 + cv.sll.sci.h x6, x7, 0 + cv.sll.sci.h x6, x7, 15 + cv.sra.b x0, x0, x0 + cv.sra.b x1, x1, x1 + cv.sra.b x2, x2, x2 + cv.sra.b x8, x8, x8 + cv.sra.b x20, x20, x20 + cv.sra.b x31, x31, x31 + cv.sra.h x0, x0, x0 + cv.sra.h x1, x1, x1 + cv.sra.h x2, x2, x2 + cv.sra.h x8, x8, x8 + cv.sra.h x20, x20, x20 + cv.sra.h x31, x31, x31 + cv.sra.sc.b x0, x0, x0 + cv.sra.sc.b x1, x1, x1 + cv.sra.sc.b x2, x2, x2 + cv.sra.sc.b x8, x8, x8 + cv.sra.sc.b x20, x20, x20 + cv.sra.sc.b x31, x31, x31 + cv.sra.sc.h x0, x0, x0 + cv.sra.sc.h x1, x1, x1 + cv.sra.sc.h x2, x2, x2 + cv.sra.sc.h x8, x8, x8 + cv.sra.sc.h x20, x20, x20 + cv.sra.sc.h x31, x31, x31 + cv.sra.sci.b x0, x0, 4 + cv.sra.sci.b x1, x1, 4 + cv.sra.sci.b x2, x2, 4 + cv.sra.sci.b x8, x8, 4 + cv.sra.sci.b x20, x20, 4 + cv.sra.sci.b x31, x31, 4 + cv.sra.sci.b x6, x7, 0 + cv.sra.sci.b x6, x7, 7 + cv.sra.sci.h x0, x0, 12 + cv.sra.sci.h x1, x1, 12 + cv.sra.sci.h x2, x2, 12 + cv.sra.sci.h x8, x8, 12 + cv.sra.sci.h x20, x20, 12 + cv.sra.sci.h x31, x31, 12 + cv.sra.sci.h x6, x7, 0 + cv.sra.sci.h x6, x7, 15 + cv.srl.b x0, x0, x0 + cv.srl.b x1, x1, x1 + cv.srl.b x2, x2, x2 + cv.srl.b x8, x8, x8 + cv.srl.b x20, x20, x20 + cv.srl.b x31, x31, x31 + cv.srl.h x0, x0, x0 + cv.srl.h x1, x1, x1 + cv.srl.h x2, x2, x2 + cv.srl.h x8, x8, x8 + cv.srl.h x20, x20, x20 + cv.srl.h x31, x31, x31 + cv.srl.sc.b x0, x0, x0 + cv.srl.sc.b x1, x1, x1 + cv.srl.sc.b x2, x2, x2 + cv.srl.sc.b x8, x8, x8 + cv.srl.sc.b x20, x20, x20 + cv.srl.sc.b x31, x31, x31 + cv.srl.sc.h x0, x0, x0 + cv.srl.sc.h x1, x1, x1 + cv.srl.sc.h x2, x2, x2 + cv.srl.sc.h x8, x8, x8 + cv.srl.sc.h x20, x20, x20 + cv.srl.sc.h x31, x31, x31 + cv.srl.sci.b x0, x0, 4 + cv.srl.sci.b x1, x1, 4 + cv.srl.sci.b x2, x2, 4 + cv.srl.sci.b x8, x8, 4 + cv.srl.sci.b x20, x20, 4 + cv.srl.sci.b x31, x31, 4 + cv.srl.sci.b x6, x7, 0 + cv.srl.sci.b x6, x7, 7 + cv.srl.sci.h x0, x0, 12 + cv.srl.sci.h x1, x1, 12 + cv.srl.sci.h x2, x2, 12 + cv.srl.sci.h x8, x8, 12 + cv.srl.sci.h x20, x20, 12 + cv.srl.sci.h x31, x31, 12 + cv.srl.sci.h x6, x7, 0 + cv.srl.sci.h x6, x7, 15 + cv.sub.b x0, x0, x0 + cv.sub.b x1, x1, x1 + cv.sub.b x2, x2, x2 + cv.sub.b x8, x8, x8 + cv.sub.b x20, x20, x20 + cv.sub.b x31, x31, x31 + cv.sub.div2 x0, x0, x0 + cv.sub.div2 x1, x1, x1 + cv.sub.div2 x2, x2, x2 + cv.sub.div2 x8, x8, x8 + cv.sub.div2 x20, x20, x20 + cv.sub.div2 x31, x31, x31 + cv.sub.div4 x0, x0, x0 + cv.sub.div4 x1, x1, x1 + cv.sub.div4 x2, x2, x2 + cv.sub.div4 x8, x8, x8 + cv.sub.div4 x20, x20, x20 + cv.sub.div4 x31, x31, x31 + cv.sub.div8 x0, x0, x0 + cv.sub.div8 x1, x1, x1 + cv.sub.div8 x2, x2, x2 + cv.sub.div8 x8, x8, x8 + cv.sub.div8 x20, x20, x20 + cv.sub.div8 x31, x31, x31 + cv.sub.h x0, x0, x0 + cv.sub.h x1, x1, x1 + cv.sub.h x2, x2, x2 + cv.sub.h x8, x8, x8 + cv.sub.h x20, x20, x20 + cv.sub.h x31, x31, x31 + cv.subrotmj.div2 x0, x0, x0 + cv.subrotmj.div2 x1, x1, x1 + cv.subrotmj.div2 x2, x2, x2 + cv.subrotmj.div2 x8, x8, x8 + cv.subrotmj.div2 x20, x20, x20 + cv.subrotmj.div2 x31, x31, x31 + cv.subrotmj.div4 x0, x0, x0 + cv.subrotmj.div4 x1, x1, x1 + cv.subrotmj.div4 x2, x2, x2 + cv.subrotmj.div4 x8, x8, x8 + cv.subrotmj.div4 x20, x20, x20 + cv.subrotmj.div4 x31, x31, x31 + cv.subrotmj.div8 x0, x0, x0 + cv.subrotmj.div8 x1, x1, x1 + cv.subrotmj.div8 x2, x2, x2 + cv.subrotmj.div8 x8, x8, x8 + cv.subrotmj.div8 x20, x20, x20 + cv.subrotmj.div8 x31, x31, x31 + cv.subrotmj x0, x0, x0 + cv.subrotmj x1, x1, x1 + cv.subrotmj x2, x2, x2 + cv.subrotmj x8, x8, x8 + cv.subrotmj x20, x20, x20 + cv.subrotmj x31, x31, x31 + cv.sub.sc.b x0, x0, x0 + cv.sub.sc.b x1, x1, x1 + cv.sub.sc.b x2, x2, x2 + cv.sub.sc.b x8, x8, x8 + cv.sub.sc.b x20, x20, x20 + cv.sub.sc.b x31, x31, x31 + cv.sub.sc.h x0, x0, x0 + cv.sub.sc.h x1, x1, x1 + cv.sub.sc.h x2, x2, x2 + cv.sub.sc.h x8, x8, x8 + cv.sub.sc.h x20, x20, x20 + cv.sub.sc.h x31, x31, x31 + cv.sub.sci.b x0, x0, 20 + cv.sub.sci.b x1, x1, 20 + cv.sub.sci.b x2, x2, 20 + cv.sub.sci.b x8, x8, 20 + cv.sub.sci.b x20, x20, 20 + cv.sub.sci.b x31, x31, 20 + cv.sub.sci.b x6, x7, -32 + cv.sub.sci.b x6, x7, 0 + cv.sub.sci.b x6, x7, 31 + cv.sub.sci.h x0, x0, 20 + cv.sub.sci.h x1, x1, 20 + cv.sub.sci.h x2, x2, 20 + cv.sub.sci.h x8, x8, 20 + cv.sub.sci.h x20, x20, 20 + cv.sub.sci.h x31, x31, 20 + cv.sub.sci.h x6, x7, -32 + cv.sub.sci.h x6, x7, 0 + cv.sub.sci.h x6, x7, 31 + cv.xor.b x0, x0, x0 + cv.xor.b x1, x1, x1 + cv.xor.b x2, x2, x2 + cv.xor.b x8, x8, x8 + cv.xor.b x20, x20, x20 + cv.xor.b x31, x31, x31 + cv.xor.h x0, x0, x0 + cv.xor.h x1, x1, x1 + cv.xor.h x2, x2, x2 + cv.xor.h x8, x8, x8 + cv.xor.h x20, x20, x20 + cv.xor.h x31, x31, x31 + cv.xor.sc.b x0, x0, x0 + cv.xor.sc.b x1, x1, x1 + cv.xor.sc.b x2, x2, x2 + cv.xor.sc.b x8, x8, x8 + cv.xor.sc.b x20, x20, x20 + cv.xor.sc.b x31, x31, x31 + cv.xor.sc.h x0, x0, x0 + cv.xor.sc.h x1, x1, x1 + cv.xor.sc.h x2, x2, x2 + cv.xor.sc.h x8, x8, x8 + cv.xor.sc.h x20, x20, x20 + cv.xor.sc.h x31, x31, x31 + cv.xor.sci.b x0, x0, 20 + cv.xor.sci.b x1, x1, 20 + cv.xor.sci.b x2, x2, 20 + cv.xor.sci.b x8, x8, 20 + cv.xor.sci.b x20, x20, 20 + cv.xor.sci.b x31, x31, 20 + cv.xor.sci.b x6, x7, -32 + cv.xor.sci.b x6, x7, 0 + cv.xor.sci.b x6, x7, 31 + cv.xor.sci.h x0, x0, 20 + cv.xor.sci.h x1, x1, 20 + cv.xor.sci.h x2, x2, 20 + cv.xor.sci.h x8, x8, 20 + cv.xor.sci.h x20, x20, 20 + cv.xor.sci.h x31, x31, 20 + cv.xor.sci.h x6, x7, -32 + cv.xor.sci.h x6, x7, 0 + cv.xor.sci.h x6, x7, 31 diff --git a/gas/testsuite/gas/riscv/zcmp-mv.d b/gas/testsuite/gas/riscv/zcmp-mv.d new file mode 100644 index 0000000..351d301 --- /dev/null +++ b/gas/testsuite/gas/riscv/zcmp-mv.d @@ -0,0 +1,26 @@ +#as: -march=rv64i_zcmp +#source: zcmp-mv.s +#objdump: -dr -Mno-aliases + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]*[0-9a-f]+:[ ]+ac7e[ ]+cm.mva01s[ ]+s0,s7 +[ ]*[0-9a-f]+:[ ]+ac7a[ ]+cm.mva01s[ ]+s0,s6 +[ ]*[0-9a-f]+:[ ]+acfe[ ]+cm.mva01s[ ]+s1,s7 +[ ]*[0-9a-f]+:[ ]+acfa[ ]+cm.mva01s[ ]+s1,s6 +[ ]*[0-9a-f]+:[ ]+afee[ ]+cm.mva01s[ ]+s7,s3 +[ ]*[0-9a-f]+:[ ]+ade2[ ]+cm.mva01s[ ]+s3,s0 +[ ]*[0-9a-f]+:[ ]+aef2[ ]+cm.mva01s[ ]+s5,s4 +[ ]*[0-9a-f]+:[ ]+aefa[ ]+cm.mva01s[ ]+s5,s6 +[ ]*[0-9a-f]+:[ ]+afa2[ ]+cm.mvsa01[ ]+s7,s0 +[ ]*[0-9a-f]+:[ ]+af22[ ]+cm.mvsa01[ ]+s6,s0 +[ ]*[0-9a-f]+:[ ]+afa6[ ]+cm.mvsa01[ ]+s7,s1 +[ ]*[0-9a-f]+:[ ]+af26[ ]+cm.mvsa01[ ]+s6,s1 +[ ]*[0-9a-f]+:[ ]+adbe[ ]+cm.mvsa01[ ]+s3,s7 +[ ]*[0-9a-f]+:[ ]+ada2[ ]+cm.mvsa01[ ]+s3,s0 +[ ]*[0-9a-f]+:[ ]+aeb2[ ]+cm.mvsa01[ ]+s5,s4 +[ ]*[0-9a-f]+:[ ]+aeba[ ]+cm.mvsa01[ ]+s5,s6 diff --git a/gas/testsuite/gas/riscv/zcmp-mv.s b/gas/testsuite/gas/riscv/zcmp-mv.s new file mode 100644 index 0000000..0bcf2a6 --- /dev/null +++ b/gas/testsuite/gas/riscv/zcmp-mv.s @@ -0,0 +1,21 @@ +target: + + # cm.mva01s + cm.mva01s s0,s7 + cm.mva01s s0,s6 + cm.mva01s s1,s7 + cm.mva01s s1,s6 + cm.mva01s s7,s3 + cm.mva01s x19,s0 + cm.mva01s s5,x20 + cm.mva01s x21,x22 + + # cm.mvsa01 + cm.mvsa01 s7,s0 + cm.mvsa01 s6,s0 + cm.mvsa01 s7,s1 + cm.mvsa01 s6,s1 + cm.mvsa01 s3,s7 + cm.mvsa01 x19,s0 + cm.mvsa01 s5,x20 + cm.mvsa01 x21,x22 diff --git a/gas/testsuite/gas/sparc/sparc5vis4.d b/gas/testsuite/gas/sparc/sparc5vis4.d index bf5c90b..7820c2a 100644 --- a/gas/testsuite/gas/sparc/sparc5vis4.d +++ b/gas/testsuite/gas/sparc/sparc5vis4.d @@ -35,4 +35,4 @@ Disassembly of section .text: 64: 95 b1 aa c8 fpsubs8 %f6, %f8, %f10 68: 9d b2 aa ec fpsubus8 %f10, %f12, %f14 6c: a5 b3 aa 70 fpsubus16 %f14, %f16, %f18 - 70: bf b0 09 3f faligndata %f0, %f62, %f4, %f62 + 70: bf b0 09 24 faligndata %g0, %f62, %f4, %f62 diff --git a/gas/testsuite/gas/sparc/sparc5vis4.s b/gas/testsuite/gas/sparc/sparc5vis4.s index 0a0155f..58ca2b5 100644 --- a/gas/testsuite/gas/sparc/sparc5vis4.s +++ b/gas/testsuite/gas/sparc/sparc5vis4.s @@ -28,4 +28,4 @@ fpsubs8 %f6, %f8, %f10 fpsubus8 %f10, %f12, %f14 fpsubus16 %f14, %f16, %f18 - faligndata %f0, %f62, %f4, %f62 + faligndata %g0, %f62, %f4, %f62 |