aboutsummaryrefslogtreecommitdiff
path: root/gas
diff options
context:
space:
mode:
Diffstat (limited to 'gas')
-rw-r--r--gas/config/obj-coff.c4
-rw-r--r--gas/config/tc-i386.c20
-rw-r--r--gas/doc/c-i386.texi3
-rw-r--r--gas/testsuite/gas/i386/pseudos.d25
-rw-r--r--gas/testsuite/gas/i386/pseudos.s28
-rw-r--r--gas/testsuite/gas/i386/x86-64-pseudos.d32
-rw-r--r--gas/testsuite/gas/i386/x86-64-pseudos.s34
7 files changed, 144 insertions, 2 deletions
diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c
index 19759cd..eb5784e 100644
--- a/gas/config/obj-coff.c
+++ b/gas/config/obj-coff.c
@@ -1887,8 +1887,8 @@ static const pseudo_typeS coff_pseudo_table[] =
{"loc", obj_coff_loc, 0},
{"optim", s_ignore, 0}, /* For sun386i cc (?) */
{"weak", obj_coff_weak, 0},
-#if defined TC_TIC4X
- /* The tic4x uses sdef instead of def. */
+#if defined (TC_TIC4X) || defined (TC_TIC54X)
+ /* The tic4x and tic54x use sdef instead of def. */
{"sdef", obj_coff_def, 0},
#endif
#if defined(SEH_CMDS)
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 2319840..2c61353 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -513,6 +513,9 @@ static struct pseudo_prefixes {
disp_encoding_32bit
} disp_encoding;
+ /* Exclude sign-extended 8bit immediate in encoding. */
+ bool no_imm8s;
+
/* Prefer the REX byte in encoding. */
bool rex_encoding;
@@ -2589,6 +2592,19 @@ operand_size_match (const insn_template *t)
/* Check memory and accumulator operand size. */
for (j = 0; j < i.operands; j++)
{
+ /* Instruction templates with only sign-extended 8-bit immediate
+ operand also have a second template with full-operand-size
+ immediate operand under a different opcode. Don't match the
+ first template if sign-extended 8-bit immediate operand should
+ be excluded. */
+ if (pp.no_imm8s
+ && !t->operand_types[j].bitfield.imm8
+ && t->operand_types[j].bitfield.imm8s)
+ {
+ match = 0;
+ break;
+ }
+
if (i.types[j].bitfield.class != Reg
&& i.types[j].bitfield.class != RegSIMD
&& t->opcode_modifier.operandconstraint == ANY_SIZE)
@@ -7764,6 +7780,10 @@ parse_insn (const char *line, char *mnemonic, enum parse_mode mode)
/* {nooptimize} */
pp.no_optimize = true;
break;
+ case Prefix_NoImm8s:
+ /* {noimm8s} */
+ pp.no_imm8s = true;
+ break;
default:
abort ();
}
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 4d59958..b1f3b04 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -1046,6 +1046,9 @@ prefix which generates REX prefix unconditionally.
instructions (APX_F only).
@item
+@samp{@{noimm8s@}} -- exclude sign-extended 8-bit immediate.
+
+@item
@samp{@{nooptimize@}} -- disable instruction size optimization.
@end itemize
diff --git a/gas/testsuite/gas/i386/pseudos.d b/gas/testsuite/gas/i386/pseudos.d
index 47dca19..5c0bc3b 100644
--- a/gas/testsuite/gas/i386/pseudos.d
+++ b/gas/testsuite/gas/i386/pseudos.d
@@ -443,4 +443,29 @@ Disassembly of section .text:
+[a-f0-9]+: 67 8a 86 00 00 mov 0x0\(%bp\),%al
+[a-f0-9]+: e9 fb ff ff ff jmp [0-9a-f]* <.*>
+[a-f0-9]+: e9 fd ff ff ff jmp [0-9a-f]* <.*>
+ +[a-f0-9]+: 81 03 00 00 00 00 addl \$0x0,\(%ebx\)
+ +[a-f0-9]+: 81 03 ff 00 00 00 addl \$0xff,\(%ebx\)
+ +[a-f0-9]+: 66 81 03 00 00 addw \$0x0,\(%ebx\)
+ +[a-f0-9]+: 66 81 03 ff 00 addw \$0xff,\(%ebx\)
+ +[a-f0-9]+: 80 03 00 addb \$0x0,\(%ebx\)
+ +[a-f0-9]+: 80 03 ff addb \$0xff,\(%ebx\)
+ +[a-f0-9]+: 81 c3 00 00 00 00 add \$0x0,%ebx
+ +[a-f0-9]+: 81 c3 ff 00 00 00 add \$0xff,%ebx
+ +[a-f0-9]+: 66 81 c3 00 00 add \$0x0,%bx
+ +[a-f0-9]+: 66 81 c3 ff 00 add \$0xff,%bx
+ +[a-f0-9]+: 80 c3 00 add \$0x0,%bl
+ +[a-f0-9]+: 80 c3 ff add \$0xff,%bl
+ +[a-f0-9]+: c7 03 00 00 00 00 movl \$0x0,\(%ebx\)
+ +[a-f0-9]+: c7 03 ff 00 00 00 movl \$0xff,\(%ebx\)
+ +[a-f0-9]+: 66 c7 03 00 00 movw \$0x0,\(%ebx\)
+ +[a-f0-9]+: 66 c7 03 ff 00 movw \$0xff,\(%ebx\)
+ +[a-f0-9]+: c6 03 00 movb \$0x0,\(%ebx\)
+ +[a-f0-9]+: c6 03 ff movb \$0xff,\(%ebx\)
+ +[a-f0-9]+: bb 00 00 00 00 mov \$0x0,%ebx
+ +[a-f0-9]+: bb ff 00 00 00 mov \$0xff,%ebx
+ +[a-f0-9]+: 66 bb 00 00 mov \$0x0,%bx
+ +[a-f0-9]+: 66 bb ff 00 mov \$0xff,%bx
+ +[a-f0-9]+: b3 00 mov \$0x0,%bl
+ +[a-f0-9]+: b3 ff mov \$0xff,%bl
+ +[a-f0-9]+: c1 c3 ff rol \$0xff,%ebx
#pass
diff --git a/gas/testsuite/gas/i386/pseudos.s b/gas/testsuite/gas/i386/pseudos.s
index 7e3600e..3806b23 100644
--- a/gas/testsuite/gas/i386/pseudos.s
+++ b/gas/testsuite/gas/i386/pseudos.s
@@ -408,3 +408,31 @@ _start:
.code16
{disp16} jmp .
.byte -1, -1
+
+ .att_syntax prefix
+ .code32
+{noimm8s} addl $0,(%ebx)
+{noimm8s} addl $255,(%ebx)
+{noimm8s} addw $0,(%ebx)
+{noimm8s} addw $255,(%ebx)
+{noimm8s} addb $0,(%ebx)
+{noimm8s} addb $255,(%ebx)
+{noimm8s} add $0,%ebx
+{noimm8s} add $255,%ebx
+{noimm8s} add $0,%bx
+{noimm8s} add $255,%bx
+{noimm8s} add $0,%bl
+{noimm8s} add $255,%bl
+{noimm8s} movl $0,(%ebx)
+{noimm8s} movl $255,(%ebx)
+{noimm8s} movw $0,(%ebx)
+{noimm8s} movw $255,(%ebx)
+{noimm8s} movb $0,(%ebx)
+{noimm8s} movb $255,(%ebx)
+{noimm8s} mov $0,%ebx
+{noimm8s} mov $255,%ebx
+{noimm8s} mov $0,%bx
+{noimm8s} mov $255,%bx
+{noimm8s} mov $0,%bl
+{noimm8s} mov $255,%bl
+{noimm8s} rol $255,%ebx
diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.d b/gas/testsuite/gas/i386/x86-64-pseudos.d
index ea5a358..5a43901 100644
--- a/gas/testsuite/gas/i386/x86-64-pseudos.d
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.d
@@ -534,4 +534,36 @@ Disassembly of section .text:
+[a-f0-9]+: 67 41 8a 45 00 mov 0x0\(%r13d\),%al
+[a-f0-9]+: 67 41 8a 85 00 00 00 00 mov 0x0\(%r13d\),%al
+[a-f0-9]+: 40 8a c1 rex mov %cl,%al
+ +[a-f0-9]+: 48 81 03 00 00 00 00 addq \$0x0,\(%rbx\)
+ +[a-f0-9]+: 48 81 03 ff 00 00 00 addq \$0xff,\(%rbx\)
+ +[a-f0-9]+: 81 03 00 00 00 00 addl \$0x0,\(%rbx\)
+ +[a-f0-9]+: 81 03 ff 00 00 00 addl \$0xff,\(%rbx\)
+ +[a-f0-9]+: 66 81 03 00 00 addw \$0x0,\(%rbx\)
+ +[a-f0-9]+: 66 81 03 ff 00 addw \$0xff,\(%rbx\)
+ +[a-f0-9]+: 80 03 00 addb \$0x0,\(%rbx\)
+ +[a-f0-9]+: 80 03 ff addb \$0xff,\(%rbx\)
+ +[a-f0-9]+: 48 81 c3 00 00 00 00 add \$0x0,%rbx
+ +[a-f0-9]+: 48 81 c3 ff 00 00 00 add \$0xff,%rbx
+ +[a-f0-9]+: 81 c3 00 00 00 00 add \$0x0,%ebx
+ +[a-f0-9]+: 81 c3 ff 00 00 00 add \$0xff,%ebx
+ +[a-f0-9]+: 66 81 c3 00 00 add \$0x0,%bx
+ +[a-f0-9]+: 66 81 c3 ff 00 add \$0xff,%bx
+ +[a-f0-9]+: 80 c3 00 add \$0x0,%bl
+ +[a-f0-9]+: 80 c3 ff add \$0xff,%bl
+ +[a-f0-9]+: 48 c7 03 00 00 00 00 movq \$0x0,\(%rbx\)
+ +[a-f0-9]+: 48 c7 03 ff 00 00 00 movq \$0xff,\(%rbx\)
+ +[a-f0-9]+: c7 03 00 00 00 00 movl \$0x0,\(%rbx\)
+ +[a-f0-9]+: c7 03 ff 00 00 00 movl \$0xff,\(%rbx\)
+ +[a-f0-9]+: 66 c7 03 00 00 movw \$0x0,\(%rbx\)
+ +[a-f0-9]+: 66 c7 03 ff 00 movw \$0xff,\(%rbx\)
+ +[a-f0-9]+: c6 03 00 movb \$0x0,\(%rbx\)
+ +[a-f0-9]+: c6 03 ff movb \$0xff,\(%rbx\)
+ +[a-f0-9]+: bb 00 00 00 00 mov \$0x0,%ebx
+ +[a-f0-9]+: bb ff 00 00 00 mov \$0xff,%ebx
+ +[a-f0-9]+: 66 bb 00 00 mov \$0x0,%bx
+ +[a-f0-9]+: 66 bb ff 00 mov \$0xff,%bx
+ +[a-f0-9]+: b3 00 mov \$0x0,%bl
+ +[a-f0-9]+: b3 ff mov \$0xff,%bl
+ +[a-f0-9]+: 48 c1 c3 ff rol \$0xff,%rbx
+ +[a-f0-9]+: c1 c3 ff rol \$0xff,%ebx
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-pseudos.s b/gas/testsuite/gas/i386/x86-64-pseudos.s
index 041f98e..3658f34 100644
--- a/gas/testsuite/gas/i386/x86-64-pseudos.s
+++ b/gas/testsuite/gas/i386/x86-64-pseudos.s
@@ -504,3 +504,37 @@ _start:
{disp32} mov al, BYTE PTR [r13d]
.insn {rex} 0x8a, al, cl
+
+ .att_syntax prefix
+{noimm8s} addq $0,(%rbx)
+{noimm8s} addq $255,(%rbx)
+{noimm8s} addl $0,(%rbx)
+{noimm8s} addl $255,(%rbx)
+{noimm8s} addw $0,(%rbx)
+{noimm8s} addw $255,(%rbx)
+{noimm8s} addb $0,(%rbx)
+{noimm8s} addb $255,(%rbx)
+{noimm8s} add $0,%rbx
+{noimm8s} add $255,%rbx
+{noimm8s} add $0,%ebx
+{noimm8s} add $255,%ebx
+{noimm8s} add $0,%bx
+{noimm8s} add $255,%bx
+{noimm8s} add $0,%bl
+{noimm8s} add $255,%bl
+{noimm8s} movq $0,(%rbx)
+{noimm8s} movq $255,(%rbx)
+{noimm8s} movl $0,(%rbx)
+{noimm8s} movl $255,(%rbx)
+{noimm8s} movw $0,(%rbx)
+{noimm8s} movw $255,(%rbx)
+{noimm8s} movb $0,(%rbx)
+{noimm8s} movb $255,(%rbx)
+{noimm8s} mov $0,%ebx
+{noimm8s} mov $255,%ebx
+{noimm8s} mov $0,%bx
+{noimm8s} mov $255,%bx
+{noimm8s} mov $0,%bl
+{noimm8s} mov $255,%bl
+{noimm8s} rol $255,%rbx
+{noimm8s} rol $255,%ebx
generated by cgit v1.1 at 2025-04-08 14:57:02 +0000