4 files changed, 26 insertions, 3 deletions
diff --git a/gas/config/loongarch-parse.y b/gas/config/loongarch-parse.y
index ac35dee..97055fe 100644
--- a/gas/config/loongarch-parse.y
+++ b/gas/config/loongarch-parse.y
@@ -225,6 +225,9 @@ emit_bin (int op)
 	  opr1 = opr1 << opr2;
 	  break;
 	case RIGHT_OP:
+	  if (opr1 < 0)
+	    as_warn(_("Right shift of negative numbers may be changed "
+		  "from arithmetic right shift to logical right shift!"));
 	  /* Algorithm right shift.  */
 	  opr1 = (offsetT)opr1 >> (offsetT)opr2;
 	  break;
diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c
index 19759cd..eb5784e 100644
--- a/gas/config/obj-coff.c
+++ b/gas/config/obj-coff.c
@@ -1887,8 +1887,8 @@ static const pseudo_typeS coff_pseudo_table[] =
   {"loc", obj_coff_loc, 0},
   {"optim", s_ignore, 0},	/* For sun386i cc (?) */
   {"weak", obj_coff_weak, 0},
-#if defined TC_TIC4X
-  /* The tic4x uses sdef instead of def.  */
+#if defined (TC_TIC4X) || defined (TC_TIC54X)
+  /* The tic4x and tic54x use sdef instead of def.  */
   {"sdef", obj_coff_def, 0},
 #endif
 #if defined(SEH_CMDS)
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 2319840..2c61353 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -513,6 +513,9 @@ static struct pseudo_prefixes {
     disp_encoding_32bit
   } disp_encoding;
 
+  /* Exclude sign-extended 8bit immediate in encoding.  */
+  bool no_imm8s;
+
   /* Prefer the REX byte in encoding.  */
   bool rex_encoding;
 
@@ -2589,6 +2592,19 @@ operand_size_match (const insn_template *t)
   /* Check memory and accumulator operand size.  */
   for (j = 0; j < i.operands; j++)
     {
+      /* Instruction templates with only sign-extended 8-bit immediate
+	 operand also have a second template with full-operand-size
+	 immediate operand under a different opcode.  Don't match the
+	 first template if sign-extended 8-bit immediate operand should
+	 be excluded.  */
+      if (pp.no_imm8s
+	  && !t->operand_types[j].bitfield.imm8
+	  && t->operand_types[j].bitfield.imm8s)
+	{
+	  match = 0;
+	  break;
+	}
+
       if (i.types[j].bitfield.class != Reg
 	  && i.types[j].bitfield.class != RegSIMD
 	  && t->opcode_modifier.operandconstraint == ANY_SIZE)
@@ -7764,6 +7780,10 @@ parse_insn (const char *line, char *mnemonic, enum parse_mode mode)
 		  /* {nooptimize} */
 		  pp.no_optimize = true;
 		  break;
+		case Prefix_NoImm8s:
+		  /* {noimm8s} */
+		  pp.no_imm8s = true;
+		  break;
 		default:
 		  abort ();
 		}
diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c
index a0cfeea..b846134 100644
--- a/gas/config/tc-s390.c
+++ b/gas/config/tc-s390.c
@@ -343,7 +343,7 @@ s390_parse_cpu (const char *arg,
       S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
     { STRING_COMMA_LEN ("z16"), STRING_COMMA_LEN ("arch14"),
       S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
-    { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch15"),
+    { STRING_COMMA_LEN ("z17"), STRING_COMMA_LEN ("arch15"),
       S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
   };
   static struct