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| author | Dave Brolley <brolley@redhat.com> | 2003-09-09 22:34:53 +0000 |
|---|---|---|
| committer | Dave Brolley <brolley@redhat.com> | 2003-09-09 22:34:53 +0000 |
| commit | fbd93201df80d4028b0e4762e701b20f96cff8bb (patch) | |
| tree | 8054c11b0d678a254aace462c855d3eb7a3a7568 /sim | |
| parent | f7df6a7927fca92d8839b024faa9353a0fac5c13 (diff) | |
| download | gdb-fbd93201df80d4028b0e4762e701b20f96cff8bb.zip gdb-fbd93201df80d4028b0e4762e701b20f96cff8bb.tar.gz gdb-fbd93201df80d4028b0e4762e701b20f96cff8bb.tar.bz2 | |
2003-09-09 Dave Brolley <brolley@redhat.com>
* sim/frv/maddaccs.cgs: move to fr400 subdirectory.
* sim/frv/msubaccs.cgs: move to fr400 subdirectory.
* sim/frv/masaccs.cgs: move to fr400 subdirectory.
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | sim/testsuite/lib/sim-defs.exp | 8 | ||||
| -rw-r--r-- | sim/testsuite/sim/frv/fr400/maddaccs.cgs (renamed from sim/testsuite/sim/frv/maddaccs.cgs) | 2 | ||||
| -rw-r--r-- | sim/testsuite/sim/frv/fr400/masaccs.cgs (renamed from sim/testsuite/sim/frv/masaccs.cgs) | 2 | ||||
| -rw-r--r-- | sim/testsuite/sim/frv/fr400/msubaccs.cgs (renamed from sim/testsuite/sim/frv/msubaccs.cgs) | 2 |
5 files changed, 13 insertions, 7 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index 423cffd..56b16f3 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2003-09-09 Dave Brolley <brolley@redhat.com> + + * sim/frv/maddaccs.cgs: move to fr400 subdirectory. + * sim/frv/msubaccs.cgs: move to fr400 subdirectory. + * sim/frv/masaccs.cgs: move to fr400 subdirectory. + 2003-09-03 Michael Snyder <msnyder@redhat.com> * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be diff --git a/sim/testsuite/lib/sim-defs.exp b/sim/testsuite/lib/sim-defs.exp index 42374e0..017fcef 100644 --- a/sim/testsuite/lib/sim-defs.exp +++ b/sim/testsuite/lib/sim-defs.exp @@ -331,20 +331,20 @@ proc slurp_options { file } { # whitespace is ignored anywhere except within the options list; # option names are alphabetic only set pat "^#${ws}(\[a-zA-Z\]*)\\(?(\[^):\]*)\\)?$ws:${ws}(.*)$ws\$" - # Allow comment as first line of file. - set firstline 1 + # Allow arbitrary lines until the first option is seen. + set seen_opt 0 while { [gets $f line] != -1 } { set line [string trim $line] # Whitespace here is space-tab. if [regexp $pat $line xxx opt_name opt_machs opt_val] { # match! lappend opt_array [list $opt_name $opt_machs $opt_val] + set seen_opt 1 } else { - if { ! $firstline } { + if { $seen_opt } { break } } - set firstline 0 } close $f return $opt_array diff --git a/sim/testsuite/sim/frv/maddaccs.cgs b/sim/testsuite/sim/frv/fr400/maddaccs.cgs index aa178fe..98659c4 100644 --- a/sim/testsuite/sim/frv/maddaccs.cgs +++ b/sim/testsuite/sim/frv/fr400/maddaccs.cgs @@ -1,7 +1,7 @@ # frv testcase for maddaccs $ACC40Si,$ACC40Sk # mach: fr400 - .include "testutils.inc" + .include "../testutils.inc" start diff --git a/sim/testsuite/sim/frv/masaccs.cgs b/sim/testsuite/sim/frv/fr400/masaccs.cgs index 7369a71..8fbde91 100644 --- a/sim/testsuite/sim/frv/masaccs.cgs +++ b/sim/testsuite/sim/frv/fr400/masaccs.cgs @@ -1,7 +1,7 @@ # frv testcase for masaccs $ACC40Si,$ACC40Sk # mach: fr400 - .include "testutils.inc" + .include "../testutils.inc" start diff --git a/sim/testsuite/sim/frv/msubaccs.cgs b/sim/testsuite/sim/frv/fr400/msubaccs.cgs index f793e9a..f0aba1d 100644 --- a/sim/testsuite/sim/frv/msubaccs.cgs +++ b/sim/testsuite/sim/frv/fr400/msubaccs.cgs @@ -1,7 +1,7 @@ # frv testcase for msubaccs $ACC40Si,$ACC40Sk # mach: fr400 - .include "testutils.inc" + .include "../testutils.inc" start |