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| author | Mike Frysinger <vapier@gentoo.org> | 2021-01-05 22:09:57 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2021-01-15 19:18:34 -0500 |
| commit | 1368b914e93a3af332f787d3d41c106d11bb90da (patch) | |
| tree | 9893ccae5d2d8cbf2ce855e09d6b8f30b56a21bc /sim/testsuite/bfin/vec-abs-3.S | |
| parent | e403a898b5893337baea73bcb001ece74042f351 (diff) | |
| download | gdb-1368b914e93a3af332f787d3d41c106d11bb90da.zip gdb-1368b914e93a3af332f787d3d41c106d11bb90da.tar.gz gdb-1368b914e93a3af332f787d3d41c106d11bb90da.tar.bz2 | |
sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.
We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim". Since we have no
other dirs in this tree, and no plans to add any, should be fine.
Diffstat (limited to 'sim/testsuite/bfin/vec-abs-3.S')
| -rw-r--r-- | sim/testsuite/bfin/vec-abs-3.S | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/sim/testsuite/bfin/vec-abs-3.S b/sim/testsuite/bfin/vec-abs-3.S new file mode 100644 index 0000000..bf003a1 --- /dev/null +++ b/sim/testsuite/bfin/vec-abs-3.S @@ -0,0 +1,42 @@ +# Blackfin testcase for vector ABS instruction +# mach: bfin + +#include "test.h" + + .include "testutils.inc" + + start + + .global _test +_test: + R6 = ASTAT; + R0.H = 0x8000; + R0.L = 0x0; + R1 = ABS R0 (V); + R7 = ASTAT; + R2.H = 0x7fff; + R2.L = 0x0; + CC = R1 == R2; + IF !CC JUMP 1f; + /* CLEARED: AN */ + R3.H = HI(_AN); + R3.L = LO(_AN); + R4 = R7 & R3; + CC = R4 == 0; + IF !CC JUMP 1f; + /* SET: AZ V V_COPY VS */ + R3.H = HI(_AZ|_V|_V_COPY|_VS); + R3.L = LO(_AZ|_V|_V_COPY|_VS); + R4 = R7 & R3; + CC = R3 == R4; + IF !CC JUMP 1f; + /* UNAFFECTED: CC AQ RND_MOD AV0 AV0S AV1 AV1S AC0 AC0_COPY AC1 */ + R3.H = HI(_CC|_AQ|_RND_MOD|_AV0|_AV0S|_AV1|_AV1S|_AC0|_AC0_COPY|_AC1); + R3.L = LO(_CC|_AQ|_RND_MOD|_AV0|_AV0S|_AV1|_AV1S|_AC0|_AC0_COPY|_AC1); + R4 = R6 & R3; + R5 = R7 & R3; + CC = R4 == R5; + IF !CC JUMP 1f; + pass +1: + fail |