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author | Reuben Thomas <rrt@sc3d.org> | 2022-03-24 12:05:21 +0000 |
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committer | Simon Marchi <simon.marchi@efficios.com> | 2022-03-24 10:34:51 -0400 |
commit | c41524681bf2dad22390fe2b1cfbdeac1576e1e5 (patch) | |
tree | fba248f858280ed0b4acadaeb0ab93e3c71a23e3 /sim/ppc/std-config.h | |
parent | f1a45585865a724d83133a2299768b5953d2ed94 (diff) | |
download | gdb-c41524681bf2dad22390fe2b1cfbdeac1576e1e5.zip gdb-c41524681bf2dad22390fe2b1cfbdeac1576e1e5.tar.gz gdb-c41524681bf2dad22390fe2b1cfbdeac1576e1e5.tar.bz2 |
sim: fix “alligned” typos
Change-Id: Ifd574e38524dd4f1cf0fc003e0c5c7499abc84a0
Diffstat (limited to 'sim/ppc/std-config.h')
-rw-r--r-- | sim/ppc/std-config.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sim/ppc/std-config.h b/sim/ppc/std-config.h index 0619d1d..e02d594 100644 --- a/sim/ppc/std-config.h +++ b/sim/ppc/std-config.h @@ -183,7 +183,7 @@ extern int current_environment; This model. Instead allows both little and big endian modes to either take exceptions or handle miss aligned transfers. - If 0 is specified then for big-endian mode miss alligned accesses + If 0 is specified then for big-endian mode miss aligned accesses are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the processor will fault on them (STRICT_ALIGNMENT). */ |