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| author | Christophe Lyon <christophe.lyon@linaro.org> | 2020-03-18 12:36:53 +0000 |
|---|---|---|
| committer | Christophe Lyon <christophe.lyon@linaro.org> | 2020-03-18 12:38:30 +0000 |
| commit | aef397a1548908f82907854a6efc0cd4c0539904 (patch) | |
| tree | c40594e223a4bc340be2735d5c7e0406df2cafaa /sim/frv | |
| parent | ac4bf06ca22b641b10fe37763bf57e177ee22864 (diff) | |
| download | gdb-aef397a1548908f82907854a6efc0cd4c0539904.zip gdb-aef397a1548908f82907854a6efc0cd4c0539904.tar.gz gdb-aef397a1548908f82907854a6efc0cd4c0539904.tar.bz2 | |
Non-contiguous memory regions support: Fix testcases after previous commit
2020-03-18 Christophe Lyon <christophe.lyon@linaro.org>
* testsuite/ld-arm/non-contiguous-arm4.d: Fix expected output.
* testsuite/ld-powerpc/non-contiguous-powerpc.d: Likewise.
Change-Id: I8870800177e1ff79cdd05af13613ec53ef95681f
Diffstat (limited to 'sim/frv')
0 files changed, 0 insertions, 0 deletions