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authorMartin Hunt <hunt@redhat.com>1996-10-21 23:17:43 +0000
committerMartin Hunt <hunt@redhat.com>1996-10-21 23:17:43 +0000
commiteca43eb1f57a1c26f64df0dc8f135203d4f7b345 (patch)
tree7494df4247d22d1364e1048edbd70c2ae768237f /sim/d10v
parent23da411ac8fca1a6cab206cbc73618454abe46ab (diff)
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Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* interp.c (sim_resume): Change the way single-stepping and exceptions are handled so single-stepping works again.
Diffstat (limited to 'sim/d10v')
-rw-r--r--sim/d10v/ChangeLog5
-rw-r--r--sim/d10v/interp.c11
2 files changed, 10 insertions, 6 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 95b2690..9f1b4ac 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,8 @@
+Mon Oct 21 16:16:26 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
+
+ * interp.c (sim_resume): Change the way single-stepping and exceptions
+ are handled so single-stepping works again.
+
Thu Oct 17 12:24:16 1996 Michael Meissner <meissner@tiktok.cygnus.com>
* endian.c: Optimize simulated loads/stores on x86, AIX, and big
diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index d06b86b..21d4811 100644
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -317,11 +317,7 @@ sim_resume (step, siggnal)
/* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
- if (step)
- State.exception = SIGTRAP;
- else
- State.exception = 0;
-
+ State.exception = 0;
do
{
uint32 byte_pc = ((uint32)PC) << 2;
@@ -369,7 +365,10 @@ sim_resume (step, siggnal)
PC++;
}
}
- while (!State.exception);
+ while ( !State.exception && !step);
+
+ if (step && !State.exception)
+ State.exception = SIGTRAP;
}
int