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| author | Elena Zannoni <ezannoni@kwikemart.cygnus.com> | 2002-05-28 15:49:52 +0000 |
|---|---|---|
| committer | Elena Zannoni <ezannoni@kwikemart.cygnus.com> | 2002-05-28 15:49:52 +0000 |
| commit | 1aa5e64f43701efe72b2701463a58ff84f48df74 (patch) | |
| tree | 07adf3d8646d2f415f05d441bc417b2bc3f88d4e /sim/d10v | |
| parent | 697f244d5b0b161224f7a84abb7bb59fd798afd5 (diff) | |
| download | gdb-1aa5e64f43701efe72b2701463a58ff84f48df74.zip gdb-1aa5e64f43701efe72b2701463a58ff84f48df74.tar.gz gdb-1aa5e64f43701efe72b2701463a58ff84f48df74.tar.bz2 | |
2002-05-28 Elena Zannoni <ezannoni@redhat.com>
* interp.c (sim_create_inferior): Add comment.
From Alan Matsuoka <alanm@redhat.com>:
From 2001-04-27 Jason Eckhardt <jle@cygnus.com>:
* simops.c (OP_4400): Output "mvf0f" instead of "mf0f".
(OP_4401): Output "mvf0t" instead of "mf0t".
(OP_460B): Do not output a flag register.
(OP_4609): Do not output a flag register.
Diffstat (limited to 'sim/d10v')
| -rw-r--r-- | sim/d10v/ChangeLog | 11 | ||||
| -rw-r--r-- | sim/d10v/interp.c | 8 | ||||
| -rw-r--r-- | sim/d10v/simops.c | 8 |
3 files changed, 23 insertions, 4 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog index f798d94..c232dca 100644 --- a/sim/d10v/ChangeLog +++ b/sim/d10v/ChangeLog @@ -1,3 +1,14 @@ +2002-05-28 Elena Zannoni <ezannoni@redhat.com> + + * interp.c (sim_create_inferior): Add comment. + + From Alan Matsuoka <alanm@redhat.com>: + From 2001-04-27 Jason Eckhardt <jle@cygnus.com>: + * simops.c (OP_4400): Output "mvf0f" instead of "mf0f". + (OP_4401): Output "mvf0t" instead of "mf0t". + (OP_460B): Do not output a flag register. + (OP_4609): Do not output a flag register. + 2002-05-23 Andrew Cagney <ac131313@redhat.com> * Makefile.in (INCLUDE): Add "gdb/sim-d10v.h". diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c index 338305c..0b02d8a 100644 --- a/sim/d10v/interp.c +++ b/sim/d10v/interp.c @@ -1202,6 +1202,14 @@ sim_create_inferior (sd, abfd, argv, env) /* reset all state information */ memset (&State.regs, 0, (int)&State.mem - (int)&State.regs); + /* There was a hack here to copy the values of argc and argv into r0 + and r1. The values were also saved into some high memory that + won't be overwritten by the stack (0x7C00). The reason for doing + this was to allow the 'run' program to accept arguments. Without + the hack, this is not possible anymore. If the simulator is run + from the debugger, arguments cannot be passed in, so this makes + no difference. */ + /* set PC */ if (abfd != NULL) start_address = bfd_get_start_address (abfd); diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c index cb0fa56..1c0ecfe 100644 --- a/sim/d10v/simops.c +++ b/sim/d10v/simops.c @@ -1972,7 +1972,7 @@ void OP_4400 () { int16 tmp; - trace_input ("mf0f", OP_REG_OUTPUT, OP_REG, OP_VOID); + trace_input ("mvf0f", OP_REG_OUTPUT, OP_REG, OP_VOID); if (PSW_F0 == 0) { tmp = GPR (OP[1]); @@ -1988,7 +1988,7 @@ void OP_4401 () { int16 tmp; - trace_input ("mf0t", OP_REG_OUTPUT, OP_REG, OP_VOID); + trace_input ("mvf0t", OP_REG_OUTPUT, OP_REG, OP_VOID); if (PSW_F0) { tmp = GPR (OP[1]); @@ -2604,7 +2604,7 @@ void OP_460B () { int16 tmp; - trace_input ("slx", OP_REG, OP_FLAG, OP_VOID); + trace_input ("slx", OP_REG, OP_VOID, OP_VOID); tmp = ((GPR (OP[0]) << 1) | PSW_F0); SET_GPR (OP[0], tmp); trace_output_16 (tmp); @@ -2726,7 +2726,7 @@ void OP_4609 () { uint16 tmp; - trace_input ("srx", OP_REG, OP_FLAG, OP_VOID); + trace_input ("srx", OP_REG, OP_VOID, OP_VOID); tmp = PSW_F0 << 15; tmp = ((GPR (OP[0]) >> 1) | tmp); SET_GPR (OP[0], tmp); |