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| author | Mike Frysinger <vapier@gentoo.org> | 2015-11-15 03:07:06 -0800 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2015-11-15 20:47:17 -0500 |
| commit | aadc1740c74a65b916b7d9bb6efe588352326871 (patch) | |
| tree | 9f8c003872722c6cf0a96536eb222cabfb6bc451 /sim/d10v/Makefile.in | |
| parent | 679546067e1f3e1617bff22d03e483fb2beeed24 (diff) | |
| download | gdb-aadc1740c74a65b916b7d9bb6efe588352326871.zip gdb-aadc1740c74a65b916b7d9bb6efe588352326871.tar.gz gdb-aadc1740c74a65b916b7d9bb6efe588352326871.tar.bz2 | |
sim: d10v: convert to common sim engine logic
Now that we have access to the sim state everywhere, we can convert to
the common engine logic for overall processing. This frees us up from
tracking exception state ourselves.
Diffstat (limited to 'sim/d10v/Makefile.in')
| -rw-r--r-- | sim/d10v/Makefile.in | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/sim/d10v/Makefile.in b/sim/d10v/Makefile.in index 27b0008..a6100de 100644 --- a/sim/d10v/Makefile.in +++ b/sim/d10v/Makefile.in @@ -21,6 +21,9 @@ SIM_OBJS = \ interp.o \ $(SIM_NEW_COMMON_OBJS) \ sim-hload.o \ + sim-reason.o \ + sim-resume.o \ + sim-stop.o \ table.o \ simops.o \ endian.o |