From aadc1740c74a65b916b7d9bb6efe588352326871 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 15 Nov 2015 03:07:06 -0800 Subject: sim: d10v: convert to common sim engine logic Now that we have access to the sim state everywhere, we can convert to the common engine logic for overall processing. This frees us up from tracking exception state ourselves. --- sim/d10v/Makefile.in | 3 +++ 1 file changed, 3 insertions(+) (limited to 'sim/d10v/Makefile.in') diff --git a/sim/d10v/Makefile.in b/sim/d10v/Makefile.in index 27b0008..a6100de 100644 --- a/sim/d10v/Makefile.in +++ b/sim/d10v/Makefile.in @@ -21,6 +21,9 @@ SIM_OBJS = \ interp.o \ $(SIM_NEW_COMMON_OBJS) \ sim-hload.o \ + sim-reason.o \ + sim-resume.o \ + sim-stop.o \ table.o \ simops.o \ endian.o -- cgit v1.1