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| author | H.J. Lu <hjl.tools@gmail.com> | 2007-08-28 17:36:34 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2007-08-28 17:36:34 +0000 |
| commit | d9a5e5e5c91086a8dd66174a7ebff52c00efe79e (patch) | |
| tree | bd7ab2e401e44e7ee2b191527d4658d507c21533 /opcodes | |
| parent | d5ce5596bf611b65e4fc93b4e90df67359f4cba5 (diff) | |
| download | gdb-d9a5e5e5c91086a8dd66174a7ebff52c00efe79e.zip gdb-d9a5e5e5c91086a8dd66174a7ebff52c00efe79e.tar.gz gdb-d9a5e5e5c91086a8dd66174a7ebff52c00efe79e.tar.bz2 | |
gas/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (process_suffix): Handle cmpxchg8b in
Intel mode.
gas/testsuite/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/mem.s: New. Add tests for instructions with one
memory operand.
* gas/i386/x86-64-mem.s: Likewise.
* gas/i386/mem-intel.d: Updated.
* gas/i386/mem.d: Likewise.
* gas/i386/x86-64-mem-intel.d: Likewise.
* gas/i386/x86-64-mem.d: Likewise.
opcodes/
2007-08-28 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (Md): New.
(grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use
Md on ldmxcsr and stmxcsr. Use b_mode on clflush.
(OP_0fae): Clear bytemode for sfence.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 19 |
2 files changed, 19 insertions, 7 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index e9c9b98..5950e26 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2007-08-28 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (Md): New. + (grps): Use 0 on invlpg. Use M on fxsave and fxrstor. Use + Md on ldmxcsr and stmxcsr. Use b_mode on clflush. + (OP_0fae): Clear bytemode for sfence. + 2007-08-22 Ben Elliston <bje@au.ibm.com> * ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 4058dce..b6ece0f 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -215,6 +215,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Ew { OP_E, w_mode } #define M { OP_M, 0 } /* lea, lgdt, etc. */ #define Ma { OP_M, v_mode } +#define Md { OP_M, d_mode } #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */ #define Mq { OP_M, q_mode } #define Gb { OP_G, b_mode } @@ -1702,7 +1703,7 @@ static const struct dis386 grps[][8] = { { "smswD", { Sv } }, { "(bad)", { XX } }, { "lmsw", { Ew } }, - { "invlpg", { { INVLPG_Fixup, w_mode } } }, + { "invlpg", { { INVLPG_Fixup, 0 } } }, }, /* GRP8 */ { @@ -1783,14 +1784,14 @@ static const struct dis386 grps[][8] = { }, /* GRP15 */ { - { "fxsave", { Ev } }, - { "fxrstor", { Ev } }, - { "ldmxcsr", { Ev } }, - { "stmxcsr", { Ev } }, + { "fxsave", { M } }, + { "fxrstor", { M } }, + { "ldmxcsr", { Md } }, + { "stmxcsr", { Md } }, { "(bad)", { XX } }, { "lfence", { { OP_0fae, 0 } } }, { "mfence", { { OP_0fae, 0 } } }, - { "clflush", { { OP_0fae, 0 } } }, + { "clflush", { { OP_0fae, b_mode } } }, }, /* GRP16 */ { @@ -5908,7 +5909,11 @@ OP_0fae (int bytemode, int sizeflag) if (modrm.mod == 3) { if (modrm.reg == 7) - strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); + { + bytemode = 0; + strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, + "sfence"); + } if (modrm.reg < 5 || modrm.rm != 0) { |