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| author | Jan Beulich <jbeulich@novell.com> | 2018-03-08 08:33:06 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2018-03-08 08:33:06 +0100 |
| commit | d53e6b98a2599ba4ce6ad14f711b76e44a32eea5 (patch) | |
| tree | c72b0b63b8eb7777583af718c0075516090ec369 /opcodes | |
| parent | a477a8c4f4f7e827d32abc1fbb45bdb3c37cff09 (diff) | |
| download | gdb-d53e6b98a2599ba4ce6ad14f711b76e44a32eea5.zip gdb-d53e6b98a2599ba4ce6ad14f711b76e44a32eea5.tar.gz gdb-d53e6b98a2599ba4ce6ad14f711b76e44a32eea5.tar.bz2 | |
x86/Intel: correct disassembly of fsub*/fdiv*
fsub/fsubr/fsubp/fsubrp as well as fdiv/fdivr/fdivp/fdivrp disassembly
should match (a) the Intel SDM and (b) respective input fed to gas (both
of course with the exception of when we intentionally convert bogus
insns, accompanied by a warning).
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 16 |
2 files changed, 12 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 309a034..14f74cc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,9 @@ 2018-03-08 Jan Beulich <jbeulich@suse.com> + * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns. + +2018-03-08 Jan Beulich <jbeulich@suse.com> + * i386-opc.tbl (vmovd): Disallow Qword memory operands. * i386-tlb.h: Re-generate. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 13ae4ca..be2fd8a 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -13737,10 +13737,10 @@ static const struct dis386 float_reg[][8] = { { "fmul", { STi, ST }, 0 }, { Bad_Opcode }, { Bad_Opcode }, - { "fsub!M", { STi, ST }, 0 }, - { "fsubM", { STi, ST }, 0 }, - { "fdiv!M", { STi, ST }, 0 }, - { "fdivM", { STi, ST }, 0 }, + { "fsub{!M|r}", { STi, ST }, 0 }, + { "fsub{M|}", { STi, ST }, 0 }, + { "fdiv{!M|r}", { STi, ST }, 0 }, + { "fdiv{M|}", { STi, ST }, 0 }, }, /* dd */ { @@ -13759,10 +13759,10 @@ static const struct dis386 float_reg[][8] = { { "fmulp", { STi, ST }, 0 }, { Bad_Opcode }, { FGRPde_3 }, - { "fsub!Mp", { STi, ST }, 0 }, - { "fsubMp", { STi, ST }, 0 }, - { "fdiv!Mp", { STi, ST }, 0 }, - { "fdivMp", { STi, ST }, 0 }, + { "fsub{!M|r}p", { STi, ST }, 0 }, + { "fsub{M|}p", { STi, ST }, 0 }, + { "fdiv{!M|r}p", { STi, ST }, 0 }, + { "fdiv{M|}p", { STi, ST }, 0 }, }, /* df */ { |