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| author | Jeff Law <law@redhat.com> | 1996-12-16 20:05:07 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1996-12-16 20:05:07 +0000 |
| commit | d21f1eae7deab49dff91ac7b3ccf65963729993a (patch) | |
| tree | 12c58ce5a4ed94147682e4c743ea249389302af6 /opcodes | |
| parent | aaff84371eac84395861cac662a5d16eebcb07b9 (diff) | |
| download | gdb-d21f1eae7deab49dff91ac7b3ccf65963729993a.zip gdb-d21f1eae7deab49dff91ac7b3ccf65963729993a.tar.gz gdb-d21f1eae7deab49dff91ac7b3ccf65963729993a.tar.bz2 | |
* mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)".
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/mn10200-opc.c | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 82f08ce..d9dad0a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +Mon Dec 16 13:00:15 1996 Jeffrey A Law (law@cygnus.com) + + * mn10200-opc.c: Add pseudo-ops for "mov (an),am" and "mov an,(am)". + Sat Dec 14 22:36:20 1996 Ian Lance Taylor <ian@cygnus.com> * mips-dis.c (print_mips16_insn_arg): The base address of a PC diff --git a/opcodes/mn10200-opc.c b/opcodes/mn10200-opc.c index 4ab833e..9f420f6 100644 --- a/opcodes/mn10200-opc.c +++ b/opcodes/mn10200-opc.c @@ -172,6 +172,7 @@ const struct mn10200_opcode mn10200_opcodes[] = { { "mov", 0xc80000, 0xfc0000, FMT_3, {MEM(IMM16_MEM), DN0}}, { "mov", 0xf4c00000, 0xfffc0000, FMT_7, {MEM(IMM24_MEM), DN0}}, { "mov", 0x7000, 0xf000, FMT_2, {MEM2(SD8,AN1), AM0}}, +{ "mov", 0x7000, 0xf000, FMT_2, {MEM(AN1), AM0}}, { "mov", 0xf7b00000, 0xfff00000, FMT_6, {MEM2(SD16, AN1), AM0}}, { "mov", 0xf4f00000, 0xfff00000, FMT_7, {MEM2(IMM24,AN1), AM0}}, { "mov", 0xf100, 0xffc0, FMT_4, {MEM2(DI, AN1), AM0}}, @@ -185,6 +186,7 @@ const struct mn10200_opcode mn10200_opcodes[] = { { "mov", 0xc00000, 0xfc0000, FMT_3, {DN0, MEM(IMM16_MEM)}}, { "mov", 0xf4400000, 0xfffc0000, FMT_7, {DN0, MEM(IMM24_MEM)}}, { "mov", 0x5000, 0xf000, FMT_2, {AM0, MEM2(SD8, AN1)}}, +{ "mov", 0x5000, 0xf000, FMT_2, {AM0, MEM(AN1)}}, { "mov", 0xf7a00000, 0xfff00000, FMT_6, {AM0, MEM2(SD16, AN1)}}, { "mov", 0xf4100000, 0xfff00000, FMT_7, {AM0, MEM2(IMM24,AN1)}}, { "mov", 0xf180, 0xffc0, FMT_4, {AM0, MEM2(DI, AN1)}}, |