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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2024-11-08 10:06:26 +0000 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2024-11-08 10:06:57 +0000 |
| commit | cfbbd4033366f626e4885d7a35317b09924d2d21 (patch) | |
| tree | 3f453d0aa970b262ba21d6a0a6a761d1da10db6a /opcodes | |
| parent | 2c9d089c901afe818f4daa841ced44b87c517d82 (diff) | |
| download | gdb-cfbbd4033366f626e4885d7a35317b09924d2d21.zip gdb-cfbbd4033366f626e4885d7a35317b09924d2d21.tar.gz gdb-cfbbd4033366f626e4885d7a35317b09924d2d21.tar.bz2 | |
arm, objdump: print obsolote warning when 26-bit set in instructions
Arm has obsoleted the 26-bit addressing mode. Diagnose this when disasembling
these instructions by printing OBSOLETE.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/arm-dis.c | 44 |
1 files changed, 19 insertions, 25 deletions
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index b395cdc..a83cbbd 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -3359,6 +3359,7 @@ static const struct mopcode32 mve_opcodes[] = %m print register mask for ldm/stm instruction %o print operand2 (immediate or register + shift) %p print 'p' iff bits 12-15 are 15 + %O print 'OBSOLETE' iff bits 12-15 are 15 %t print 't' iff bit 21 set and bit 24 clear %B print arm BLX(1) destination %C print the PSR sub type. @@ -3969,32 +3970,32 @@ static const struct opcode32 arm_opcodes[] = 0x01000000, 0x0fb00cff, "mrs%c\t%12-15R, %R"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x03000000, 0x0fe00000, "tst%p%c\t%16-19r, %o"}, + 0x03000000, 0x0fe00000, "tst%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01000000, 0x0fe00010, "tst%p%c\t%16-19r, %o"}, + 0x01000000, 0x0fe00010, "tst%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01000010, 0x0fe00090, "tst%p%c\t%16-19R, %o"}, + 0x01000010, 0x0fe00090, "tst%p%c\t%16-19R, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x03300000, 0x0ff00000, "teq%p%c\t%16-19r, %o"}, + 0x03300000, 0x0ff00000, "teq%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01300000, 0x0ff00010, "teq%p%c\t%16-19r, %o"}, + 0x01300000, 0x0ff00010, "teq%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01300010, 0x0ff00010, "teq%p%c\t%16-19R, %o"}, + 0x01300010, 0x0ff00010, "teq%p%c\t%16-19R, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x03400000, 0x0fe00000, "cmp%p%c\t%16-19r, %o"}, + 0x03400000, 0x0fe00000, "cmp%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01400000, 0x0fe00010, "cmp%p%c\t%16-19r, %o"}, + 0x01400000, 0x0fe00010, "cmp%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01400010, 0x0fe00090, "cmp%p%c\t%16-19R, %o"}, + 0x01400010, 0x0fe00090, "cmp%p%c\t%16-19R, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x03600000, 0x0fe00000, "cmn%p%c\t%16-19r, %o"}, + 0x03600000, 0x0fe00000, "cmn%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01600000, 0x0fe00010, "cmn%p%c\t%16-19r, %o"}, + 0x01600000, 0x0fe00010, "cmn%p%c\t%16-19r, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), - 0x01600010, 0x0fe00090, "cmn%p%c\t%16-19R, %o"}, + 0x01600010, 0x0fe00090, "cmn%p%c\t%16-19R, %o%O"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V1), 0x03800000, 0x0fe00000, "orr%20's%c\t%12-15r, %16-19r, %o"}, @@ -10327,19 +10328,12 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) case 'p': if ((given & 0x0000f000) == 0x0000f000) - { - arm_feature_set arm_ext_v6 = - ARM_FEATURE_CORE_LOW (ARM_EXT_V6); - - /* The p-variants of tst/cmp/cmn/teq are the pre-V6 - mechanism for setting PSR flag bits. They are - obsolete in V6 onwards. */ - if (! ARM_CPU_HAS_FEATURE (private_data->features, \ - arm_ext_v6)) - func (stream, dis_style_mnemonic, "p"); - else - is_unpredictable = true; - } + func (stream, dis_style_mnemonic, "p"); + break; + case 'O': + if ((given & 0x0000f000) == 0x0000f000) + func (stream, dis_style_text, + "\t@ p-variant is OBSOLETE"); break; case 't': |