diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2010-09-22 21:39:08 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2010-09-22 21:39:08 +0000 |
| commit | b2459327a660d444dfe4832d31d7b5ec2d5c2ba2 (patch) | |
| tree | ceff6542d7863758cc7714125e6f2fee65ffd115 /opcodes | |
| parent | 50e2162a2268fa1651c98a4570f4d76132cf9ae7 (diff) | |
| download | gdb-b2459327a660d444dfe4832d31d7b5ec2d5c2ba2.zip gdb-b2459327a660d444dfe4832d31d7b5ec2d5c2ba2.tar.gz gdb-b2459327a660d444dfe4832d31d7b5ec2d5c2ba2.tar.bz2 | |
opcodes: blackfin: decode all ASTAT bits
All ASTAT bits work in the hardware even though they aren't part of the
official Blackfin ISA. So decode every ASTAT field to make the output
a bit nicer when working with hand generated opcodes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/bfin-dis.c | 29 |
2 files changed, 25 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3925880..5ffc5c9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2010-09-22 Mike Frysinger <vapier@gentoo.org> + + * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits. + 2010-09-22 Robin Getz <robin.getz@analog.com> * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index ef7c7b5..f124f14 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -1227,44 +1227,57 @@ decode_CC2stat_0 (TIword iw0, disassemble_info *outf) int op = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask); int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask); + const char *bitname = statbits (cbit); + if (decode_statbits[cbit] == REG_LASTREG) + { + /* All ASTAT bits except CC may be operated on in hardware, but may + not have a dedicated insn, so still decode "valid" insns. */ + static char bitnames[64]; + if (cbit != 5) + sprintf (bitnames, "ASTAT[%i /* unused bit */]", cbit); + else + strcpy (bitnames, "CC /* ... Illegal register ... */"); + bitname = bitnames; + } + if (op == 0 && D == 0) { OUTS (outf, "CC = "); - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); } else if (op == 1 && D == 0) { OUTS (outf, "CC |= "); - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); } else if (op == 2 && D == 0) { OUTS (outf, "CC &= "); - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); } else if (op == 3 && D == 0) { OUTS (outf, "CC ^= "); - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); } else if (op == 0 && D == 1) { - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); OUTS (outf, " = CC"); } else if (op == 1 && D == 1) { - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); OUTS (outf, " |= CC"); } else if (op == 2 && D == 1) { - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); OUTS (outf, " &= CC"); } else if (op == 3 && D == 1) { - OUTS (outf, statbits (cbit)); + OUTS (outf, bitname); OUTS (outf, " ^= CC"); } else |