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authorGraham Markall <graham.markall@embecosm.com>2016-06-09 08:38:34 +0100
committerAndrew Burgess <andrew.burgess@embecosm.com>2016-06-14 16:21:44 +0100
commit9ba75c884776383174cd894948bd8b3cbca62897 (patch)
tree62d86cb417724e4b383f32039f0230a05cf619eb /opcodes
parent14053c1903cc0e4f0130570f61aee2825661cd7d (diff)
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[ARC] Add deep packet inspection instructions for nps
With the exception of ldbit, this commit adds implementations of all DPI instructions for the NPS-400. These instructions are: - hash / hash.p[0-3] - tr - utf8 - e4by - addf
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/arc-nps400-tbl.h117
-rw-r--r--opcodes/arc-opc.c97
3 files changed, 205 insertions, 15 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6b54926..0c39a6d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,11 @@
2016-06-13 Graham Markall <graham.markall@embecosm.com>
+ * arc-nps400-tbl.h: Add hash, hash.p[0-3], tr, utf8, e4by, and addf
+ * arc-opc.c: Add flag classes, insert/extract functions, and operands to
+ support the above instructions.
+
+2016-06-13 Graham Markall <graham.markall@embecosm.com>
+
* arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb,
imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms,
csma, cbba, zncv, and hofs.
diff --git a/opcodes/arc-nps400-tbl.h b/opcodes/arc-nps400-tbl.h
index fe6a195..233e441 100644
--- a/opcodes/arc-nps400-tbl.h
+++ b/opcodes/arc-nps400-tbl.h
@@ -386,6 +386,123 @@ ADDL_LIKE ("xorl", 0xE, NPS_UIMM16)
/* dcacl<.f> a,b,c 00111bbb001001010bbbccccccaaaaaa */
{ "dcacl", 0x38250000, 0xf8ff0000, ARC_OPCODE_NPS400, ACL, NONE, { RA, RB, RC }, { C_F }},
+/**** DPI Instructions ****/
+
+/* hash dst,src1,src2,width,perm,nonlinear,basemat */
+{ "hash", 0x58180000, 0xf81f0000, ARC_OPCODE_NPS400, DPI, NONE, { NPS_DPI_DST, NPS_DPI_SRC1_3B, NPS_R_SRC2_3B, NPS_HASH_WIDTH, NPS_HASH_PERM, NPS_HASH_NONLINEAR, NPS_HASH_BASEMAT }, { 0 }},
+
+/* hash.pN dst,src1,src2,width,len,ofs,basemat */
+
+#define HASH_P(FUNC, SUBOP2) \
+ { "hash", (0x58100000 | (SUBOP2 << 16)), 0xf81f0000, ARC_OPCODE_NPS400, DPI, NONE, { NPS_DPI_DST, NPS_DPI_SRC1_3B, NPS_R_SRC2_3B, NPS_HASH_WIDTH, NPS_HASH_LEN, NPS_HASH_OFS, NPS_HASH_BASEMAT2 }, { C_NPS_P##FUNC }},
+
+HASH_P(0, 0x9)
+HASH_P(1, 0xA)
+HASH_P(2, 0xB)
+HASH_P(3, 0xC)
+
+/* tr<.f> a,b,c 00111bbb00100001FBBBCCCCCCAAAAAA */
+{ "tr", 0x38210000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, RC }, { C_F }},
+
+/* tr<.f> a,limm,c 0011111000100001F111CCCCCCAAAAAA */
+{ "tr", 0x3e217000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, RC }, { C_F }},
+
+/* tr<.f> a,b,u6 00111bbb01100001FBBBuuuuuuAAAAAA */
+{ "tr", 0x38610000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, UIMM6_20 }, { C_F }},
+
+/* tr<.f> 0,b,c 00111bbb00100001FBBBCCCCCC111110 */
+{ "tr", 0x3821003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, RC }, { C_F }},
+
+/* tr<.f> 0,limm,c 0011111000100001F111CCCCCC111110 */
+{ "tr", 0x3e21703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, RC }, { C_F }},
+
+/* tr<.f> 0,b,u6 00111bbb01100001FBBBuuuuuu111110 */
+{ "tr", 0x3861003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, UIMM6_20 }, { C_F }},
+
+/* tr<.f> 0,b,limm 00111bbb00100001FBBB111110111110 */
+{ "tr", 0x38210fbe, 0xf8ff0fff, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, LIMM }, { C_F }},
+
+/* tr<.f> a,b,limm 00111bbb00100001FBBB111110AAAAAA */
+{ "tr", 0x38210f80, 0xf8ff0fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, LIMM }, { C_F }},
+
+/* tr<.f> a,limm,limm 0011111000100001F111111110AAAAAA */
+{ "tr", 0x3e217f80, 0xffff7fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, LIMMdup }, { C_F }},
+
+/* tr<.f> a,limm,u6 0011111001100001F111uuuuuuAAAAAA */
+{ "tr", 0x3e617000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, UIMM6_20 }, { C_F }},
+
+/* tr<.f> 0,limm,u6 0011111001100001F111uuuuuu111110 */
+{ "tr", 0x3e61703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, UIMM6_20 }, { C_F }},
+
+/* utf8 a,b,c 00111bbb00100011FBBBCCCCCCAAAAAA */
+{ "utf8", 0x38220000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, RC }, { C_F }},
+
+/* utf8 a,limm,c 0011111000100011F111CCCCCCAAAAAA */
+{ "utf8", 0x3e227000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, RC }, { C_F }},
+
+/* utf8 a,b,u6 00111bbb01100011FBBBuuuuuuAAAAAA */
+{ "utf8", 0x38620000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, UIMM6_20 }, { C_F }},
+
+/* utf8 0,b,c 00111bbb00100011FBBBCCCCCC111110 */
+{ "utf8", 0x3822003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, RC }, { C_F }},
+
+/* utf8 0,limm,c 0011111000100011F111CCCCCC111110 */
+{ "utf8", 0x3e22703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, RC }, { C_F }},
+
+/* utf8 0,b,u6 00111bbb01100011FBBBuuuuuu111110 */
+{ "utf8", 0x3862003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, UIMM6_20 }, { C_F }},
+
+/* utf8 0,b,limm 00111bbb00100011FBBB111110111110 */
+{ "utf8", 0x38220fbe, 0xf8ff0fff, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, LIMM }, { C_F }},
+
+/* utf8 a,b,limm 00111bbb00100011FBBB111110AAAAAA */
+{ "utf8", 0x38220f80, 0xf8ff0fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, LIMM }, { C_F }},
+
+/* utf8 a,limm,limm 0011111000100011F111111110AAAAAA */
+{ "utf8", 0x3e227f80, 0xffff7fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, LIMMdup }, { C_F }},
+
+/* utf8 a,limm,u6 0011111001100011F111uuuuuuAAAAAA */
+{ "utf8", 0x3e627000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, UIMM6_20 }, { C_F }},
+
+/* utf8 0,limm,u6 0011111001100011F111uuuuuu111110 */
+{ "utf8", 0x3e62703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, UIMM6_20 }, { C_F }},
+
+/* e4by dst,src1,src2,index0,index1,index2,index3 */
+{ "e4by", 0x581d0000, 0xf81f0000, ARC_OPCODE_NPS400, DPI, NONE, { NPS_DPI_DST, NPS_DPI_SRC1_3B, NPS_R_SRC2_3B, NPS_E4BY_INDEX0, NPS_E4BY_INDEX1, NPS_E4BY_INDEX2, NPS_E4BY_INDEX3 }, { 0 }},
+
+/* addf<.f> a,b,c 00111bbb00100011FBBBCCCCCCAAAAAA */
+{ "addf", 0x38230000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, RC }, { C_F }},
+
+/* addf<.f> a,limm,c 0011111000100011F111CCCCCCAAAAAA */
+{ "addf", 0x3e237000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, RC }, { C_F }},
+
+/* addf<.f> a,b,u6 00111bbb01100011FBBBuuuuuuAAAAAA */
+{ "addf", 0x38630000, 0xf8ff0000, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, UIMM6_20 }, { C_F }},
+
+/* addf<.f> 0,b,c 00111bbb00100011FBBBCCCCCC111110 */
+{ "addf", 0x3823003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, RC }, { C_F }},
+
+/* addf<.f> 0,limm,c 0011111000100011F111CCCCCC111110 */
+{ "addf", 0x3e23703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, RC }, { C_F }},
+
+/* addf<.f> 0,b,u6 00111bbb01100011FBBBuuuuuu111110 */
+{ "addf", 0x3863003e, 0xf8ff003f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, UIMM6_20 }, { C_F }},
+
+/* addf<.f> 0,b,limm 00111bbb00100011FBBB111110111110 */
+{ "addf", 0x38230fbe, 0xf8ff0fff, ARC_OPCODE_NPS400, DPI, NONE, { ZA, RB, LIMM }, { C_F }},
+
+/* addf<.f> a,b,limm 00111bbb00100011FBBB111110AAAAAA */
+{ "addf", 0x38230f80, 0xf8ff0fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, RB, LIMM }, { C_F }},
+
+/* addf<.f> a,limm,limm 0011111000100011F111111110AAAAAA */
+{ "addf", 0x3e237f80, 0xffff7fc0, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, LIMMdup }, { C_F }},
+
+/* addf<.f> a,limm,u6 0011111001100011F111uuuuuuAAAAAA */
+{ "addf", 0x3e637000, 0xffff7000, ARC_OPCODE_NPS400, DPI, NONE, { RA, LIMM, UIMM6_20 }, { C_F }},
+
+/* addf<.f> 0,limm,u6 0011111001100011F111uuuuuu111110 */
+{ "addf", 0x3e63703e, 0xffff703f, ARC_OPCODE_NPS400, DPI, NONE, { ZA, LIMM, UIMM6_20 }, { C_F }},
+
/**** Pipeline Control Instructions ****/
/* schd<.rw|.rd> */
diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index 7e0ba46..f706ffa 100644
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -940,13 +940,13 @@ extract_nps_##NAME##_pos (unsigned insn ATTRIBUTE_UNUSED, \
MAKE_SRC_POS_INSERT_EXTRACT_FUNCS (src2, 12)
MAKE_SRC_POS_INSERT_EXTRACT_FUNCS (src1, 10)
-#define MAKE_SIZE_INSERT_EXTRACT_FUNCS(NAME,LOWER,UPPER,BITS,BIAS,SHIFT)\
+#define MAKE_BIAS_INSERT_EXTRACT_FUNCS(NAME,LOWER,UPPER,BITS,BIAS,SHIFT)\
static unsigned \
-insert_nps_##NAME##_size (unsigned insn ATTRIBUTE_UNUSED, \
- int value ATTRIBUTE_UNUSED, \
- const char **errmsg ATTRIBUTE_UNUSED) \
+insert_nps_##NAME (unsigned insn ATTRIBUTE_UNUSED, \
+ int value ATTRIBUTE_UNUSED, \
+ const char **errmsg ATTRIBUTE_UNUSED) \
{ \
- if (value < LOWER || value > 32) \
+ if (value < LOWER || value > UPPER) \
{ \
*errmsg = _("Invalid size, value must be " \
#LOWER " to " #UPPER "."); \
@@ -958,20 +958,23 @@ insert_nps_##NAME##_size (unsigned insn ATTRIBUTE_UNUSED, \
} \
\
static int \
-extract_nps_##NAME##_size (unsigned insn ATTRIBUTE_UNUSED, \
- bfd_boolean * invalid ATTRIBUTE_UNUSED) \
+extract_nps_##NAME (unsigned insn ATTRIBUTE_UNUSED, \
+ bfd_boolean * invalid ATTRIBUTE_UNUSED) \
{ \
return ((insn >> SHIFT) & ((1 << BITS) - 1)) + BIAS; \
}
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(addb,2,32,5,1,5)
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(andb,1,32,5,1,5)
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(fxorb,8,32,5,8,5)
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(wxorb,16,32,5,16,5)
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(bitop,1,32,5,1,10)
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(qcmp,1,8,3,1,9)
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(bitop1,1,32,5,1,20)
-MAKE_SIZE_INSERT_EXTRACT_FUNCS(bitop2,1,32,5,1,25)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(addb_size,2,32,5,1,5)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(andb_size,1,32,5,1,5)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(fxorb_size,8,32,5,8,5)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(wxorb_size,16,32,5,16,5)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(bitop_size,1,32,5,1,10)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(qcmp_size,1,8,3,1,9)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(bitop1_size,1,32,5,1,20)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(bitop2_size,1,32,5,1,25)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(hash_width,1,32,5,1,6)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(hash_len,1,8,3,1,2)
+MAKE_BIAS_INSERT_EXTRACT_FUNCS(index3,4,7,2,4,0)
static int
extract_nps_qcmp_m3 (unsigned insn ATTRIBUTE_UNUSED,
@@ -1372,6 +1375,18 @@ const struct arc_flag_operand arc_flag_operands[] =
#define F_NPS_ZNCV_WR (F_NPS_ZNCV_RD + 1)
{ "wr", 1, 1, 15, 1 },
+
+#define F_NPS_P0 (F_NPS_ZNCV_WR + 1)
+ { "p0", 0, 0, 0, 1 },
+
+#define F_NPS_P1 (F_NPS_P0 + 1)
+ { "p1", 0, 0, 0, 1 },
+
+#define F_NPS_P2 (F_NPS_P1 + 1)
+ { "p2", 0, 0, 0, 1 },
+
+#define F_NPS_P3 (F_NPS_P2 + 1)
+ { "p3", 0, 0, 0, 1 },
};
const unsigned arc_num_flag_operands = ARRAY_SIZE (arc_flag_operands);
@@ -1484,6 +1499,18 @@ const struct arc_flag_class arc_flag_classes[] =
#define C_NPS_ZNCV (C_NPS_S + 1)
{ F_CLASS_REQUIRED, { F_NPS_ZNCV_RD, F_NPS_ZNCV_WR, F_NULL}},
+
+#define C_NPS_P0 (C_NPS_ZNCV + 1)
+ { F_CLASS_REQUIRED, { F_NPS_P0, F_NULL }},
+
+#define C_NPS_P1 (C_NPS_P0 + 1)
+ { F_CLASS_REQUIRED, { F_NPS_P1, F_NULL }},
+
+#define C_NPS_P2 (C_NPS_P1 + 1)
+ { F_CLASS_REQUIRED, { F_NPS_P2, F_NULL }},
+
+#define C_NPS_P3 (C_NPS_P2 + 1)
+ { F_CLASS_REQUIRED, { F_NPS_P3, F_NULL }},
};
const unsigned char flags_none[] = { 0 };
@@ -1980,6 +2007,46 @@ const struct arc_operand arc_operands[] =
#define NPS_PSBC (NPS_MIN_HOFS + 1)
{ 1, 11, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_DPI_DST (NPS_PSBC + 1)
+ { 5, 11, 0, ARC_OPERAND_IR, NULL, NULL },
+
+ /* NPS_DPI_SRC1_3B is similar to NPS_R_SRC1_3B but doesn't duplicate an operand */
+#define NPS_DPI_SRC1_3B (NPS_DPI_DST + 1)
+ { 3, 24, 0, ARC_OPERAND_IR | ARC_OPERAND_NCHK, insert_nps_3bit_dst, extract_nps_3bit_dst },
+
+#define NPS_HASH_WIDTH (NPS_DPI_SRC1_3B + 1)
+ { 5, 6, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_hash_width, extract_nps_hash_width },
+
+#define NPS_HASH_PERM (NPS_HASH_WIDTH + 1)
+ { 3, 2, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_HASH_NONLINEAR (NPS_HASH_PERM + 1)
+ { 1, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_HASH_BASEMAT (NPS_HASH_NONLINEAR + 1)
+ { 2, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_HASH_LEN (NPS_HASH_BASEMAT + 1)
+ { 3, 2, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_hash_len, extract_nps_hash_len },
+
+#define NPS_HASH_OFS (NPS_HASH_LEN + 1)
+ { 2, 0, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_HASH_BASEMAT2 (NPS_HASH_OFS + 1)
+ { 1, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_E4BY_INDEX0 (NPS_HASH_BASEMAT2 + 1)
+ { 3, 8, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_E4BY_INDEX1 (NPS_E4BY_INDEX0 + 1)
+ { 3, 5, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_E4BY_INDEX2 (NPS_E4BY_INDEX1 + 1)
+ { 3, 2, 0, ARC_OPERAND_UNSIGNED, NULL, NULL },
+
+#define NPS_E4BY_INDEX3 (NPS_E4BY_INDEX2 + 1)
+ { 2, 0, 0, ARC_OPERAND_UNSIGNED | ARC_OPERAND_NCHK, insert_nps_index3, extract_nps_index3 },
};
const unsigned arc_num_operands = ARRAY_SIZE (arc_operands);