opcodes/mips: disassemble unknown micromips instructions as two shorts

Before commit:

  commit 2438b771ee07be19d5b01ea55e077dd8b7cef445
  Date:   Wed Nov 2 15:53:43 2022 +0000

      opcodes/mips: use .word/.short for undefined instructions

unknown 32-bit microMIPS instructions were disassembled as a raw
32-bit number with no '.word' directive.  The above commit changed
this and added a '.word' directive before the 32-bit number.

It was pointed out on the mailing list, that for microMIPS it would be
better to display such 32-bit instructions using a '.short' directive
followed by two 16-bit values.

This commit updates the mips disassembler to do this, and adds a new
test that validates this output.

1 files changed, 8 insertions, 5 deletions

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 6a513cd..859d4e3 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -2600,12 +2600,15 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
 	}
     }
 
-  if (length == 2)
-    infprintf (is, dis_style_assembler_directive, ".short");
-  else
-    infprintf (is, dis_style_assembler_directive, ".word");
+  infprintf (is, dis_style_assembler_directive, ".short");
   infprintf (is, dis_style_text, "\t");
-  infprintf (is, dis_style_immediate, "0x%x", insn);
+  if (length != 2)
+    {
+      infprintf (is, dis_style_immediate, "0x%x", (insn >> 16) & 0xffff);
+      infprintf (is, dis_style_text, ", ");
+    }
+  infprintf (is, dis_style_immediate, "0x%x", (insn & 0xffff));
+
   info->insn_type = dis_noninsn;
 
   return length;