riscv: print .2byte or .4byte before an unknown instruction encoding

When the RISC-V disassembler encounters an unknown instruction, it
currently just prints the value of the bytes, like this:

  Dump of assembler code for function custom_insn:
     0x00010132 <+0>:	addi	sp,sp,-16
     0x00010134 <+2>:	sw	s0,12(sp)
     0x00010136 <+4>:	addi	s0,sp,16
     0x00010138 <+6>:	0x52018b
     0x0001013c <+10>:	0x9c45

My proposal, in this patch, is to change the behaviour to this:

  Dump of assembler code for function custom_insn:
     0x00010132 <+0>:	addi	sp,sp,-16
     0x00010134 <+2>:	sw	s0,12(sp)
     0x00010136 <+4>:	addi	s0,sp,16
     0x00010138 <+6>:	.4byte	0x52018b
     0x0001013c <+10>:	.2byte	0x9c45

Adding the .4byte and .2byte opcodes.  The benefit that I see here is
that in the patched version of the tools, the disassembler output can
be fed back into the assembler and it should assemble to the same
binary format.  Before the patch, the disassembler output is invalid
assembly.

I've started a RISC-V specific test file under binutils so that I can
add a test for this change.

binutils/ChangeLog:

	* testsuite/binutils-all/riscv/riscv.exp: New file.
	* testsuite/binutils-all/riscv/unknown.d: New file.
	* testsuite/binutils-all/riscv/unknown.s: New file.

opcodes/ChangeLog:

	* riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode
	before an unknown instruction, '%d' is replaced with the
	instruction length.

2 files changed, 29 insertions, 1 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ca3206d..a32af60 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2021-09-20  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+	* riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode
+	before an unknown instruction, '%d' is replaced with the
+	instruction length.
+
 2021-09-02  Nick Clifton  <nickc@redhat.com>
 
 	PR 28292
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 57198c7..2e28ba7 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -570,7 +570,29 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
 
   /* We did not find a match, so just print the instruction bits.  */
   info->insn_type = dis_noninsn;
-  (*info->fprintf_func) (info->stream, "0x%llx", (unsigned long long)word);
+  switch (insnlen)
+    {
+    case 2:
+    case 4:
+    case 8:
+      (*info->fprintf_func) (info->stream, ".%dbyte\t0x%llx",
+                             insnlen, (unsigned long long) word);
+      break;
+    default:
+      {
+        int i;
+        (*info->fprintf_func) (info->stream, ".byte\t");
+        for (i = 0; i < insnlen; ++i)
+          {
+            if (i > 0)
+              (*info->fprintf_func) (info->stream, ", ");
+            (*info->fprintf_func) (info->stream, "0x%02x",
+                                   (unsigned int) (word & 0xff));
+            word >>= 8;
+          }
+      }
+      break;
+    }
   return insnlen;
 }