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| author | Alan Modra <amodra@gmail.com> | 2009-10-14 11:30:20 +0000 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2009-10-14 11:30:20 +0000 |
| commit | 6a327e170e105295774bf3adadd3cb0af60e776d (patch) | |
| tree | a2b22b2f72d7ae23d135433ba204dbbd56681d8a /opcodes | |
| parent | d05c651b27358c7d6d0d59e8b46f8b0c68ae6369 (diff) | |
| download | gdb-6a327e170e105295774bf3adadd3cb0af60e776d.zip gdb-6a327e170e105295774bf3adadd3cb0af60e776d.tar.gz gdb-6a327e170e105295774bf3adadd3cb0af60e776d.tar.bz2 | |
PR 969
* m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/m68k-opc.c | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index cd106d4..f402497 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2009-10-14 Tomas Hurka <tom@hukatronic.cz> + + PR 969 + * m68k-opc.c (m68k_opcodes): Correct mask for macl and msacl. + 2009-10-13 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (print_insn): Always clear need_vex, need_vex_reg diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index d843390..28a77e5 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -1507,7 +1507,7 @@ const struct m68k_opcode m68k_opcodes[] = {"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac }, {"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac }, {"macl", 4, two(0xa000, 0x0a00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac }, -{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0800), "RMRm", mcfmac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0900), "RMRm", mcfmac }, {"macl", 4, two(0xa000, 0x0800), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac }, {"macl", 4, two(0xa000, 0x0a00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac }, @@ -1690,7 +1690,7 @@ const struct m68k_opcode m68k_opcodes[] = {"msacl", 4, two(0xa080, 0x0900), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac }, {"msacl", 4, two(0xa000, 0x0900), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac }, {"msacl", 4, two(0xa000, 0x0b00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac }, -{"msacl", 4, two(0xa000, 0x0900), two(0xf1b0, 0x0800), "RMRm", mcfmac }, +{"msacl", 4, two(0xa000, 0x0900), two(0xf1b0, 0x0900), "RMRm", mcfmac }, {"msacl", 4, two(0xa000, 0x0900), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac }, {"msacl", 4, two(0xa000, 0x0b00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac }, |