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author | Jan Beulich <jbeulich@suse.com> | 2022-12-12 13:49:56 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2022-12-12 13:49:56 +0100 |
commit | 6825a3bc866115006a71c1f6bc84af061218c36c (patch) | |
tree | 9035d94e726d05f923a5657acf5190bcab551c7e /opcodes | |
parent | 65cf035b8dc1df5d8020e0b1449514a3c42933e7 (diff) | |
download | gdb-6825a3bc866115006a71c1f6bc84af061218c36c.zip gdb-6825a3bc866115006a71c1f6bc84af061218c36c.tar.gz gdb-6825a3bc866115006a71c1f6bc84af061218c36c.tar.bz2 |
x86: revert disassembler parts of "x86: Allow 16-bit register source for LAR and LSL"
This reverts the disassembler parts of 859aa2c86dc9 ("x86: Allow 16-bit
register source for LAR and LSL"), adjusting testcases as necessary.
That change was itself a partial revert of c9f5b96bdab0 ("x86: correct
handling of LAR and LSL"), without actually saying so. While the earlier
commit was properly agreed upon, the partial revert was not, and hence
should not have been committed. This is even more so that the revert
part of that change wasn't even necessary to address PRĀ gas/29844.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/i386-dis.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index e778e91..d31c696 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -833,6 +833,8 @@ enum MOD_0F01_REG_3, MOD_0F01_REG_5, MOD_0F01_REG_7, + MOD_0F02, + MOD_0F03, MOD_0F12_PREFIX_0, MOD_0F12_PREFIX_2, MOD_0F13, @@ -2115,8 +2117,8 @@ static const struct dis386 dis386_twobyte[] = { /* 00 */ { REG_TABLE (REG_0F00 ) }, { REG_TABLE (REG_0F01 ) }, - { "larS", { Gv, Ew }, 0 }, - { "lslS", { Gv, Ew }, 0 }, + { MOD_TABLE (MOD_0F02) }, + { MOD_TABLE (MOD_0F03) }, { Bad_Opcode }, { "syscall", { XX }, 0 }, { "clts", { XX }, 0 }, @@ -8198,6 +8200,16 @@ static const struct dis386 mod_table[][2] = { { RM_TABLE (RM_0F01_REG_7_MOD_3) }, }, { + /* MOD_0F02 */ + { "larS", { Gv, Mw }, 0 }, + { "larS", { Gv, Ev }, 0 }, + }, + { + /* MOD_0F03 */ + { "lslS", { Gv, Mw }, 0 }, + { "lslS", { Gv, Ev }, 0 }, + }, + { /* MOD_0F12_PREFIX_0 */ { "movlpX", { XM, EXq }, 0 }, { "movhlps", { XM, EXq }, 0 }, |