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| author | Nagajyothi Eggone <nagajyothi.eggone@amd.com> | 2012-10-09 08:43:06 +0000 |
|---|---|---|
| committer | Nagajyothi Eggone <nagajyothi.eggone@amd.com> | 2012-10-09 08:43:06 +0000 |
| commit | 5e5c50d37b665b75f0f59e50eda106247809e795 (patch) | |
| tree | 0f8bb8aa1ce4e6320f99d6a2389dfda192ae9cee /opcodes | |
| parent | 4d5f33b647f45b94feb45558c50a70753332860e (diff) | |
| download | gdb-5e5c50d37b665b75f0f59e50eda106247809e795.zip gdb-5e5c50d37b665b75f0f59e50eda106247809e795.tar.gz gdb-5e5c50d37b665b75f0f59e50eda106247809e795.tar.bz2 | |
Add AMD bdver3 support.
gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER3_FLAGS.
* doc/c-i386.texi: Add -march=bdver3 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver3 test cases.
* gas/i386/nops-1-bdver3.d: New.
* gas/i386/arch-10-bdver3.d: New.
* gas/i386/x86-64-nops-1-bdver3.d: New.
* gas/i386/x86-64-arch-2-bdver3.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS.
* i386-init.h: Regenerated.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/i386-gen.c | 2 | ||||
| -rw-r--r-- | opcodes/i386-init.h | 6 |
3 files changed, 13 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ea9d742..17f7fee 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2012-10-09 Nagajyothi Eggone <nagajyothi.eggone@amd.com> + + * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS. + * i386-init.h: Regenerated. + 2012-10-05 Peter Bergner <bergner@vnet.ibm.com> * ppc-dis.c (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2; diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 87254d2..600904f 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -92,6 +92,8 @@ static initializer cpu_flag_init[] = "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" }, { "CPU_BDVER2_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuXsave|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW" }, + { "CPU_BDVER3_FLAGS", + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 4dbc18a..2e4589b 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -169,6 +169,12 @@ 1, 1, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \ 0, 0, 0 } } +#define CPU_BDVER3_FLAGS \ + { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ + 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, \ + 1, 1, 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 1, 0, 0, 1, \ + 0, 0, 0 } } + #define CPU_BTVER1_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |