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| author | Nick Clifton <nickc@redhat.com> | 2016-01-14 16:23:35 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2016-01-14 16:23:35 +0000 |
| commit | 4d82fe66e8d38b20ad429cb99a99ed8741336d72 (patch) | |
| tree | 56de9e0bebe4497372817e943c106ccdb8124aa1 /opcodes | |
| parent | e7cf25a8ab54cd02b48e7443ef25764475f02315 (diff) | |
| download | gdb-4d82fe66e8d38b20ad429cb99a99ed8741336d72.zip gdb-4d82fe66e8d38b20ad429cb99a99ed8741336d72.tar.gz gdb-4d82fe66e8d38b20ad429cb99a99ed8741336d72.tar.bz2 | |
Fix display of RL78 MOVW instructions that use the stack pointer.
* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
instructions that can support stack pointer operations.
* rl78-decode.c: Regenerate.
* rl78-dis.c: Fix display of stack pointer in MOVW based
instructions.
* testsuite/gas/rl78/sp-relative-movw.s: New test.
* testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly.
* testsuite/gas/rl78/rl78.exp: Run the new test.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/rl78-decode.c | 2 | ||||
| -rw-r--r-- | opcodes/rl78-decode.opc | 2 | ||||
| -rw-r--r-- | opcodes/rl78-dis.c | 14 |
4 files changed, 23 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 37e9a6e..64d342d 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2016-01-14 Nick Clifton <nickc@redhat.com> + + * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw + instructions that can support stack pointer operations. + * rl78-decode.c: Regenerate. + * rl78-dis.c: Fix display of stack pointer in MOVW based + instructions. + 2016-01-14 Matthew Wahab <matthew.wahab@arm.com> * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c index 0103850..9c391565 100644 --- a/opcodes/rl78-decode.c +++ b/opcodes/rl78-decode.c @@ -5347,7 +5347,7 @@ rl78_decode_opcode (unsigned long pc AU, op[0]); printf (" ra = 0x%x\n", ra); } - SYNTAX("movw %0, %e!1"); + SYNTAX("movw %0, %es!1"); #line 886 "rl78-decode.opc" ID(mov); W(); DRW(ra); SM(None, IMMU(2)); diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc index 94cb67b..57e79ed 100644 --- a/opcodes/rl78-decode.opc +++ b/opcodes/rl78-decode.opc @@ -882,7 +882,7 @@ rl78_decode_opcode (unsigned long pc AU, /** 1010 1110 movw %0, %s1 */ ID(mov); W(); DR(AX); SM(None, SFR); -/** 11ra 1011 movw %0, %e!1 */ +/** 11ra 1011 movw %0, %es!1 */ ID(mov); W(); DRW(ra); SM(None, IMMU(2)); /** 11ra 1010 movw %0, %1 */ diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c index dd4f086..6784e53 100644 --- a/opcodes/rl78-dis.c +++ b/opcodes/rl78-dis.c @@ -227,7 +227,17 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa) } if (do_bang) - PC ('!'); + { + /* If we are going to display SP by name, we must omit the bang. */ + if ((oper->type == RL78_Operand_Indirect || RL78_Operand_BitIndirect) + && oper->reg == RL78_Reg_None + && do_sfr + && ((oper->addend == 0xffff8 && opcode.size == RL78_Word) + || (oper->addend == 0x0fff8 && do_es && opcode.size == RL78_Word))) + ; + else + PC ('!'); + } if (do_cond) { @@ -265,6 +275,8 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa) PR (PS, "psw"); else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Word) PR (PS, "sp"); + else if (oper->addend == 0x0fff8 && do_sfr && do_es && opcode.size == RL78_Word) + PR (PS, "sp"); else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Byte) PR (PS, "spl"); else if (oper->addend == 0xffff9 && do_sfr && opcode.size == RL78_Byte) |