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| author | H.J. Lu <hjl.tools@gmail.com> | 2005-03-29 19:30:47 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2005-03-29 19:30:47 +0000 |
| commit | 4cc91dba12d0461b0fd31b02bdb53c1a2ee87088 (patch) | |
| tree | c4447e5cdd10fc04d6d47d6e1b5e417ce96e558c /opcodes | |
| parent | f0953f9df267994bec3c76edd7a414d3a536d9d8 (diff) | |
| download | gdb-4cc91dba12d0461b0fd31b02bdb53c1a2ee87088.zip gdb-4cc91dba12d0461b0fd31b02bdb53c1a2ee87088.tar.gz gdb-4cc91dba12d0461b0fd31b02bdb53c1a2ee87088.tar.bz2 | |
gas/testsuite/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run segment and inval-seg for i386. Run
x86-64-segment and x86-64-inval-seg for x86-64.
* gas/i386/intel.d: Expect movw for moving between memory and
segment register.
* gas/i386/naked.d: Likewise.
* gas/i386/opcode.d: Likewise.
* gas/i386/x86-64-opcode.d: Likewise.
* gas/i386/opcode.s: Use movw for moving between memory and
segment register.
* gas/i386/x86-64-opcode.s: Likewise.
* : Likewise.
* gas/i386/inval-seg.l: New.
* gas/i386/inval-seg.s: New.
* gas/i386/segment.l: New.
* gas/i386/segment.s: New.
* gas/i386/x86-64-inval-seg.l: New.
* gas/i386/x86-64-inval-seg.s: New.
* gas/i386/x86-64-segment.l: New.
* gas/i386/x86-64-segment.s: New.
include/opcode/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Don't allow the `l' suffix for moving
moving between memory and segment register. Allow movq for
moving between general-purpose register and segment register.
opcodes/
2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (SEG_Fixup): New.
(Sv): New.
(dis386): Use "Sv" for 0x8c and 0x8e.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 55 |
2 files changed, 59 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 86eca6a..29fbf98 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2005-03-29 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (SEG_Fixup): New. + (Sv): New. + (dis386): Use "Sv" for 0x8c and 0x8e. + 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de> Nick Clifton <nickc@redhat.com> diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 24e5a39..a2a5a06 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -97,6 +97,7 @@ static void SIMD_Fixup (int, int); static void PNI_Fixup (int, int); static void INVLPG_Fixup (int, int); static void BadOp (void); +static void SEG_Fixup (int, int); struct dis_private { /* Points to first byte not fetched. */ @@ -221,6 +222,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define Cm OP_C, m_mode #define Dm OP_D, m_mode #define Td OP_T, d_mode +#define Sv SEG_Fixup, v_mode #define RMeAX OP_REG, eAX_reg #define RMeBX OP_REG, eBX_reg @@ -642,9 +644,9 @@ static const struct dis386 dis386[] = { { "movS", Ev, Gv, XX }, { "movB", Gb, Eb, XX }, { "movS", Gv, Ev, XX }, - { "movQ", Ev, Sw, XX }, + { "movQ", Sv, Sw, XX }, { "leaS", Gv, M, XX }, - { "movQ", Sw, Ev, XX }, + { "movQ", Sw, Sv, XX }, { "popU", Ev, XX, XX }, /* 90 */ { "nop", NOP_Fixup, 0, XX, XX }, @@ -4411,3 +4413,52 @@ BadOp (void) codep = insn_codep + 1; oappend ("(bad)"); } + +static void +SEG_Fixup (int extrachar, int sizeflag) +{ + if (mod == 3) + { + /* We need to add a proper suffix with + + movw %ds,%ax + movl %ds,%eax + movq %ds,%rax + movw %ax,%ds + movl %eax,%ds + movq %rax,%ds + */ + const char *suffix; + + if (prefixes & PREFIX_DATA) + suffix = "w"; + else + { + USED_REX (REX_MODE64); + if (rex & REX_MODE64) + suffix = "q"; + else + suffix = "l"; + } + strcat (obuf, suffix); + } + else + { + /* We need to fix the suffix for + + movw %ds,(%eax) + movw %ds,(%rax) + movw (%eax),%ds + movw (%rax),%ds + + Override "mov[l|q]". */ + char *p = obuf + strlen (obuf) - 1; + + /* We might not have a suffix. */ + if (*p == 'v') + ++p; + *p = 'w'; + } + + OP_E (extrachar, sizeflag); +} |