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authorSean Keys <skeys@ipdatasys.com>2012-07-05 19:37:52 +0000
committerSean Keys <skeys@ipdatasys.com>2012-07-05 19:37:52 +0000
commit3879925e690102682c05d7f61997dae9eaf23b98 (patch)
treea154e9b8632ae32330ee15f32a61e4926fa40d88 /opcodes
parentf4263ca2cd6e7ad1c17050f13e93458a59a31884 (diff)
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gas/config/
* tc-xgate.c: Revised assembler so that operands are collected before the addressing mode is determined. include/opcode/ * xgate.h: Changed the format string for mode XGATE_OP_DYA_MON. opcodes/ * xgate-dis.c: Removed an IF statement that will always be false due to overlapping operand masks. * xgate-opc.c: Corrected 'com' opcode entry and fixed spacing.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/xgate-dis.c11
-rw-r--r--opcodes/xgate-opc.c5
2 files changed, 4 insertions, 12 deletions
diff --git a/opcodes/xgate-dis.c b/opcodes/xgate-dis.c
index 8c722f5..31f44d6 100644
--- a/opcodes/xgate-dis.c
+++ b/opcodes/xgate-dis.c
@@ -177,16 +177,7 @@ print_insn (bfd_vma memaddr, struct disassemble_info* info)
}
break;
case XG_R_R:
- if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_DYA_MON))
- {
- operandOne = ripBits (&operMaskReg, 3, decodePTR->opcodePTR,
- raw_code);
- operandTwo = ripBits (&operMaskReg, 3, decodePTR->opcodePTR,
- raw_code);
- (*info->fprintf_func)(info->stream, " R%x, R%x", operandOne,
- operandTwo);
- }
- else if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_DYA))
+ if (!strcmp (decodePTR->opcodePTR->constraints, XGATE_OP_DYA))
{
operandOne = ripBits (&operMaskReg, 3, opcodePTR, raw_code);
operandTwo = ripBits (&operMaskReg, 3, opcodePTR, raw_code);
diff --git a/opcodes/xgate-opc.c b/opcodes/xgate-opc.c
index 9b5fe07..76321e6 100644
--- a/opcodes/xgate-opc.c
+++ b/opcodes/xgate-opc.c
@@ -74,7 +74,6 @@
#define OP_INH XGATE_OP_INH
#define OP_TRI XGATE_OP_TRI
#define OP_DYA XGATE_OP_DYA
-#define OP_DM XGATE_OP_DYA_MON
#define OP_IMM3 XGATE_OP_IMM3
#define OP_IMM4 XGATE_OP_IMM4
#define OP_IMM8 XGATE_OP_IMM8
@@ -87,6 +86,7 @@
#define OP_IDO5 XGATE_OP_IDO5
#define OP_REL9 XGATE_OP_REL9
#define OP_REL10 XGATE_OP_REL10
+#define OP_DM XGATE_OP_DYA_MON
/* macro operand modes */
#define OP_mADD XGATE_OP_IMM16mADD
#define OP_mAND XGATE_OP_IMM16mAND
@@ -190,7 +190,8 @@ const struct xgate_opcode xgate_opcodes[] = {
{ "blo", OP_REL9, "0010001iiiiiiiii", XG_IP, 2, 0x2200, 0, 0, CHG_NONE, ALL},
{ "cmp", OP_mCPC, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL},
{ "cmp", OP_DYA, "00011sssrrrrrr00", XG_R_R, 2, 0x1800, 0, 0, CHG_NZVC, ALL},
- { "com", OP_DM, "00010rrrsssrrr11", XG_R_R, 2, 0x1003, 0, 0, CHG_NZV, ALL},
+ { "com", OP_DM, "00010rrrsssrrr11", XG_R, 2, 0x1003, 0, 0, CHG_NZVC, ALL},
+ { "com", OP_DYA, "00010rrrsssrrr11", XG_R_R, 2, 0x1003, 0, 0, CHG_NZV, ALL},
{ "cpc", OP_DYA, "00011sssrrrrrr01", XG_R_R, 2, 0x1801, 0, 0, CHG_NZVC, ALL},
{ "ldd", OP_mLDW, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL},
{ "ldw", OP_mLDW, "----------------", XG_R_I, 4, 0, 0, 0, CHG_NONE, ALL},