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authorAndrew Waterman <andrew@sifive.com>2016-12-18 22:53:50 -0800
committerAlan Modra <amodra@gmail.com>2016-12-20 12:26:34 +1030
commit2922d21da14b4711872371abacb16e8ab7c70894 (patch)
tree42987b9714a1c6641f3bc74c4a7e7230936545ff /opcodes
parent1d61f7949f77796ee407466f3ca7f42dcde9251b (diff)
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Re-work RISC-V gas flags: now we just support -mabi and -march
We've decided to standardize on two flags for RISC-V: "-march" sets the target architecture (which determines which instructions can be generated), and "-mabi" sets the target ABI. We needed to rework this because the old flag set didn't support soft-float or single-float ABIs, and didn't support an x32-style ABI on RISC-V. Additionally, we've changed the behavior of the -march flag: it's now a lot stricter and only parses things we can actually understand. Additionally, it's now lowercase-only: the rationale is that while the RISC-V ISA manual specifies that ISA strings are case-insensitive, in Linux-land things are usually case-sensitive. Since this flag can be used to determine library paths, we didn't want to bake some case-insensitivity in there that would case trouble later. This patch implements these two new flags and removes the old flags that could conflict with these. There wasn't a RISC-V release before, so we want to just support a clean flag set. include/ * elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define. (EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define. (EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define. (EF_RISCV_FLOAT_ABI_QUAD): Define. bfd/ * elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT. binutils/ * readelf.c (get_machine_flags): Use EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of EF_RISCV_{SOFT,HARD}_FLOAT. gas/ * config/tc-riscv.h (xlen): Delete. * config/tc-riscv.c (xlen): Make static. (abi_xlen): New variable. (options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC} with OPTION_MABI. (md_longopts): Likewise. (md_parse_option): Likewise. (riscv_elf_final_processing): Likewise. * doc/as.texinfo (Target RISC-V options): Likewise. * doc/c-riscv.texi (OPTIONS): Likewise. * config/tc-riscv.c (float_mode): Removed. (float_abi): New type, specifies the floating-point ABI. (riscv_set_abi): New function. (riscv_add_subset): Only allow lower-case ISA names and require them to start with "rv". (riscv_after_parse_args): Likewise. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Default to the ELF's XLEN when none is provided.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/riscv-dis.c8
2 files changed, 11 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index df466ef..92d2516 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,10 @@
2016-12-20 Andrew Waterman <andrew@sifive.com>
+ * riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
+ XLEN when none is provided.
+
+2016-12-20 Andrew Waterman <andrew@sifive.com>
+
* riscv-opc.c: Formatting fixes.
2016-12-20 Alan Modra <amodra@gmail.com>
diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 3b4e1e0..cb26350 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -406,8 +406,12 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
{
int xlen = 0;
- /* The incoming section might not always be complete. */
- if (info->section != NULL)
+ /* If XLEN is not known, get its value from the ELF class. */
+ if (info->mach == bfd_mach_riscv64)
+ xlen = 64;
+ else if (info->mach == bfd_mach_riscv32)
+ xlen = 32;
+ else if (info->section != NULL)
{
Elf_Internal_Ehdr *ehdr = elf_elfheader (info->section->owner);
xlen = ehdr->e_ident[EI_CLASS] == ELFCLASS64 ? 64 : 32;