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authorJason Eckhardt <jle@rice.edu>2003-05-24 04:22:23 +0000
committerJason Eckhardt <jle@rice.edu>2003-05-24 04:22:23 +0000
commit14218d5f2405e80541987be646c92af9c4bafa58 (patch)
treee18ca3fa4b11dfd119cf48a44cda89a18b5f2ff7 /opcodes
parentb276f1bbc9cf6f8d44204350cb03e4d021edf783 (diff)
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2003-05-23 Jason Eckhardt <jle@rice.edu>
gas: * config/tc-i860.c (target_xp): Declare variable. (OPTION_XP): Declare macro. (md_longopts): Add option -mxp. (md_parse_option): Set target_xp. (md_show_usage): Add -mxp usage. (i860_process_insn): Recognize XP registers bear, ccr, p0-p3. (md_assemble): Don't try expansions if XP_ONLY is set. * doc/c-i860.texi: Document -mxp option. gas/testsuite: * gas/i860/xp.s: New file. * gas/i860/xp.d: New file. include/opcode: * i860.h (expand_type): Add XP_ONLY. (scyc.b): New XP instruction. (ldio.l): Likewise. (ldio.s): Likewise. (ldio.b): Likewise. (ldint.l): Likewise. (ldint.s): Likewise. (ldint.b): Likewise. (stio.l): Likewise. (stio.s): Likewise. (stio.b): Likewise. (pfld.q): Likewise. opcodes: * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3. (print_insn_i860): Grab 4 bits of the control register field instead of 3.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/i860-dis.c10
2 files changed, 12 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index de8f363..cbdcc3c 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2003-05-23 Jason Eckhardt <jle@rice.edu>
+
+ * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
+ (print_insn_i860): Grab 4 bits of the control register field
+ instead of 3.
+
2003-05-18 Jason Eckhardt <jle@rice.edu>
* i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
diff --git a/opcodes/i860-dis.c b/opcodes/i860-dis.c
index 69a106d..a3e87b0 100644
--- a/opcodes/i860-dis.c
+++ b/opcodes/i860-dis.c
@@ -1,5 +1,5 @@
/* Disassembler for the i860.
- Copyright 2000 Free Software Foundation, Inc.
+ Copyright 2000, 2003 Free Software Foundation, Inc.
Contributed by Jason Eckhardt <jle@cygnus.com>.
@@ -37,9 +37,11 @@ static const char *const frnames[] =
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"};
-/* Control/status register names (encoded as 0..5 in the instruction). */
+/* Control/status register names (encoded as 0..11 in the instruction).
+ Registers bear, ccr, p0, p1, p2 and p3 are XP only. */
static const char *const crnames[] =
- {"fir", "psr", "dirbase", "db", "fsr", "epsr", "", ""};
+ {"fir", "psr", "dirbase", "db", "fsr", "epsr", "bear", "ccr",
+ "p0", "p1", "p2", "p3", "--", "--", "--", "--" };
/* Prototypes. */
@@ -190,7 +192,7 @@ print_insn_i860 (memaddr, info)
/* Control register. */
case 'c':
(*info->fprintf_func) (info->stream, "%s%s", I860_REG_PREFIX,
- crnames[(insn >> 21) & 0x7]);
+ crnames[(insn >> 21) & 0xf]);
break;
/* 16-bit immediate (sign extend, except for bitwise ops). */