diff options
| author | Matthew Wahab <matthew.wahab@arm.com> | 2016-01-20 14:25:46 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2016-01-20 14:25:46 +0000 |
| commit | 0bff6e2d6942690d81ce1f33728de07835b0f5b7 (patch) | |
| tree | 15c9baf6f1575296541d02768113d0247191194c /opcodes | |
| parent | b12e5614fbbaf658019e9c2962f013b068e5cb3c (diff) | |
| download | gdb-0bff6e2d6942690d81ce1f33728de07835b0f5b7.zip gdb-0bff6e2d6942690d81ce1f33728de07835b0f5b7.tar.gz gdb-0bff6e2d6942690d81ce1f33728de07835b0f5b7.tar.bz2 | |
[AArch64] Reject invalid immediate operands to MSR UAO
In the instruction to write to the ARMv8.2 PSTATE field UAO,
MSR UAO, #<imm>, the immediate should be either 0 or 1 but GAS accepts
any unsigned 4-bit integer.
This patch implements the constraint on the immediate, generating an
error if the immediate operand is invalid, and adds tests for the
illegal forms.
opcodes/
2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (operand_general_constraint_met_p): Check validity
of MSR UAO immediate operand.
gas/
2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
* testsuite/gas/aarch64/armv8_2-a-illegal.d: New.
* testsuite/gas/aarch64/armv8_2-a-illegal.l: New.
* testsuite/gas/aarch64/armv8_2-a-illegal.s: New.
Change-Id: Ibdec4967c00b1ef3be9dbc43d23b2c70d1a0b28c
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 6 |
2 files changed, 9 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 8a6ea15..8c0648a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-01-20 Matthew Wahab <matthew.wahab@arm.com> + + * aarch64-opc.c (operand_general_constraint_met_p): Check validity + of MSR UAO immediate operand. + 2016-01-18 Maciej W. Rozycki <macro@imgtec.com> * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 1cd5c1b..ae06ee3 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -1878,9 +1878,11 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx, { case AARCH64_OPND_PSTATEFIELD: assert (idx == 0 && opnds[1].type == AARCH64_OPND_UIMM4); - /* MSR PAN, #uimm4 + /* MSR UAO, #uimm4 + MSR PAN, #uimm4 The immediate must be #0 or #1. */ - if (opnd->pstatefield == 0x04 /* PAN. */ + if ((opnd->pstatefield == 0x03 /* UAO. */ + || opnd->pstatefield == 0x04) /* PAN. */ && opnds[1].imm.value > 1) { set_imm_out_of_range_error (mismatch_detail, idx, 0, 1); |