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author | Jan Beulich <jbeulich@novell.com> | 2018-03-22 08:32:50 +0100 |
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committer | Jan Beulich <jbeulich@suse.com> | 2018-03-22 08:32:50 +0100 |
commit | 9f79e88693dae859f838bcf684158e6e6f8f3b6b (patch) | |
tree | 78014df9e0e5b90c93563718f7b920308bfe5b78 /opcodes/i386-opc.tbl | |
parent | d6793fa1acf384a93c83db6eb916e3b9eedd9ef4 (diff) | |
download | gdb-9f79e88693dae859f838bcf684158e6e6f8f3b6b.zip gdb-9f79e88693dae859f838bcf684158e6e6f8f3b6b.tar.gz gdb-9f79e88693dae859f838bcf684158e6e6f8f3b6b.tar.bz2 |
x86: fix swapped operand handling for BNDMOV
The wrong placement of the Load attribute in the templates prevented
this from working. The disassembler also didn't handle this consistently
with other similar dual-encoding insns.
Diffstat (limited to 'opcodes/i386-opc.tbl')
-rw-r--r-- | opcodes/i386-opc.tbl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 26e81ff..41ec1be 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -2872,8 +2872,8 @@ bnd, 0, 0xf2, None, 1, CpuMPX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf| // MPX instructions. bndmk, 2, 0xf30f1b, None, 2, CpuMPX, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Anysize|BaseIndex, RegBND } -bndmov, 2, 0x660f1a, None, 2, CpuMPX, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|RegBND, RegBND } -bndmov, 2, 0x660f1b, None, 2, CpuMPX, Load|Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegBND, Xmmword|Unspecified|BaseIndex|RegBND } +bndmov, 2, 0x660f1a, None, 2, CpuMPX, Load|Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|RegBND, RegBND } +bndmov, 2, 0x660f1b, None, 2, CpuMPX, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegBND, Xmmword|Unspecified|BaseIndex|RegBND } bndcl, 2, 0xf30f1a, None, 2, CpuMPX|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Anysize|BaseIndex, RegBND } bndcl, 2, 0xf30f1a, None, 2, CpuMPX|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg64|Anysize|BaseIndex, RegBND } bndcu, 2, 0xf20f1a, None, 2, CpuMPX|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Anysize|BaseIndex, RegBND } |