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| author | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-11-01 13:44:45 +0000 |
|---|---|---|
| committer | Victor Do Nascimento <victor.donascimento@arm.com> | 2023-11-07 20:38:11 +0000 |
| commit | 9203a155ee9722be40d48fbd970c9e8ce3355dff (patch) | |
| tree | 2733f2a84e2838e42c57796ddba141cd9005fcf4 /opcodes/aarch64-tbl.h | |
| parent | 8c3273ee07fae4badfd6f25f67162e5f6ec7f03e (diff) | |
| download | gdb-9203a155ee9722be40d48fbd970c9e8ce3355dff.zip gdb-9203a155ee9722be40d48fbd970c9e8ce3355dff.tar.gz gdb-9203a155ee9722be40d48fbd970c9e8ce3355dff.tar.bz2 | |
aarch64: Add THE system register support
Add Binutils support for system registers associated with the
Translation Hardening Extension (THE).
In doing so, we also add core feature support for THE, enabling its
associated feature flag and implementing the necessary
feature-checking machinery.
Regression tested on aarch64-linux-gnu, no regressions.
gas/ChangeLog:
* config/tc-aarch64.c (aarch64_features): Add "+the" feature modifier.
* doc/c-aarch64.texi (AArch64 Extensions): Update
documentation for `the' option.
* testsuite/gas/aarch64/sysreg-8.s: Add tests for `the'
associated system registers.
* testsuite/gas/aarch64/sysreg-8.d: Likewise.
include/ChangeLog:
* opcode/aarch64.h (enum aarch64_feature_bit): Add
AARCH64_FEATURE_THE.
opcode/ChangeLog:
* aarch64-opc.c (aarch64_sys_ins_reg_supported_p): Add `the'
system register check support.
* aarch64-sys-regs.def: Add `rcwmask_el1' and `rcwsmask_el1'
* aarch64-tbl.h: Define `THE' preprocessor macro.
Diffstat (limited to 'opcodes/aarch64-tbl.h')
| -rw-r--r-- | opcodes/aarch64-tbl.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 463939d..e624b85 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2576,6 +2576,8 @@ static const aarch64_feature_set aarch64_feature_chk = AARCH64_FEATURE (CHK); static const aarch64_feature_set aarch64_feature_gcs = AARCH64_FEATURE (GCS); +static const aarch64_feature_set aarch64_feature_the = + AARCH64_FEATURE (THE); #define CORE &aarch64_feature_v8 #define FP &aarch64_feature_fp @@ -2636,6 +2638,7 @@ static const aarch64_feature_set aarch64_feature_gcs = #define CSSC &aarch64_feature_cssc #define CHK &aarch64_feature_chk #define GCS &aarch64_feature_gcs +#define THE &aarch64_feature_the #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL } |