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| author | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2018-11-28 19:35:04 +0000 |
|---|---|---|
| committer | Szabolcs Nagy <szabolcs.nagy@arm.com> | 2019-06-14 12:02:19 +0100 |
| commit | e30d1fa1bfb1ff2e225cfac9226c357f2cf07a26 (patch) | |
| tree | 01c3ad124c43de1bed93213c591243c950fe5571 /include | |
| parent | bcc5a6eb668e560a0020114b6dc261ef494981ba (diff) | |
| download | gdb-e30d1fa1bfb1ff2e225cfac9226c357f2cf07a26.zip gdb-e30d1fa1bfb1ff2e225cfac9226c357f2cf07a26.tar.gz gdb-e30d1fa1bfb1ff2e225cfac9226c357f2cf07a26.tar.bz2 | |
Add R_AARCH64_P32_MOVW_PREL_* ELF32 relocs
These ilp32 relocations were missing for some reason.
bfd/ChangeLog:
* elfnn-aarch64.c: Enable MOVW_PREL relocs for ELF32.
include/ChangeLog:
* elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define.
(R_AARCH64_P32_MOVW_PREL_G0_NC): Define.
(R_AARCH64_P32_MOVW_PREL_G1): Define.
ld/ChangeLog:
* testsuite/ld-aarch64/aarch64-elf.exp: Add emit-relocs-22 and -23.
* testsuite/ld-aarch64/emit-relocs-22.d: New test.
* testsuite/ld-aarch64/emit-relocs-22.s: New test.
* testsuite/ld-aarch64/emit-relocs-23.d: New test.
* testsuite/ld-aarch64/emit-relocs-23.s: New test.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 6 | ||||
| -rw-r--r-- | include/elf/aarch64.h | 4 |
2 files changed, 10 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index f84498b..8169b6a 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,9 @@ +2019-06-14 Szabolcs Nagy <szabolcs.nagy@arm.com> + + * elf/aarch64.h (R_AARCH64_P32_MOVW_PREL_G0): Define. + (R_AARCH64_P32_MOVW_PREL_G0_NC): Define. + (R_AARCH64_P32_MOVW_PREL_G1): Define. + 2019-06-03 Nick Alcock <nick.alcock@oracle.com> * ctf.h (ctf_enum.cte_value): Fix type to int32_t. diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h index 721378a..16abd86 100644 --- a/include/elf/aarch64.h +++ b/include/elf/aarch64.h @@ -128,6 +128,10 @@ RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20) /* BL: ((S+A-P) >> 2) & 0x3ffffff. */ RELOC_NUMBER (R_AARCH64_P32_CALL26, 21) +/* Group relocations to create a 16 or 32 bit PC-relative offset inline. */ +RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22) +RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23) +RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24) RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25) RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26) |