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| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:17 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:17 +0100 |
| commit | dfc12f9f533ea0614ad655370c5f8373081b0c61 (patch) | |
| tree | a69a45cec788fc06f43129775b4f950c0293acf3 /include | |
| parent | 6a245d9941af0ae1681115cc2d732a031e02b4f7 (diff) | |
| download | gdb-dfc12f9f533ea0614ad655370c5f8373081b0c61.zip gdb-dfc12f9f533ea0614ad655370c5f8373081b0c61.tar.gz gdb-dfc12f9f533ea0614ad655370c5f8373081b0c61.tar.bz2 | |
aarch64: Add new SVE dot-product instructions
This patch adds the SVE FDOT, SDOT and UDOT instructions,
which are available when FEAT_SME2 is implemented. The patch
also reorders the existing SVE_Zm3_22_INDEX to keep the
operands numerically sorted.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/aarch64.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index a4f1623..e179e48 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -476,8 +476,9 @@ enum aarch64_opnd AARCH64_OPND_SVE_Zm_5, /* SVE vector register in Zm, bits [9,5]. */ AARCH64_OPND_SVE_Zm_16, /* SVE vector register in Zm, bits [20,16]. */ AARCH64_OPND_SVE_Zm3_INDEX, /* z0-z7[0-3] in Zm, bits [20,16]. */ - AARCH64_OPND_SVE_Zm3_22_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 22. */ AARCH64_OPND_SVE_Zm3_11_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 11. */ + AARCH64_OPND_SVE_Zm3_19_INDEX, /* z0-z7[0-3] in Zm3_INDEX plus bit 19. */ + AARCH64_OPND_SVE_Zm3_22_INDEX, /* z0-z7[0-7] in Zm3_INDEX plus bit 22. */ AARCH64_OPND_SVE_Zm4_11_INDEX, /* z0-z15[0-3] in Zm plus bit 11. */ AARCH64_OPND_SVE_Zm4_INDEX, /* z0-z15[0-1] in Zm, bits [20,16]. */ AARCH64_OPND_SVE_Zn, /* SVE vector register in Zn. */ |