diff options
| author | David Guillen Fandos <david@davidgf.net> | 2023-06-15 04:45:03 +0100 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@orcam.me.uk> | 2023-06-15 04:45:03 +0100 |
| commit | df18f71b565c29f6f1ebd385cb1aed97d00e9660 (patch) | |
| tree | 9bf1c937007fab248a8c3cbee838326bac497104 /include | |
| parent | 011365bacac6a95dab2a6a96e96503983682be50 (diff) | |
| download | gdb-df18f71b565c29f6f1ebd385cb1aed97d00e9660.zip gdb-df18f71b565c29f6f1ebd385cb1aed97d00e9660.tar.gz gdb-df18f71b565c29f6f1ebd385cb1aed97d00e9660.tar.bz2 | |
Add MIPS Allegrex CPU as a MIPS2-based CPU
The Allegrex CPU was created by Sony Interactive Entertainment to power
their portable console, the PlayStation Portable.
The pspdev organization maintains all sorts of tools to create software
for said device including documentation.
Signed-off-by: David Guillen Fandos <david@davidgf.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/elf/mips.h | 1 | ||||
| -rw-r--r-- | include/opcode/mips.h | 6 |
2 files changed, 7 insertions, 0 deletions
diff --git a/include/elf/mips.h b/include/elf/mips.h index e2c3868..2c13cc8 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -284,6 +284,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext) #define E_MIPS_MACH_3900 0x00810000 #define E_MIPS_MACH_4010 0x00820000 #define E_MIPS_MACH_4100 0x00830000 +#define E_MIPS_MACH_ALLEGREX 0x00840000 #define E_MIPS_MACH_4650 0x00850000 #define E_MIPS_MACH_4120 0x00870000 #define E_MIPS_MACH_4111 0x00880000 diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 75d3fc2..b1bd27f 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1265,6 +1265,8 @@ static const unsigned int mips_isa_table[] = { #define INSN_XLR 0x00000020 /* Imagination interAptiv MR2. */ #define INSN_INTERAPTIV_MR2 0x04000000 +/* Sony PSP Allegrex instruction. */ +#define INSN_ALLEGREX 0x08000000 /* DSP ASE */ #define ASE_DSP 0x00000001 @@ -1377,6 +1379,7 @@ static const unsigned int mips_isa_table[] = { #define CPU_MIPS64R3 66 #define CPU_MIPS64R5 68 #define CPU_MIPS64R6 69 +#define CPU_ALLEGREX 10111431 /* octal 'AL', 31. */ #define CPU_SB1 12310201 /* octal 'SB', 01. */ #define CPU_LOONGSON_2E 3001 #define CPU_LOONGSON_2F 3002 @@ -1459,6 +1462,9 @@ cpu_is_member (int cpu, unsigned int mask) case CPU_INTERAPTIV_MR2: return (mask & INSN_INTERAPTIV_MR2) != 0; + case CPU_ALLEGREX: + return (mask & INSN_ALLEGREX) != 0; + default: return false; } |