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| author | Jeff Law <law@redhat.com> | 1996-07-02 19:20:37 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1996-07-02 19:20:37 +0000 |
| commit | d3329f0d0c239c019fdd2e472584e66e6c1785d8 (patch) | |
| tree | b6a39ccef669d65c39711c4e41ac7d241d12ed0e /include | |
| parent | eafdda3d8d3b7bbd1dd9e4304a3d3b6571d0cf48 (diff) | |
| download | gdb-d3329f0d0c239c019fdd2e472584e66e6c1785d8.zip gdb-d3329f0d0c239c019fdd2e472584e66e6c1785d8.tar.gz gdb-d3329f0d0c239c019fdd2e472584e66e6c1785d8.tar.bz2 | |
* h8300.h (UNOP3): Mark the register operand in this insn
as a source operand, not a destination operand.
So the simulator can handle shal #2,er0 correctly.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/ChangeLog | 11 | ||||
| -rw-r--r-- | include/opcode/h8300.h | 6 |
2 files changed, 14 insertions, 3 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 08fc5c3..e02057a 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,14 @@ +start-sanitize-h8s +Tue Jul 2 13:20:19 1996 Jeffrey A Law (law@cygnus.com) + + * h8300.h (UNOP3): Mark the register operand in this insn + as a source operand, not a destination operand. + +end-sanitize-h8s +Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu> + + * alpha.h: New file. + Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com> * rs6k.h: Remove obsolete file. diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h index 7b4d997e..fd25f33 100644 --- a/include/opcode/h8300.h +++ b/include/opcode/h8300.h @@ -208,9 +208,9 @@ struct h8_opcode { O(code,SW), 0, 2, name, {OR16, E, 0}, {op1, op2, op3+1, OR16, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \ { O(code,SL), 0, 2, name, {OR32, E, 0}, {op1, op2, op3+3, OR32|B30, E, 0, 0, 0, 0}, 0, 0, 0, 0} \ /* start-sanitize-h8s */\ -,{ O(code,SB), 1, 2, name, {SHIFT_IMM, RD8, E}, {op1, op2, op3+4, RD8, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \ -{ O(code,SW), 0, 2, name, {SHIFT_IMM, RD16, E}, {op1, op2, op3+5, RD16, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \ -{ O(code,SL), 0, 2, name, {SHIFT_IMM, RD32, E}, {op1, op2, op3+7, RD32|B30, E, 0, 0, 0, 0}, 0, 0, 0, 0} \ +,{ O(code,SB), 1, 2, name, {SHIFT_IMM, RS8, E}, {op1, op2, op3+4, RS8, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \ +{ O(code,SW), 0, 2, name, {SHIFT_IMM, RS16, E}, {op1, op2, op3+5, RS16, E, 0, 0, 0, 0}, 0, 0, 0, 0}, \ +{ O(code,SL), 0, 2, name, {SHIFT_IMM, RS32, E}, {op1, op2, op3+7, RS32|B30, E, 0, 0, 0, 0}, 0, 0, 0, 0} \ /* end-sanitize-h8s */ \ |