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authorRichard Sandiford <rdsandiford@googlemail.com>2011-07-24 14:04:51 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2011-07-24 14:04:51 +0000
commitbcd530a7131f7830e80eae028fbfc2d0b5f531c6 (patch)
tree96b5dbc8784880ac701e2dd460374e0ff35f0d00 /include
parentbbc40cf228fff7b7e0c3d0856d8887949cdde54b (diff)
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include/opcode/
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com> * mips.h (INSN_TRAP): Rename to... (INSN_NO_DELAY_SLOT): ... this. (INSN_SYNC): Remove macro. gas/ 2011-07-24 Maciej W. Rozycki <macro@codesourcery.com> * config/tc-mips.c (can_swap_branch_p): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC as well as explicit checks for ERET and DERET when scheduling branch delay slots. opcodes/ 2011-07-24 Maciej W. Rozycki <macro@codesourcery.com> * mips-opc.c (NODS): New macro. (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. (DSP_VOLA): Likewise. (mips_builtin_opcodes): Add NODS annotation to "deret" and "eret". Replace INSN_SYNC with NODS throughout. Use NODS in place of TRAP for "wait", "waiti" and "yield". * mips16-opc.c (NODS): New macro. (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. (mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc", "restore" and "save".
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog6
-rw-r--r--include/opcode/mips.h7
2 files changed, 9 insertions, 4 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 5e30fbc..7f4cdab 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,9 @@
+2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * mips.h (INSN_TRAP): Rename to...
+ (INSN_NO_DELAY_SLOT): ... this.
+ (INSN_SYNC): Remove macro.
+
2011-07-01 Eric B. Weddington <eric.weddington@atmel.com>
* avr.h (AVR_ISA_AVR6): Remove AVR_ISA_SPMX as it was actually
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 0685bab..72a478c 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -489,8 +489,9 @@ struct mips_opcode
#define INSN_WRITE_HI 0x01000000
/* Modifies the LO register. */
#define INSN_WRITE_LO 0x02000000
-/* Takes a trap (easier to keep out of delay slot). */
-#define INSN_TRAP 0x04000000
+/* Not to be placed in a branch delay slot, either architecturally
+ or for ease of handling (such as with instructions that take a trap). */
+#define INSN_NO_DELAY_SLOT 0x04000000
/* Instruction stores value into memory. */
#define INSN_STORE_MEMORY 0x08000000
/* Instruction uses single precision floating point. */
@@ -499,8 +500,6 @@ struct mips_opcode
#define FP_D 0x20000000
/* Instruction is part of the tx39's integer multiply family. */
#define INSN_MULT 0x40000000
-/* Instruction synchronize shared memory. */
-#define INSN_SYNC 0x80000000
/* Instruction is actually a macro. It should be ignored by the
disassembler, and requires special treatment by the assembler. */
#define INSN_MACRO 0xffffffff