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authorNeal Frager <neal.frager@amd.com>2023-10-05 13:51:03 +0100
committerMichael J. Eager <eager@eagercon.com>2023-10-06 10:53:45 -0700
commit6bbf249557ba17cfebe01c67370df4da9e6a56f9 (patch)
treeb1242471838ab0e7131aec8879013c258ef8a992 /include
parent9a896be33224654760c46d3698218241d0a1f354 (diff)
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opcodes: microblaze: Add new bit-field instructions
This patches adds new bsefi and bsifi instructions. BSEFI- The instruction shall extract a bit field from a register and place it right-adjusted in the destination register. The other bits in the destination register shall be set to zero. BSIFI- The instruction shall insert a right-adjusted bit field from a register at another position in the destination register. The rest of the bits in the destination register shall be unchanged. Further documentation of these instructions can be found here: https://docs.xilinx.com/v/u/en-US/ug984-vivado-microblaze-ref This patch has been tested for years of AMD Xilinx Yocto releases as part of the following patch set: https://github.com/Xilinx/meta-xilinx/tree/master/meta-microblaze/recipes-devtools/binutils/binutils Signed-off-by: nagaraju <nagaraju.mekala@amd.com> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michael J. Eager <eager@eagercon.com>
Diffstat (limited to 'include')
-rw-r--r--include/elf/microblaze.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/elf/microblaze.h b/include/elf/microblaze.h
index fecdd7e..164b36d 100644
--- a/include/elf/microblaze.h
+++ b/include/elf/microblaze.h
@@ -61,6 +61,7 @@ START_RELOC_NUMBERS (elf_microblaze_reloc_type)
RELOC_NUMBER (R_MICROBLAZE_TEXTPCREL_64, 30) /* PC-relative TEXT offset. */
RELOC_NUMBER (R_MICROBLAZE_TEXTREL_64, 31) /* TEXT Entry offset 64-bit. */
RELOC_NUMBER (R_MICROBLAZE_TEXTREL_32_LO, 32) /* TEXT Entry offset 32-bit. */
+ RELOC_NUMBER (R_MICROBLAZE_32_NONE, 33)
END_RELOC_NUMBERS (R_MICROBLAZE_max)
/* Global base address names. */